Hot Carrier Trapping Research Articles

Hot carrier trapping in GaAs/AlGaAs single quantum wells with different confinement structures

The trapping efficiency and dynamics of hot carriers in GaAs/AlGaAs single quantum wells with different confinement structures are investigated by photoluminescence excitation spectroscopy and picosecond luminescence spectroscopy. The trapping efficiency is highest for graded confinement structures and reaches 100% for a quantum well with a linear band gap profile of the AlGaAs. The lower trapping efficiencies in single quantum wells without additional confinement and in separate confinement heterostructures is attributed to radiative and nonradiative recombination in the AlGaAs. The trapping times are shorter than 20ps for all the different structures.

Incompatibility of requirements for optimizing short channel behaviour and long term stability in MOSFETs

An analytical approach is presented which predicts that the requirements for minimizing short channel effects and long term degradation due to hot carrier trapping lead to incompatible requirements on the design of short channel MOSFETs. Model predictions are compared with experimental data and with the results of 2-D simulations. An asymmetrical MOSFET structure is proposed to circumvent this design problem.

Avalanche current relaxation in p−Si MOSFET-s

A characteristic time dependence of the avalanche current was found in p−si MOSFET-s while the normal plateau current was constant. This can be explained by tunneling and trapping of hot carriers into the oxide layer.

Effects of hot-carrier trapping in n- and p-channel MOSFET's

Detailed measurements of hot-carrier gate current and its trapping effects were studied on both n- and p-channel MOSFET's down to submicrometer channel lengths. Comparison of the measurements for these two types of devices is made. No hot-hole gate current or hot-hole trapping was detected in p-channel MOSFET's. A hot-electron gate current is present not only in n-channel MOSFET's, but also in p-channel MOSFET's where the current is increased by hot-electron trapping. By trapping hot electrons uniformly over the channel in n-MOSFET's, it was shown that hot-electron trapping produces only negative oxide charge without generating interface traps.

Ultrafast relaxations of photogenerated carriers in amorphous semiconductors

Electron relaxation effects in the range from 0.5 to 200 ps were studied in amorphous silicon and chalcogenide glasses using the pump and probe technique. Information about hot carrier thermalization and carrier trapping in shallow and deep states in the gap was obtained.

VIA-1 effects of hot-carrier trapping in n- and p-channel MOSFETs

VIA-1 effects of hot-carrier trapping in n- and p-channel MOSFETs

Instability of MOSFET's due to redistribution of Oxide charges

It has been reported that electrical instability of MOSFET's occurs with the encapsulation of silicon nitride when these devices are stressed. In order to determine the mechanisms responsible, MOSFET's with and without this capsulation were stressed under combinations of biases which were different from those previously utilized. It is observed that another form of instability is caused by the drain-gate-substrate interaction such that when an abnormally high bias is applied to the drain, oxide charges are redistributed in the direction parallel to the oxide-semiconductor interface. Measurements show that after the stress, net positive charge is accumulated above the channel adjacent to the drain while net negative charge is accumulated in the drain-gate overlap region. The presence of negative charge is apparently associated with hydrogen in the plasma silicon nitride. The positive charge is present with or without the nitride layer and our experiments point out another source of instability other than hot-carrier trapping in devices even without a SiN cap for a drain bias higher than some critical value. It is concluded that this instability is the same as that manifested by the well-known walk-out effect in gated diodes.

Small-signal theory of unipolar injection currents in solids

Small-signal behavior of unipolar currents injected in semiconductors or insulators is theoretically studied. The one-dimensional problem of plane-parallel electrodes is considered. Analysis neglects diffusion but takes into account carrier mobility field dependence, ionized impurities, and trapping. Arbitrary boundary conditions are assumed. The present theory describes the small-signal response by a set of four complex quantities recalling the Llewellyn-Peterson coefficients for vacuum tubes. The present paper represents a generalization of previous results obtained by Yoshimura in the following respects: new physical phenomena (hot carrier effects and trapping) are taken into account, and new applications of the derived coefficients are suggested. This paper also contains a brief comment on physical situations and devices that can be studied by the present theory, paying particular attention to high-frequency negative-resistance devices.

Semiconductors at cryogenic temperatures

A review is made of those physical properties of semiconductors which are relevant to device operation at cryogenic temperatures. These include carrier density, mobility, hot carrier phenomena, recombination and trapping, and the performance of p-n junctions. A description is then given of the cryogenic operation of semiconductor devices together with an assessment of future possibilities.