Host Personal Computer Research Articles

Development of an Integrated Instrument for Nucleic Acid Pyrosequencing Detection

This paper introduces a kind of new homemade and low cost multi-channel nucleic acid pyrosequence detector for at least ninety-six channels and presents the detail of related software and hardware development. We construct a kind of automatic instrument to fulfill the pyrosequencing processes. First we select the X-86 personal computer as host computer, the AT89C51 micro-controller as slave computer, the PMT (photoelectric multiply tube) as photoelectric transformation equipment, and the HY-6022 as data sampling device; Second we use the Visual C++ 6.0 as coding tools to design the measure and control system based on Windows 2000 operating system; Third we sample the fluorescent signal in all of the cuvettes during the reaction between nucleic acid and reagent; Last we analyze these data to realize the function of the multi-channel nucleic acid detection. In this paper the whole instrument design and key parts design are both introduced such as the liquid injection process and related structure design, the communication module between the host personal computer and the MCS51, the high sensitivity multi-channel detector (at least 96 channels, the sensitivity is 2.45×10-9w) etc. The result of the instrument for two channels data processing is also reported in this paper.

A detection system for three-dimensional visualization of cosmic muons trajectories

A detection system for measuring the direction of cosmic muons is presented. The detector is composed by two multiwire proportional chambers 55 mm apart from each other. These chambers operate as two independent subdetectors in coincidence. Each subdetector provides two-dimensional (2D) localization of ionizing events making use of a single X and Y cathode structure for position readout. 2D localization is achieved by associating one delay line to each spatial coordinate. The trajectory is reconstructed from the two pairs of coordinates measured in the subdetector planes. Signals related to the X and Y coordinates of ionizing events are electronically processed and recorded by a data acquisition interface connected to a host personal computer (PC). A user interface software shows the trajectories of ionizing events in a three-dimensional graphic window. Cosmic particles trajectories are visualized in real time. Results are shown that characterize the system performance. The angular and length distributions for measured and simulated muon trajectories are also presented. The obtained results show that, besides the educational purpose of showing real time cosmic ray trajectories, the presented system is also suitable for studying physical properties of cosmic muons.

Development of a Flexible Artificial Hand System Equipped with a Slip Sensor.

This study develops a flexible artificial hand system with slip sensors. The artificial hand is composed of four flexible actuators. Two pairs of two opposite actuators are driven by the independent air pressure sources each. In each pair, one of opposite pair of actuators is equipped with a slip sensor. The slip sensor is composed of a photo reflector and a conductive rubber sensitive to load force. The contact of the hand to an object is detected by the change of resistance of the conductive rubber. After the detection of contact, the slip velocity is measured by calculating the cross-correlation function of the output voltage waveforms of two photo transistors in the photo reflector. The grasping force of the hand is increased according to the measured slip velocity. The calculation of the cross-correlation function and the generation of control signals are made in a host personal computer. From the experimental results of holding several objects, the hand system is proved to grasp suitably the object whose weight is previously unknown.

Development of a Flexible Artificial Hand System Equipped with a Slip Sensor.

This study develops a flexible artificial hand system with slip sensors. The artificial hand is composed of four flexible actuators. Two pairs of two opposite actuators are driven by the independent air pressure sources each. In each pair, one of opposite pair of actuators is equipped with a slip sensor. The slip sensor is composed of a photo reflector and a conductive rubber sensitive to load force. The contact of the hand to an object is detected by the change of resistance of the conductive rubber. After the detection of touch, the slip velocity is measured by ca]culating the cross-correlation function of the output voltage waveforms of two photo transistors in the photo reflector. The grasping force of the hand is increased according to the measured slip velocity. The calculation of the crosscorrelation function and the generation of control signals are made in a host personal computer. From the experimental results of holding several objects, the hand system is proved to grasp suitably the object whose weight is previously unknown.

Design of a VMEbus-based programmable logic controller (PLC)

This paper presents an overall view of the architecture and design of a programmable logic controller (PLC). The main objectives of the work are to design, develop, and implement a versatile PLC processor module (PLCPM) based on an industrial open bus architecture called VMEbus (IEEE 1014 Versa Module Euro-standard). The controller is inserted inside the VME crate and controls the industrial process via input and output modules that reside in the crate. The PLCPM is designed to be an intelligent module through the use of a Motorola MC68000 CPU. A method of distributed arbitration protocol, based on an algorithmic state-machine design approach, is added to the design of this module. This facility makes PLCPM suitable to work inside a VMEbus environment. The PLCPM therefore becomes adequate for use in multiprocessing PLC systems. The controller uses a host personal computer (IBM-PC) as a versatile and indispensable system component for process development, monitoring, control and supervision. Software and firmware programs are developed and written for both host-PC and PLCPM using standard C-language and 68000 assembly language, respectively. This results in a sequential control algorithm for the PLCPM and windowing user interface for the host-PC. Ladder diagram programming language is supported by this user interface.

Application of discrete-event-system theory to flexible manufacturing

The anticipated extensive use of flexible-manufacturing workcells in the future has encouraged recent research efforts on the development of automatic supervisory-control methodologies. However, despite intensive research on the theoretical aspects of the control of manufacturing workcells, modeled as discrete-event systems (DES), a limited amount of research has been reported on the implementation of DES-based supervisory controllers. In this article, such a generalized implementation methodology, that utilizes theoretical advances in conjunction with programmable-logic-controller (PLC) technology, is presented. The two primary advantages of the proposed methodology are: (i) the utilization of limited-size control strategies that can be efficiently generated on-line, and which are conflict- and deadlock-free by construction (via controlled-automata DES theory); and (ii) the use of PLCs, which are currently the most suitable and widely employed industrial process-control technology. In the authors' proposed methodology, a host personal computer (PC) possesses an on-line capability for the automatic generation of supervisory-control strategies, and their downloading to a PLC as required. The PLC, in turn, is responsible for monitoring the workcell, reacting to events and enforcing device behavior based on the current control strategy residing in its processor. A supervisory controller developed based on this approach was successfully implemented for a manufacturing workcell in the authors' laboratory.

ワンボード・マイコンを利用した障害歩行診断のための無拘束長時間歩行モニタ

A microcomputer-based ambulatory monitor has been developed. This monitor utilizes a CMOS one-chip microprocessor (Toshiba Z 84 C 015-10), which has an Intel Z 80-compatible 8 bit CPU, two 8-bit parallel I/Os, four 8-bit counter/timers, and a fullduplex serial I/O. A general purpose min/max detector circuit has been designed to detect minimum and maximum values of a single-channel cyclic analog signal correlated to human gait. The analog signal fed to this circuit is converted to two logical pulses the width of which is proportional to the minimum and maximum values during one gait cycle. A logical signal which represents the gait cycle is also generated. These three logical signals are connected to three signal lines of a parallel port. Clock pulses of 100Hz and 10kHz are also generated and connected to three counters which convert pulse width or pulse cycle of the logical signals into corresponding digital representations of minimum, maximum, and cycle time of the gait-associated analog signal. The digital representations of 8,000 gait cycles can be stored in 32kbyte RAM, and retrieved from serial port via RS232C interface at a request from any host personal computer. The min/max detector circuit is assembled with DIP ICs, and contains a one-chip microcomputer, other peripheral circuits and a 006 P 9[v] battery, in a plastic box measuring 140(W)×80(H)×40(D)[mm]. The weight of the total monitor box is 120g. As one application of this ambulatory monitor, measurement of stride length and walking velocity was attempted. The absolute segmental angle of the thigh of one leg in the sagittal plain was detected by a piezoelectric gyroscope attached to the top of the knee. The angle signal was fed to the min/max detector circuit. Stride length was estimated from the absolute of this segmental angle by utilizing a simple mathematical model of biped locomotion. Walking velocity can be calculated from stride length and cycle time. The accuracy of the stride length and walking velocity was evaluated for 8 normal female, 11 normal male, 3 hemiplegic, and 3 A/K amputee subjects. The result was promising. Possible applications of this ambulatory monitor for assisting clinical decisions on patients with gait disabilities are discussed.

A flexible VLSI-based hardware system for medium-large-vocabulary real-time speech recognition

This paper is about a parallel and pipelined hardware system for real-time isolated speech recognition for medium-large Spanish vocabularies, based on Hidden Markov Models (HMMs). The system, relied on a VLSI circuit developed by the authors [1] that implements the Viterbi Algorithm, can keep-up with continuous input and is connected to a host Personal Computer. A software package controls the hardware and runs the user interface.

Real-time multichannel abdominal fetal ECG monitor using Digital Signal CoProcessor

A real-time multichannel fetal ECG monitor based on a personal computer (PC) and a MOTOROLA DSP56001 Digital Signal CoProcessor (DSP) is introduced. The DSP board is plugged into the PC, which functions as a HOST computer. An analog 8 Leads Interface and Analog to Digital circuits module is connected to the DSP through a synchronous, opticalisolated communication channel. The fetal ECG detection is based on a cross-correlation technique. An averaged maternal ECG waveform is generated using a cross-correlation alignment procedure and a user-defined template. The fetal ECG signals present in the maternal waveform is suppressed during the averaging procedure, since both are uncorrelated. The average maternal ECG waveform is then subtracted from the abdominal real time signals, and maternal-free fetal ECGs signals are obtained, including fetal QRS complexes that coincide with maternal ones. Using the abdominal ECGs signals after subtraction, an averaged fetal waveform is generated. The maternal and the fetal heart rate are calculated during the process. The algorithm described above can be performed in real time on up to eight abdominal ECG traces by the DSP, and the desired results are passed to the HOST PC, to be stored and displayed. Electrodes positioning procedures for detecting the fetal QRS complexes with the best signal to noise ratio are not needed. Using the multichannel system, the user can select the best channel for fetal QRS detection, and accurate results for the heart rate signal are obtained. Averaged fetal waveforms are obtained from all the leads.

Quantizer neuron model and neuroprocessor-named quantizer neuron chip

A quantizer neuron model and a hardware implementation of the model is described. A quantizer neuron model and a multifunctional layered network (MFLN) with quantizer neurons is proposed and applied to a character recognition system. Each layer of MFLN has a specific function defined by quantizer input, and the weights between neurons are set dynamically according to quantizer inputs. The learning speed of MFLN is extremely fast in comparison with conventional multilayered perceptrons using back propagation, and the structure of MFLN is suitable for supplemental learning with extraneous learning data sets. We tested the learning speed and compared it with three other network models: RCE networks, LVQ3, and multilayered neural network with back propagation. According to the simulation, we also developed a quantizer neuron chip (QNC) using two newly developed schemes. QNC simulates MFLN and has 4736 neurons and 2000000 synaptic weights. The processing speed of the chip achieved 20300000000 connections per second (GCPS) for recognition and 20 000 000 connection updates per second (MCUPS) for learning. QNC is implemented in a 1.2 /spl mu/m double-metal CMOS-process sea of gates and contains 27 000 gates on a 10.99/spl times/10.93 mm/sup 2/ die. The neuroboard, which consists of a main board with a QNC and a memory board for synaptic weights of the neurons, can be connected to a host personal computer and can be used for image or character recognition and learning. The quantizer neuron model, the quantizer neuron chip, and the neuroboard with QNC can realize adaptive learning or filtering.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

An automated digital beam profile system for ultrasonic transducer characterization

Abstract An automated digital beam profile system (ADBP) which uses feedback motion control and image processing techniques is presented. The system consists of a three-dimensional mechanical scanner, a host personal computer (PC), a PC plug-in pulser/receiver board, a PC plug-in digitizer board and a PC plug-in motor controller board. The powerful software package can automatically control and dynamically adjust the movement of a transducer to compensate for system mechanical discrepancy. It also combines the functions of a digital oscilloscope, a spectrum analyser, a digital gate, image formation and analysis tools to become a fully integrated transducer characterization system. Descriptions of the system software and hardware, testing procedures and results for a transducer are also included.

Modular set of analog neural blocks

This paper presents a proposal of a set of analog neural building blocks. This set consists of blocks of synapses, blocks of neurons and a control block. The advantage of such an approach is the possibility to connect synaptic blocks into a larger network (which is impossible when neurons and synapses are in one block). A programmable analog switch array has been used for construction of programmable synapses. Neurons have been modeled by CMOS inverters. Programming of synaptic weights, setting input vectors and reading the output are controlled by a host personal computer. The architecture of this model and its modular structure is supposed to be used for the design of special neural chips.

An Implementation of a Parallel Algorithm for Real-Time Model- Based Control on a Network of Microprocessors

Model-based trajectory control is a class of advanced manip ulator control strategies that are based on the kinematic and dynamic models of manipulators. Many schemes of model- based control have been proposed; however, most of them are limited within the stage of simulation study and very few have been installed on actual manipulators. The main reason is that the computations required for inverse dynamics are far beyond the ability of the present commercially available microprocessors. In order to achieve real-time high sample- rate control, we have proposed a parallel processing scheme for inverse dynamic computations that is called the resolved Newton-Euler algorithm. It resolves the process for computing the desired torques into subprocesses that have almost com plete concurrency. Because these subprocesses communicate with each other in a regular and local way, they can be di rectly mapped on a distributed processing network system. In this paper, we present a real-time parallel computation architecture for implementing the resolved Newton-Euler algorithm composed of a host personal computer and a net work of microprocessors and transputers. All programs are written in a high-level language, occam. This computation scheme is applied to the trajectory control of the PUMA 560 manipulator. Our controller achieves the sampling period of 0.66 ms.

A versatile dual axis programmable stepping motor controller for a personal computer: a specific application and tutorial for implementing a computer-controlled light microscope

A simple programmable stepping motor circuit for controlling two independent stepping motors has been designed. The circuit is compatible with the IBM personal computer and needs only slight modification to work with virtually any other microcomputer. The motors can either be programmed by the host personal computer for remote operation, controlled directly by a joystick interface provided in the circuit, or a combination of the two procedures. Independent microprocessors control each stepping motor and can be easily programmed by the host computer via Input/Output ports designed into the circuit. A basic understanding of the circuit demonstrates some commonly used techniques for controlling microcomputer electronics through computer programming. The circuit will likely have many uses, although the implementation of a computerized microscope is explicitly described. The circuit is currently used in a neuroanatomical and neurochemical computer charting system at the University of Iowa.

ECOLOG II: a real-time acoustic signal processing system for fish stock assessment

A new real-time signal processing sonar system (ECOLOG II) has been developed. Even though the system is compact it is capable of performing in real time all basic functions required for acoustic fisheries stock assessment, including simultaneous echo integration and target strength estimation. The system incorporates a precision echo sounder and a powerful internal processor connected to a host personal computer workstation. The system is flexible so that the same hardware may be used for various operating modes. All user control and operation of the sounder/processor is done with the host workstation. The workstation also provides post processing, data storage and various graphics presentation of output data.

A speech synthesizer for Mandarin Chinese

The design and implementation of a linear predictive coding (LPC) speech synthesizer using a general-purpose floating-point 32-bit digital signal processing (DSP) chip for Mandarin Chinese are described. The hardware synthesizer board consists of a plug-in card which can be installed in a personal computer (PC). The software consists of a hand-optimized DSP assembly program which can be downloaded from the host PC to the synthesizer RAM for real-time speech synthesis. Computer programs in Pascal have also been developed to extract the ten reflection coefficients, pitch, and gain values for the LPC synthesizer. A database of LPC parameters comprising the 56 Mandarin phonemes and the four standard pitch contours corresponding to the four lexical tones of monosyllabic Mandarin has also been created for the synthesizer. >

Programmable instrumentation for high repetition rate experiments providing control in real time and acquisition of a train of pulses

An automated, low-cost programmable instrumentation system which solves many of the problems associated with the data acquisition and control of high repetition rate experiments is described. The system can monitor and control experiments on a pulse-by-pulse basis while digitally storing consecutive pulses which occur in the train. The system compares well with manual test equipment and commercial transient diagnostic systems which cannot provide the high-speed control and data acquisition available here. The oscilloscope used to store the train of pulses can digitize at a maximum rate of 100 MHz, and has 32 kbytes of acquisition memory that can be subdivided into a sequence of as many as 250 separate segments. In order to reduce the system software reinitialization time to acquire each successive sequence within the total train, a novel IEEE-488 compatible microprocessor system is used in conjunction with a host personal computer. The microprocessor controls triggering of the experimental equipment based on digitally acquired waveform information. This information is also used to coordinate the reinitialization of the oscilloscope by the host computer. The system can acquire each and every pulse at repetition rates up to 40 Hz. Above this rate, the probability of acquiring a particular pulse in the train falls slightly below unity due to the finite time required to reinitialize the oscilloscope. The maximum synchronously controllable pulse repetition rate of the microprocessor is 20 000 Hz. Minimum performance specifications are provided which are significantly better than other approaches. The system is employed in high-voltage, dielectric breakdown experiments. For the example given, there are 62 segments in the acquired sequence, with a 100-MHz digitizing rate during the 5-μs acquisition time for each segment. The breakdown pulse in the train and as many as 61 pulses preceding it are obtained.

The Unix system user's manual: AT&T Prentice-Hall (1986) £32.05, pp 646

This paper presents an overall view of the architecture and design of a programmable logic controller (PLC). The main objectives of the work are to design, develop, and implement a versatile PLC processor module (PLCPM) based on an industrial open bus architecture called VMEbus (IEEE 1014 Versa Module Euro-standard). The controller is inserted inside the VME crate and controls the industrial process via input and output modules that reside in the crate.The PLCPM is designed to be an intelligent module through the use of a Motorola MC68000 CPU. A method of distributed arbitration protocol, based on an algorithmic state-machine design approach, is added to the design of this module. This facility makes PLCPM suitable to work inside a VMEbus environment. The PLCPM therefore becomes adequate for use in multiprocessing PLC systems.The controller uses a host personal computer (IBM-PC) as a versatile and indispensable system component for process development, monitoring, control and supervision. Software and firmware programs are developed and written for both host-PC and PLCPM using standard C-language and 68000 assembly language, respectively. This results in a sequential control algorithm for the PLCPM and windowing user interface for the host-PC. Ladder diagram programming language is supported by this user interface.

The Unix system user's handbook: AT&T Prentice-Hall (1986) £14.74, pp 98

This paper presents an overall view of the architecture and design of a programmable logic controller (PLC). The main objectives of the work are to design, develop, and implement a versatile PLC processor module (PLCPM) based on an industrial open bus architecture called VMEbus (IEEE 1014 Versa Module Euro-standard). The controller is inserted inside the VME crate and controls the industrial process via input and output modules that reside in the crate.The PLCPM is designed to be an intelligent module through the use of a Motorola MC68000 CPU. A method of distributed arbitration protocol, based on an algorithmic state-machine design approach, is added to the design of this module. This facility makes PLCPM suitable to work inside a VMEbus environment. The PLCPM therefore becomes adequate for use in multiprocessing PLC systems.The controller uses a host personal computer (IBM-PC) as a versatile and indispensable system component for process development, monitoring, control and supervision. Software and firmware programs are developed and written for both host-PC and PLCPM using standard C-language and 68000 assembly language, respectively. This results in a sequential control algorithm for the PLCPM and windowing user interface for the host-PC. Ladder diagram programming language is supported by this user interface.