Hole Tunneling Current Research Articles

Effects of reduced internal electric field in InGaN/pseudo-AlInGaN multi-quantum-well on forward leakage current and photocurrent properties

The main focus of this work is to find the effects of the internal electric field on the forward leakage current and photocurrent of an InGaN/pseudo-AlInGaN multi-quantum-well (MQW) grown on sapphire substrate using metalorganic chemical vapor deposition. The temperature dependent current-voltage characteristics of an InGaN MQW with and without an AlInGaN barrier (sample A = GaN barrier, sample B = Al0.043In0.036Ga0.921N barrier, sample C = Al0.043In0.052Ga0.905N) exhibit two linearly dependent divisions with different slopes at low (1.0 ≤ V ≤ 1.4) and medium (1.6 ≤ V ≤ 2.5) bias regions in the 250–300 K range. The temperature-insensitive behavior of the characteristic energy and large ideality factors mean that tunneling is the dominant process in the three samples. Distinct tunneling entities at low and medium biases are observed for samples A and B; however, for sample C, thermionic emission gain dominance in the medium bias range. The peculiar behavior in sample C is attributed to suppressed hole-tunneling currents caused by a low internal electric field. Photocurrent experiments using a xenon lamp demonstrate that sample C exhibit higher photocurrent characteristics and that the enhanced photocurrent is due to a reduced internal electric field. The low internal electric field generates a large amount of photo-excited carriers, which cross the potential of QW effectively compared to the conventional GaN barrier.

Threshold Voltage Instability in p-GaN Gate AlGaN/GaN HFETs

We investigate the impact of the gate contact on the threshold voltage stability in p-GaN gate AlGaN/GaN heterojunction field-effect transistors with double pulse measurements on the p-GaN gate devices and device simulations. We find that, under gate stress, in the case of high-leakage Schottky contact, a negative threshold voltage shift results from hole accumulation in the p-GaN region. Conversely, in the case of low-leakage Schottky contact, hole depletion in the p-GaN region gives rise to a positive threshold voltage shift. More generally, we show that an imbalance between the hole tunneling current through the Schottky barrier and the thermionic current across the AlGaN barrier results in a variation of the total charge stored in the p-GaN region, which in turn is responsible for the observed threshold voltage shift. Finally, we present a simplified equivalent circuit model for the p-GaN gate module.

BOEMDET-Band Offsets and Effective Mass Determination Technique applied to MIS devices on silicon to obtain the unknown bandgap of insulators

The Fowler-Nordheim carrier tunneling slope constants for electron and hole conduction through MOS devices fabricated on silicon substrate can be utilized to determine the conduction and valence band offsets, carrier effective masses in the SiO2 and its unknown bandgap, independent of photoemission spectroscopic measurements of band offsets on SiO2/Si samples. The slope constants can be obtained from the electron and hole tunneling currents versus oxide voltage characteristics on a pair of n-MOS and p-MOS devices in accumulation. This characterization technique called BOEMDET, can be applied to other insulating materials grown or deposited on silicon, such as jet vapor deposited (JVD) nitride, HfSiON, SiOxNy, AlN, BN, high-K oxides, and transparent conducting oxides (TCO).

BOEMDET-Band Offsets and Effective Mass Determination Technique utilizing Fowler-Nordheim tunneling slope constants in MIS devices on silicon

The Fowler-Nordheim carrier tunneling slope constants for electron and hole conduction through MOS devices fabricated on silicon substrate are utilized to determine the conduction and valence band offsets, carrier effective masses in the SiO2 and its unknown bandgap, independent of photoemission spectroscopic measurements of band offsets on SiO2/Si samples. The slope constants are obtained from the electron and hole tunneling currents versus voltage characteristics on a pair of n-MOS and p-MOS devices in accumulation or an n-channel MOSFET device in inversion that allows carrier separation. This characterization technique called BOEMDET, can be applied to other insulating materials grown or deposited on silicon, such as JVD nitride, HfSiON, SiOxNy, and high-K oxides found viable for future MOS technology. To an accuracy of one decimal place, the conduction band offset for the SiO2/Si MIS structure is determined to be 3.2 eV, the valence band offset obtained is 4.6 eV and the bandgap of SiO2 is found to be 8.9 eV. The electron and hole effective masses in the SiO2 are calculated to be 0.42m and 0.58m, where m is the free electron mass. In case of quantum confinement at the SiO2/Si interface, the electron and hole masses correct to 0.51m and 0.65m. Also, the carrier effective masses in thermal SiO2 are found to be the same for all thickness of the oxide. Keywords: effective mass, FN-tunneling, band offsets, metal-insulator-semiconductor

Reduced Gate-Leakage Current and Charge Trapping Characteristics of Dysprosium-Incorporated $\hbox{HfO}_{2}$ Gate-Oxide n-MOS Devices

The higher effective barrier height of Dy <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> , which is around 2.32 eV calculated from the Fowler-Nordheim plot, accounts for the reduced leakage current in Dy-incorporated HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> n-type metal-oxide-semiconductor devices. The lower barrier height of HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> characterizes the increasing electron-tunneling currents enhanced by the buildup of hole charges trapped in oxide, which causes a severe increase in the stress-induced leakage current (SILC), leading to oxide breakdown. However, the increased barrier height in Dy-incorporated HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> inhibits a further increase in the electron tunneling from the TaN gate, and trapped holes lessen the hole-tunneling currents, resulting in a negligible SILC. The lower trap generation rate by the reduced hole trap density and the reduced hole tunneling of the Dy-doped HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric demonstrate the high dielectric-breakdown strength by weakening the charge trapping and the defect generation during the stress.

Electron and hole components of tunneling currents through an interfacial oxide-high-k gate stack in metal-oxide-semiconductor capacitors

Two different components of tunneling current in the TiN/HfSiOxN/SiO2/p-Si(100) metal-oxide-semiconductor capacitor have been presented. The tunneling currents were calculated by taking into account a longitudinal-transverse kinetic energy coupling. The calculated tunneling currents were compared with that measured ones by employing the electron and hole effective masses and phase velocities as fitting parameters. It has been shown that hole tunneling currents dominate at low voltages whereas at high voltages the tunneling currents are mainly contributed by electrons. It has also been found that the effective mass of hole in the HfSiOxN layer is higher than that of electron. The gate electron and substrate hole velocities are 1×105 m/s independent of the HfSiOxN thickness. In addition, it is speculated that the electron and hole effective masses in the HfSiOxN layer perhaps increase as its thickness decreases.

NBTI and hot carrier effect of Schottky-barrier p-MOSFETs

The experimental investigation of NBTI and hot carrier induced device degradation in Pt-silicided Schottky-barrier p-MOSFETs has been performed. The investigations on the threshold voltage shifts, the degradation of inverse subthreshold slope, and the decrease of I ON / I OFF ratio have been carried out using the modulation of Schottky-barrier height and width. After NBTI and hot carrier stress, the decrease of I ON could be explained by the lower hole tunneling current through the more increased Schottky-barrier height and the increased I OFF could be explained by the increase of the amount of electron thermal emission and tunneling through thinner Schottky-barrier into the near drain. After hot carrier stress, it is observed that the threshold voltage shifts to more negative values for all stress gate voltages and the drain current is decreased. The device degradation is more significant as the stress gate voltage decreases.

Study of the Effects of the Antisite Related Defects in Silicon Dioxide of Metal-Oxide-Semiconductor Structure on the Gate Leakage Current

The effects of the antisite related defects on the electronic structure of silica and the gate leakage current have been investigated using first-principles calculations. Energy levels related to the antisite defects in silicon dioxide have been introduced into the bandgap, which are nearly 2.0 eV from the top of the valence band. Combining with the electronic structures calculated from first-principles simulations, tunneling currents through the silica layer with antisite defects have been calculated. The tunneling current calculations show that the hole tunneling currents assisted by the antisite defects will be dominant at low oxide field whereas the electron direct tunneling current will be dominant at high oxide field. With increased thickness of the defect layer, the threshold point where the hole tunneling current assisted by antisite defects in silica is equal to the electron direct tunneling current extends to higher oxide field.

First-principles study of the effects of oxygen vacancy on hole tunneling current

The effects of oxygen vacancies on the electronic structure of silicon dioxide and the hole tunneling current were investigated using first-principles calculations. A level related to oxygen vacancy was obtained to be nearly 2.0 eV from the top of valence band within the bandgap of the α-quartz supercell with one oxygen vacancy. And therefore the defect assisted hole (electron) tunneling currents were calculated. The results shows that the hole tunneling current will be dominant for a thinner oxide thickness at low oxide field and the contribution of trap assisted hole tunneling to the total tunneling current decreases with oxide thickness and oxide field increasing. It is concluded that the effects of the oxygen vacancies on the hole tunneling current become smaller with larger oxide thickness and higher electric field.

Strain-induced changes in the gate tunneling currents in p-channel metal–oxide–semiconductor field-effect transistors

Changes in the direct gate tunneling current are measured for strained p-channel metal–oxide–semiconductor field-effect transistors (MOSFETs) on (100) wafers for uniaxial and biaxial stress. Decreases/increases in the gate tunneling current for various stresses primarily result from repopulation into a subband with a larger/smaller out-of-plane effective mass. Strain-induced changes in the valence band offset between Si and SiO2 are also important but play a secondary role. Hole tunneling current is found to decrease for biaxial and uniaxial compressive stress and increase for biaxial tensile stress. The hole tunneling data is modeled using k∙p self-consistent solution to Poisson and Schrödinger’s equation, and a transfer matrix method.

Deep hole trapping effects in the degradation mechanisms of 6.5–2 nm thick gate-oxide PMOSFETs

Hot-carrier (HC) degradation in PMOSFETs with thin ( T ox=2 nm) and thick (6.5 nm) gate-oxides are investigated as they show very different damage mechanisms when electrons or holes are involved. It is shown for the first time that hot-hole currents are now directly measured through a thermionic gate-current in T ox=6.5 nm devices which is limited to hole tunneling currents in high speed (HS) and low leakage (LL) devices with T ox=2 nm. This is explained by the increase in the surface doping and thinner junction depths which push the HC generation rate shallower to the surface. Results show that injected holes worsen the HC damage in thin and thick gate-oxides PMOSFETs as electrons with a higher mobility quickly tunnel or detrap through a field assisted detrapping mechanism. This is distinguished by the effects of the interface trap generation, the permanent hole trapping and the hole charging discharging on slow traps using alternated stressing. This consequently leads to a significant resistance against HC degradation in 2 nm HS, LL devices with respect to 6.5 nm devices which is explained by the dominant effect of hole discharge from bulk and slow traps in 2 nm devices at the tunneling distance of the interface leaving the dominant effect of interface traps at long term.

Substrate bias dependence of breakdown progression in ultrathin oxide pMOSFETs

Negative substrate bias-enhanced oxide breakdown (BD) progression in ultrathin oxide (1.4 nm) pMOS is observed. The enhanced progression is attributed to the increase of hole-stress current resulting from BD-induced, channel-carrier heating. The carrier temperature extracted from the spectral distribution of hot-carrier luminescence is around 1300 K. The substrate bias dependence of post-BD hole-tunneling current is confirmed from measurement and calculation. The observed phenomenon is particularly significant to ultrathin gate oxide reliability in floating substrate (SOI) and forward-biased substrate devices.

Investigation of hole-tunneling current through ultrathin oxynitride/oxide stack gate dielectrics in p-MOSFETs

The systematic investigation of hole tunneling current through ultrathin oxide, oxynitride, oxynitride/oxide (N/O) and oxide/oxynitride/oxide (ONO) gate dielectrics in p-MOSFETs using a physical model is reported for the first time. The validity of the model is corroborated by the good agreement between the simulated and experimental results. Under typical inversion biases (|VG|<2 V), hole tunneling current is lower through oxynitride and oxynitride/oxide with about 33 at.% N than through pure oxide and nitride gate dielectrics. This is attributed to the competitive effects of the increase in the dielectric constant, and hence dielectric thickness, and decrease in the hole barrier height at the dielectric/Si interface with increasing with N concentration for a given electrical oxide thickness (EOT). For a N/O stack film with the same N concentration in the oxynitride, the hole tunneling current decreases monotonically with oxynitride thickness under the typical inversion biases. For minimum gate leakage current and maintaining an acceptable dielectric/Si interfacial quality, an N/O stack structure consisting of an oxynitride layer with 33 at.% N and a 3 /spl Aring/ oxide layer is proposed. For a p-MOSFET at an operating voltage of -0.9 V, which is applicable to the 0.7 /spl mu/m technology node, this structure could be scaled to EOT=12 /spl Aring/ if the maximum allowed gate leakage current is 1 A/cm/sup 2/ and EOT=9 /spl Aring/ if the maximum allowed gate leakage current is 100 A/cm/sup 2/.

Hole tunneling current through oxynitride/oxide stack and the stack optimization for p-MOSFETs

A systematic study on hole-tunneling current through both oxynitride and oxynitride/oxide (N/O) stack is for the first time presented based on a physical model. The calculations are in good agreement with the available experimental data. With a given equivalent oxide thickness (EOT), and under typical operating gate voltages (|Vg|<2 V), hole-tunneling current (essentially the gate current) is found to be lowest through the oxynitride or N/O stack with /spl sim/33% of nitrogen (N). An optimized N/O stack structure with 33% (atomic percentage) nitrogen and with a 3 /spl Aring/ oxide layer for keeping acceptable channel interface quality is proposed to project the N/O gate dielectrics scaling limit using in MOSFETs.

Fully Quantum-Mechanical Calculation of Hole Direct Tunneling Current in Ultrathin Gate Oxide p-Channel Metal-Oxide-Semiconductor Devices

The hole direct tunneling currents through ultrathin gate oxides have been calculated quantum-mechanically for not only bulk but also silicon-on-insulator (SOI) p-channel metal-oxide-semiconductor field-effect transistors (pMOSFETs) with p+-polysilicon gates. In this work, the coupled Schrödinger and Poisson equations are solved self-consistently taking into account the wave-function penetration into the gate oxide and gate electrode completely. For bulk pMOSFETs, the experimental verification of the calculated hole tunneling current has been presented, and the effects of the wave-function penetration on quantization in the substrate have also been investigated. The hole tunneling currents in SOI pMOSFETs have been examined for various SOI layer thicknesses. Moreover, the quantum-mechanical effects on the tunneling current in ultrathin SOI pMOSFETs are discussed in detail.

Programming characteristics of p-channel Si nano-crystal memory

In this work, the programming characteristics of a p-channel nano-crystal memory is studied. The hole tunneling component from the inversion layer and the electron tunneling component from the valence band in the nano-crystal were separated successfully by independent measurement of the current at the body terminal and at the source/drain terminal of the memory. For small gate voltage, the hole tunneling current is dominant during programming. However, for large programming voltage, the valence band electron tunneling from the dot into the substrate becomes dominant. Finally, the comparison of retention characteristics between programmed holes and electrons shows that holes have longer retention time.

Fowler–Nordheim tunneling of holes through thermally grown SiO2 on p+ 6H–SiC

Fowler–Nordheim tunneling of holes through thermally grown silicon dioxide on 6H–silicon carbide is reported. Oxides of 5.2, 10, and 14.2 nm thickness were grown on the p+ face of a p+n SiC junction. The p+n junction served to separate the electron and hole tunneling currents. Hole tunneling was found to be the dominant current mechanism through the oxide. Fowler–Nordheim analysis, using a parabolic E–K relationship, was performed to extract a barrier height–effective mass product, ΦB3/2(mox/m0)1/2, for electrons and holes of 2.88%±4.9% and 2.38%±3.8% (V3/2) respectively. An estimate for the effective mass of holes within the oxide was made using both the parabolic and Franz dispersion relations.

Dependence of the I-V curve of a metal insulator semiconductor switch on insulator thickness-an experimental and theoretical investigation

Although the metal insulator semiconductor switch (Al/SiO/sub 2//n-Si/p-Si) has been investigated for quite some time, there has been no systematic report on the influence of the oxide thickness on the current-voltage (I-V) curve. We fabricated four types of metal insulator semiconductor switches where the only intentional difference was the thickness of the oxide. We observed, both experimentally and by simulation, that the I-V curves of these devices are very sensitive to the oxide thickness. While the simulated curves only agree with the measured ones in certain trends, the simulation provides some insight to the operation of the device. The onset of the negative resistance region in the curve is so sensitive to the electron and hole tunneling currents that the these devices could be used to characterize ultrathin oxides. Extremely high current densities (10/sup 3/ A/cm/sup 2/) have been driven through the ultrathin oxides without significantly changing the device characteristics. We believe this is the highest, steady-state, current density through an oxide reported to date.

Determination of electroaffinity and ionization potential of conjugated polymers via Fowler–Nordheim tunneling measurements: Theoretical formulation and application to poly(p-phenylene vinylene)

In this paper we present a method to obtain the electroaffinity and the ionization potential of conjugated polymers via Fowler–Nordheim tunneling current measurements. The method allows the measurement of the electroafinity and ionization potential for a sandwich type device, where the barriers at both sides of the polymer are different. The advantage of this method is that barrier height, the electroaffinity, and the ionization potential are obtained independent of the polymer film thickness and the electron (or hole) effective mass. We have used the proposed methodology to obtain the barrier heights and electroaffinity of poly (p-phenylene-vinylene) (PPV) in Metal/Polymer/Metal sandwich structures. For the present case the electrodes (Al/Au, Al/Ga, Al/In, Al/Sn) used lead only to electron and not hole tunneling current, thus only the electroaffinity has been obtained. The experimental value for the electroaffinity of PPV is of 3.87±0.04 eV.

Optical switching mechanism based on charge accumulation effects in resonant tunneling diodes

We have identified the charge accumulation effects in a resonant tunneling diode for the application of optical switching by observing the hole tunneling peak under illumination with a Ti:sapphire laser. Two mechanisms, photocurrent and charge accumulation, are rigorously examined to determine which one is the dominant effect for optical switching by comparing the current–voltage (I–V) characteristics for forward biases and reverse biases. It is believed that the hole accumulation effect in the depletion region, which results in the hole tunneling current, is responsible for the shift of the I–V curves.