High Thermal Reliability Research Articles

Multiobjective Microarchitectural Floorplanning for 2-D and 3-D ICs

This paper presents the first multiobjective microarchitectural floorplanning algorithm for high-performance processors implemented in two-dimensional (2-D) and three-dimensional (3-D) ICs. The floorplanner takes a microarchitectural netlist and determines the dimension as well as the placement of the functional modules into single- or multiple-device layers while simultaneously achieving high performance and thermal reliability. The traditional design objectives such as area and wirelength are also considered. The 3-D floorplanning algorithm considers the following 3-D-specific issues: vertical overlap optimization and bonding-aware layer partitioning. The hybrid floorplanning approach combines linear programming and simulated annealing, which is shown to be very effective in obtaining high-quality solutions in a short runtime under multiobjective goals. This paper provides comprehensive experimental results on making tradeoffs among performance, thermal, area, and wirelength for both 2-D and 3-D ICs

Bumpless interconnect of ultrafine Cu electrodes by surface activated bonding (SAB) method

AbstractIn this study, an ultrafine bumpless interconnect was realized by applying the surface activated bonding (SAB) method to the room‐temperature direct bonding of Cu electrode, and its electrical performance was verified. Also, a thin flash memory chip and a Si interposer were interconnected with the bumpless structure to demonstrate its applicability to practical devices. We used the combination of the damascene process and RIE (reactive ion beam etching) process to fabricate bumpless electrodes with a diameter of 3 µm, pitch of 10 µm, and height of 60 nm, and bonded them with a highly accurate SAB flip chip bonder. One hundred thousand fabricated bumpless electrodes were successfully interconnected, and we showed that the contact resistance could be less than 1 mΩ with high thermal reliability at the interface. Also, we developed a fabrication process of bumpless electrodes that has a polyimide insulation layer by the combination of oxygen plasma ashing and CMP (chemical mechanical polishing), and applied it to the interconnection between a 0.1‐mm‐thick flash memory chip and an interposer with the same thickness. The bonded memory chip was assembled into a compact flash (CF) memory card module, and the entire memory region was successfully verified. © 2006 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 89(12): 34–42, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.20247

High‐performance substrate from new epoxy resin and enhanced copper foil

The Dow Chemical Company has developed a new epoxy‐based system to serve the growing need for high‐performance dielectric substrates, requiring high thermal reliability (high Tg, high thermal resistance) and high signal speed and integrity (low dielectric constant and low loss factor). The system is based on advanced, proprietary resin technologies. The process latitude of this system is very similar to traditional high Tg FR‐4 products. The optimized rheology of the system leads to consistent, controlled flow. The copper foil JTCHTEAB from Gould Electronics, where AB stands for advanced bond, is interesting in this context as it was developed for use on high‐performance laminates with a typically lower ability for copper bonding, such as high Tg and low Dk/Df substrates. When the “LDk‐HTd” resin is used in combination with the JTCHTEAB copper foil, the copper peel strength fully meets the industry standard for high Tg FR‐4 laminates.

Non-contact current measurement system using SQUID

We have developed a non-contact current measurement system, which converts magnetic flux distribution measured with high sensitivity using DC-SQUID into current distribution. The DC-SQUID is composed of Nb/AlO x /Nb junctions with high thermal reliability, and a pickup coil. The diameter of the pickup coil and the standoff distance between the DC-SQUID and samples, which are important parameters for the spatial resolution, are respectively 200 and 500 μm . The spatial resolution is 200 μm and the current noise density calculated from the magnetic noise is 6.8 nA/ Hz . We have applied the system to a solar cell to visualize the area, which does not generate electrical power.