High-resistivity Silicon Substrate Research Articles

The Role of Oxygen on Defects Formation during Advanced Silicon Process Technologies

Impact of oxygen in silicon substrates and the formation of oxide precipitates have been widely studied in the past because of the detrimental electrical recombination and its effect on yield [1,2]. The origin of interstitial oxygen (Oi) is not only limited to the substrate but also comes from the nature of the oxide that may be deposited on it [3]. Interstitial oxygen plays a direct role in the formation of bulk microdefects (BMDs) resulting from oxygen precipitation during low-temperature Front-End anneals at 650-800°C [4,5]. The latter are of interest for the mechanical robustness of substrates, contributing to the pinning of slip lines (SL) and for the reliability of devices thanks to an internal gettering effect, but can also be harmful by emitting dislocations when they are too numerous (> 1 x 1010 BMD.cm-3) [5, 8].In this paper, we have reviewed the different impacts of interstitial oxygen on silicon substrates during thermal annealing through 3 phenomena: (i) the influence of Oi on the reduction of the slip lines by the pinning effect, (ii) the formation of BMDs induced by Oi and their interactions with dopants during implantation processes, (iii) the BMDs limited formation in the specific case of high resistivity (HR) silicon substrates. We focused on standard and high resistivity silicon substrates obtained by Czochralski (CZ) method, used in advanced technologies for various applications (digital, bipolar, power, photonic, etc.).To highlight the impact of interstitial oxygen, firstly on the mechanical properties of substrates, we studied the same p-type silicon substrates with two ranges of Oi concentration (5.33 x 1017 and 7.23 x 1017 at.cm-3), both annealed by furnace oxidation below 1000°C and N2 annealing above 1000°C. Figure 1 clearly shows the effect of a minor difference in Oi concentration on the number of slip lines detected by Pattern Wafer Geometry (PWG) measurements (Figure 2). Despite extrinsic process parameters to consider in the occurrence of slip lines, these results demonstrate the enhancement of slip line pinning by interstitial oxygen.Bulk microdefects in silicon are known to interact with dopants [6]. To investigate this point, we compared the BMD occurrence in non-implanted and antimony-implanted (2 x 1015 at.cm-2) silicon substrates using micro-photoluminescence imaging. These substrates contain relatively high Oi concentrations (up to 6.7 x 1017 at.cm-3) and have been subjected to oxidation and rapid thermal annealing (RTA) above 900°C. After adjusting for background contrast in the implanted and non-implanted regions, Figure 3 shows different trends in BMD density evolution as a function of the probed depth. We assume that a mechanism based on a mechanical stress field induced by the position of the Sb-implanted atoms in the lattice limits the nucleation of oxide precipitates [7]. However, further characterization methods are required to confirm the influence of dopants on the BMD density.Finally, high resistivity silicon substrates are being considered to significantly improve devices performance, particularly in high frequency and photonics applications [8, 9]. However, the understanding of BMD formation is poorly documented in the literature. These CZ-Si substrates are characterized by low oxygen content (< 3 x 1017 at.cm-3) and low boron dopant concentration (< 1 x 1014 at.cm-3). At such low values, the expected oxygen precipitation is very different from that of standard p-type silicon [8, 10]. We investigated the effect of these parameters on BMD formation through precipitation thermal treatments (N2 + O2 anneal > 1000°C). Figure 4 illustrates the important difference in BMD formation depending on the substrate characteristics (standard resistivity high-Oi versus high resistivity low-Oi silicon) after the same thermal treatment. BMD defects were generated in large quantities in standard silicon (3 x 109 BMD.cm-3), whereas no BMDs were observed in HR silicon.In summary, we have demonstrated the impact of interstitial oxygen (coming from substrates and processes) on defect generation, particularly BMD, in silicon technology. In controlled proportions, they play an important role in the proper functioning of devices and very often result from the fine tuning between substrate characteristics and process conditions.[1] Jun Fujise et al 2018 JJAP. 57 035501[2] Zijing Wang et al 2022 APE 15 071004[3] G. Kissinger et al 2019 ECS J3ST. 8 N79[4] Maria Porrini et al 2018 ECS Trans. 86 7[5] Hirofumi Shimizu et al 1985 JJAP. 24 815[6] Hideki Tsuya et al 1983 JJAP. 22 L1[7] Oleksandr Oberemok et al 2014 PSS. 11 163439[8] Isabelle Bertrand et al 2022 ECS Trans. 31 108[9] Jarosław Judek et al 2017 JEM. 46 5589-5592[10] Kaoru Kajiwara et al 2019 PSS. 17 216 Figure 1

Design, fabrication and testing of Al/p-Si Schottky and pn junctions for radiation studies

Strip and pixels sensors, fabricated on high resistivity silicon substrate, normally of p-type, are used in detectors for High Energy Physics (HEP) typically in a hybrid detector assembly. Furthermore, and owing to their inherent advantages over hybrid sensors, Monolithic Active Pixel Sensors (MAPS) fabricated in CMOS technology have been increasingly implemented in HEP experiments. In all cases, their use in higher radiation areas (HL-LHC and beyond) will require options to improve their radiation hardness and time resolution. These aspects demand a deep understanding of their radiation damage and reliable models to predict their behaviours at high fluences. As a first step, we fabricated several Schottky and n-on-p diodes, to allow a comparison of results and provide a backup solution for test devices, on 6 or 4-inch p-type silicon wafers with 50 μm epitaxial thickness and of doping concentration as they are normally used in HEP detectors and CMOS MAPS devices. In this paper, details of the design and fabrication process, along with test results of the fabricated devices before irradiation, will be provided. Additional test results on irradiated devices will be provided in subsequent publications.

Fabrication and characterization of delay lines with spoof surface plasmon polariton waveguide coupled with C-shaped metamaterials for microwave integrated circuits

Abstract Here, we proposed two delay lines consisting of spoof Surface Plasmon Polariton (sSPP) waveguides and C-shaped metamaterials (C-MMs). The delay lines, namely OFF and ON devices, were designed and fabricated. On the OFF device, an sSPP waveguide is capacitively coupled to the C-MMs via an air gap on a high-resistivity silicon substrate. On the ON device, a connection is established between the C-MMs and the sSPP waveguide by metal connectors. The difference in the electrical properties in the coupling between the C-MMs and the sSPP waveguide creates a large phase contrast between the ON and OFF delay lines. The structural design was performed using a numerical calculation based on a commercial finite element solver. We successfully fabricated and characterized delay lines with phase differences equal to tens of degrees between the ON and OFF devices in the target frequency range of 2-6 GHz, while maintaining the original transmittance properties. The promising applications of the delay lines are a phase shifter or modulator when integrating with suitable switches.

Noise spectrum analysis of superconducting kinetic inductance detectors

As a newly developed pair-breaking superconducting detector, microwave kinetic inductance detectors are simple to integrate in the frequency domain and have already been used in astronomical detection and array imaging at the (sub)millimeter and optical wavelengths. For these applications, the dark noise level of kinetic inductance detector is one of the key performance indicators. Herein a noise power spectrum analysis method is introduced in detail, which can accurately and effectively analyze the noise spectrum of kinetic inductance detector in a wide frequency range. This method can well balance the noise spectrum resolution and variance performance, by taking the noise data at the resonance frequency with two sampling rates and setting the appropriate frequency resolutions for different frequency bands. This method is used to characterize and compare the noise of aluminum (Al) kinetic inductance detectors made from two different micromachining processes. We deposite a 25-nm-thick aluminum film on high-resistivity silicon substrate for one device, while place one silicon nitride (SiN&lt;sub&gt;&lt;i&gt;x&lt;/i&gt;&lt;/sub&gt;) film on the top and one on the bottom of the aluminum film for another device. It is found that the frequency noise of the device with two silicon nitride films is about 25% to 50% of the bare aluminum device. Using this double silicon nitride film fabrication technique, we further fabricate a few groups of lumped-element aluminum kinetic inductance detectors with various inductor and interdigitated capacitor designs. We investigate the noise properties of these devices at different microwave driven power and bath temperatures, and the experimental results show typical two-level system noise behaviors. Our work provides a standard method to characterize the noise power spectrum of kinetic inductor detector, and also paves the way to developing low-noise aluminum kinetic inductance detectors for terahertz imaging, photon-counting and energy-resolving applications.

A Ka-Band Silicon-Based Antenna-in-Package Design Using Characteristic Mode Analysis for Bandwidth Enhancement

With the emergence of 5G and satellite communication applications, where millimeter-wave (mm-wave) active phased arrays play an important role, the demand for a highly integrated and cost-effective method to achieve mm-wave antennas is an inevitable trend. Antenna-in-package (AiP) design is therefore becoming a hotspot. This paper presents the design procedure for a broadband silicon-based stacked patch antenna in Ka-band, which realizes a practical AiP structure for phased-array module integration requirements. A stacked-patch antenna on a high-resistivity silicon (HRSi) substrate is demonstrated to effectively extend the bandwidth with the guidance of characteristic mode analysis (CMA).The proposed antenna element and its 2 × 2 array were designed and fabricated using silicon bulk micromachining and wafer-level bonding technology. The measured results from the fabricated antenna prototypes showed that (1) the antenna element had an impedance bandwidth of 13.8% from 26.2 to 30.1 GHz, and the peak gain was 6.1 dBi at 28.9 GHz; (2) the 2 × 2 array realized an impedance bandwidth of 11.4% from 27.2 to 30.5 GHz, and the peak gain was 9.3 dBi at 28.5 GHz.

Electronic structure of thin epitaxial Be films on Si(111)

We show that single crystal films of Be can be grown on Si(111) substrates, exhibiting nearly identical surface electronic bandstructure to that found on the pristine Be(0001) surface of bulk Be. Segregation of silicon atoms into the film causes strong doping of the surface states. For sufficiently thin films, the quality and uniformity are sufficient to observe well-defined quantum well states. In addition to making single-crystal beryllium more accessible for future studies, thin film growth of beryllium on high-resistivity silicon substrates may open up new possibilities to investigate earlier suggestions of surface superconductivity.

Compact superconducting transmon qubit circuits made of ultrathin NbN

We design and fabricate a compact superconducting qubit circuit made of nano-thick NbN film on a high-resistivity silicon substrate, carrying seven transmon qubits. By comparing with the conventional superconducting qubit circuits made of superconducting films with hundred-nanometer thickness, our superconducting qubit circuit has much smaller size in the readout circuit, whose resonator length is only about 1/20 of that in a conventional superconducting circuit. Transmons are measured and characterized in the frequency and time domains with different flux bias. The transition frequency f01 can be adjusted in the range of several GHz. The qubit circuits made of such nano-thick material with high kinetic inductance are promising in the integration of quantum circuits.

High-Q trenched aluminum coplanar resonators with an ultrasonic edge microcutting for superconducting quantum devices

Dielectric losses are one of the key factors limiting the coherence of superconducting qubits. The impact of materials and fabrication steps on dielectric losses can be evaluated using coplanar waveguide (CPW) microwave resonators. Here, we report on superconducting CPW microwave resonators with internal quality factors systematically exceeding 5 × 106 at high powers and 2 × 106 (with the best value of 4.4 × 106) at low power. Such performance is demonstrated for 100-nm-thick aluminum resonators with 7–10.5 um center trace on high-resistivity silicon substrates commonly used in Josephson-junction based quantum circuit. We investigate internal quality factors of the resonators with both dry and wet aluminum etching, as well as deep and isotropic reactive ion etching of silicon substrate. Josephson junction compatible CPW resonators fabrication process with both airbridges and silicon substrate etching is proposed. Finally, we demonstrate the effect of airbridges’ positions and extra process steps on the overall dielectric losses. The best quality factors are obtained for the wet etched aluminum resonators and isotropically removed substrate with the proposed ultrasonic metal edge microcutting.

Conversion of THz refractive index variation to detectable voltage change realized by a graphene-based Brewster angle device.

The Brewster effect has been previously reported as an essential mechanism for terahertz (THz) wave sensing application. However, generally in a sensing application, a complex rotation apparatus is required for detecting the slight change in Brewster angle. Here, we propose a graphene-based Brewster angle device operating at a specific terahertz frequency capable of sensing the refractive index at a fixed incident angle. In other words, our sensing device could avoid the impact of Brewster angle shift and eliminate the need for high-precision rotating equipment, which is usually required in traditional sensing applications. The conversion from the refractive index to a Volt-level detectable voltage roots from the tunability of graphene's Fermi level in the external electrical field. A linear correlation between the output voltage and the background refractive index is observed and theocratically analyzed. Furthermore, we present the improvement of our device in terms of sensing range and sensitivity by adjusting the permittivity of the dielectric substrate. As a demonstration of our proposed device, a detection range of 1.1-2.4 and a sensitivity of 20.06 V/RIU for refractive index is achieved on a high-resistance silicon substrate operating at 0.3 THz.

The Effect of Defect Charge and Parasitic Surface Conductance on Aluminum Nitride RF Filter Circuit Loss

When AlN thin films are deposited directly on the high-resistance silicon (HR-Si) substrate, a conductive layer will be formed on the HR-Si surface. This phenomenon is called the parasitic surface conduction (PSC) effect. The presence of the PSC effect will increase the power consumption of electronic components. Therefore, it is necessary to reduce the PSC effect. In prior technology, the polysilicon layer is usually used as the trap-rich layer to reduce the PSC effect. Experiments show that compared to AlN films deposited directly on HR-Si, the AlN substrates with polysilicon introduced on HR-Si have less radio frequency (RF) loss. To verify the effect of polysilicon on RF loss, polysilicon films of three different thicknesses and several different roughnesses were introduced. The results show that the thickness of the polysilicon will affect the RF loss, while the roughness has almost no effect on it. The polysilicon trap-rich layer can reduce the RF loss, which gradually becomes smaller as the polysilicon thickness increases.

Optically Controlling Broadband Terahertz Modulator Based on Layer-Dependent PtSe2 Nanofilms

In this paper, we propose an optically controlling broadband terahertz modulator of a layer-dependent PtSe2 nanofilm based on a high-resistance silicon substrate. Through optical pump and terahertz probe system, the results show that compared with 6-, 10-, and 20-layer films, a 3-layer PtSe2 nanofilm has better surface photoconductivity in the terahertz band and has a higher plasma frequency ωp of 0.23 THz and a lower scattering time τs of 70 fs by Drude-Smith fitting. By the terahertz time-domain spectroscopy system, the broadband amplitude modulation of a 3-layer PtSe2 film in the range of 0.1-1.6 THz was obtained, and the modulation depth reached 50.9% at a pump density of 2.5 W/cm2. This work proves that PtSe2 nanofilm devices are suitable for terahertz modulators.

Improved Off-State Leakage Current and Cutoff Frequency for AlGaN/GaN HEMT by Using Silicon-on-Insulator

An improvement in off-state leakage current and cutoff frequency for AlGaN/GaN high electron mobility transistors (HEMTs) is investigated. Raman spectroscopy confirms the low stress of GaN heterostructure grown on a silicon-on-insulator (SOI) substrate. The HEMT devices on SOI substrate show lower knee voltage (Vknee) and on-resistance (RON) compared to those on the high-resistive silicon (HR-Si) substrates by 20.8% and 30.4%, respectively. Off-state leakage current is reduced to 10−7 A mm−1, and the cutoff frequency (f t ) is increased by 19.2% as compared to HR-Si substrate. Thus, the GaN/SOI technology is proven to be a potential technology for high-frequency communication applications.

Suppression of p-type parasitic channel formation at the interface between the aluminum nitride nucleation layer and the high-resistivity silicon substrate

In this study, GaN-based epitaxial structures were grown on high-resistivity silicon (HRSi) substrates by metalorganic chemical vapor deposition. The p-type parasitic channels generated at the interfaces of the aluminum nitride (AlN) nucleation layers and HRSi substrates were characterized by surface capacity measurement, backside secondary ion mass spectrometry, and spread resistance profiling. The 2-nm thick silicon nitride (SiNx) layer formed by nitridation on the HRSi substrates was used to suppress the Al diffusion from the 50-nm AlN nucleation layer and also prevented from generation of the p-type parasitic channels. The p-type parasitic channels induced insertion losses at high frequencies. Transmission line measurement was used to determine the insertion losses. The insertion loss of the GaN-based epitaxial structure with the optimized 25-nm AlN nucleation layer on the 2-nm SiNx layer was -2.72 dB/mm. It was only 0.04 dB/mm higher than that of the annealed HRSi substrate (-2.68 dB/mm) at 10 GHz. Obviously, the diffusion of Al from the optimized 25-nm thick AlN nucleation layer into the HRSi substrate can be alleviated by the SiNx layer, thereby reduced insertion loss.

전자전에 사용되는 S-대역 스위치 필터 뱅크의 초소형화 광대역 MEMS 대역 통과 필터 구현

Wideband MEMS bandpass filters are important frequency-selective components in communications, radar and other microwave systems, and their performances affect overall system performances directly. Thus, it is critical to develop a compact and lightweight switch filter banks that can be applied to an unmanned aerial vehicle for electronic warfare, which is recently considered important in the defense industry. This paper introduces a high-performance wideband band pass filter fabricated by micro electromechanical systems (MEMS) process based on a high-resistance silicon substrate for low insertion loss. The center frequency of the filter is 4GHz, and it is designed in an inter-digital structure to have a fractional bandwidth of 100%. The fabricated filter has a volume of 6.95 mm × 4.7 mm × 0.42 mm and achieves an insertion loss of 4.0 dB, an attenuation of &gt; 25 dB at 1.0 GHz and 7.5 GHz, and a return loss of &lt; 10 dB.

Gate-Tunable Transmon Using Selective-Area-Grown Superconductor-Semiconductor Hybrid Structures on Silicon

We present a gate-voltage-tunable transmon qubit (gatemon) based on planar $\mathrm{In}\mathrm{As}$ nanowires that are selectively grown on a high-resistivity silicon substrate using III-V buffer layers. We show that low-loss superconducting resonators with an internal quality of $2\ifmmode\times\else\texttimes\fi{}{10}^{5}$ can readily be realized using these substrates after the removal of buffer layers. We demonstrate coherent control and readout of a gatemon device with a relaxation time, ${T}_{1}\ensuremath{\approx}700\phantom{\rule{0.2em}{0ex}}\mathrm{ns}$, and dephasing times, ${T}_{2}^{\ensuremath{\ast}}\ensuremath{\approx}20\phantom{\rule{0.2em}{0ex}}\mathrm{ns}$ and ${T}_{2,\mathrm{echo}}\ensuremath{\approx}1.3\phantom{\rule{0.2em}{0ex}}\ensuremath{\mu}\mathrm{s}$. Further, we infer a high junction transparency of $0.4$--$0.9$ from an analysis of the qubit anharmonicity.

Bias-free terahertz generation from a silicon-compatible photoconductive emitter operating at telecommunication wavelengths

We present a telecommunication-compatible bias-free photoconductive terahertz emitter composed of a bilayer InAs structure directly grown on a high-resistivity silicon substrate. The bilayer InAs structure includes p+-doped and undoped InAs layers, inducing a strong built-in electric field that enables terahertz generation without requiring any external bias voltage. A large-area plasmonic nanoantenna array is used to enhance and confine optical generation inside the photoconductive region with the highest built-in electric field, leading to the generation of a strong ultrafast photocurrent and broadband terahertz radiation. Thanks to a higher terahertz transmission through the silicon substrate and a shorter carrier lifetime in the InAs layers grown on silicon, higher signal-to-noise ratios are achieved at high terahertz frequencies compared with previously demonstrated bias-free terahertz emitters realized on GaAs. In addition to compatibility with silicon integrated optoelectronic platforms, the presented bias-free photoconductive emitter provides more than a 6 THz radiation bandwidth with more than 100 dB dynamic range when used in a terahertz time-domain spectroscopy system.

Improvements of electrical and thermal characteristics for AlGaN/GaN HEMT grown by metal-organic chemical vapor deposition on silicon-on-insulator (SOI) substrate

AlGaN/GaN high electron mobility transistors (HEMTs) heterostructures are grown by metal-organic chemical vapor deposition on silicon-on-insulator (SOI) substrate and high-resistivity silicon (HR-Si) simultaneously to investigate the influence of substrate types on electrical and thermal characteristics. The AlGaN/GaN HEMT epitaxial structure grown on SOI achieved high electron mobility (1900 ± 19 cm2 (V s)−1) and high two-dimensional electron gas carrier concentration (9.1 ± 0.1 × 1012 cm−2). The GaN HEMT metal–insulator–semiconductor gate device fabricated on the structure grown on the SOI substrate exhibits higher saturation current and improved buffer breakdown voltage compared with devices fabricated on HR-Si substrate. In particular, SOI substrate helps to improve the thermal-sensitive strain of the GaN-based heterostructure and reduced defect density in the epitaxy, thereby improve the temperature-dependent on-resistance (R ON) and the dynamic R ON of the device.

AlGaN/GaN High Electron Mobility Transistors Grown by MOVPE on 3C-SiC/Si(111) for RF Applications

In this work, an AlGaN/GaN HEMT structure is grown on a 0.8 μm thick 3C-SiC layer on high resistivity Silicon substrate. The RF propagation losses are investigated and compared with the ones of epi-layers grown directly on Silicon and on 6H-SiC substrates. Short gate length transistors are fabricated using e-beam lithography. In spite of ohmic contact resistance of 0.6 Ω.mm, a saturated current density of 0.7 A/mm at a gate bias of +1V and a transconductance peak higher to 250 mS/mm for 75 nm T-shaped gate transistors are reached on structure with thick 3C-SiC template. Moreover, for the first time, transition frequencies fT/fmax of 60/98 GHz are reported on such 3C-SiC template.

On the terahertz response of metal-gratings on anisotropic dielectric substrates and its prospective application for anisotropic refractive index characterization

This paper discusses the terahertz electromagnetic response of metallic gratings on anisotropic dielectric substrates. The metallic gratings consist of parallel gold stripes. Utilizing numerical simulations, we observe that it is possible to excite a series of resonant modes in these structures. These modes are affected differently by the different indices on the anisotropic substrate. An analytical model is discussed to show that modes associated with transmission peaks are due to the excitation of (a) Fabry–Pérot modes with polarization along the grating and/or (b) waveguide modes with polarization perpendicular to the grating. It is observed that the resonance associated with the TM1,1 mode is a narrow linewidth resonance which, in some particular circumstances, becomes nearly independent of substrate thickness. Therefore, from the spectral position of this resonance, it is possible to extract the out-of-plane component of the substrate refractive index with very small uncertainty. Based on this observation, we demonstrate the refractive index characterization of several lossless semiconductor substrates through frequency-domain polarized terahertz transmission measurements in the frequency range of 0.2–0.6 THz at normal incidence. The reliability of the technique is demonstrated on well-known materials, such as high-resistivity silicon and sapphire substrates. This technique is also applied for the characterization of a Fe-doped β-Ga2O3 single-crystal substrate.

GaN HEMTs on low resistivity Si substrates with thick buffer layers for RF signal amplification and power conversion

We report GaN high-electron-mobility transistors (HEMTs) with a thick (7.7 µm) GaN buffer on a Czochralski low resistivity Si (LRS) substrate. The GaN HEMTs exhibit high performance for both radio-frequency (RF) amplification and power conversion. The thick GaN buffer was grown by means of vacancy engineering, delivering a low dislocation density of ∼1.6 × 108 cm−2, contributing to suppressed RF signal coupling to the lossy Si substrate and a high vertical voltage blocking capability. For RF performance, GaN HEMTs with a 650 nm gate exhibit an fT/fMAX value of 25.1/32.3 GHz and a maximum output power POUT of 2.2 W/mm at 4 GHz with a drain voltage VDS of 20 V, which is comparable with the performance of RF GaN HEMTs on a high-resistivity silicon substrate without the existence of the field plate. For power performance, the vertical breakdown voltage of the wafer is 1160 V, and the three-terminal lateral breakdown voltage is 885 V in a GaN HEMT with a gate-to-drain distance of 8 µm. The thick GaN layer on the LRS substrate scheme thus provides a compelling platform for monolithic integration of high-performance RF devices and high-voltage power devices.