High-level Microprogramming Language Research Articles

Automatic compaction of microcode

A microcode compaction algorithm based on a new description of microoperations and microinstructions is proposed. The technique is independent of the target machine since it does not refer to any machine timing description. It is assumed that the microprogram is described via a high-level microprogramming language. The compaction algorithm is described in terms of operations on the sets of source and destination resources for each microcode block. Some evaluations are made concerning the efficiency of the automatically generated microcode with respect to an increasing microprogram complexity.

A microprogramming logic

A universal syntax-directed proof system is presented for the verification of horizontal computer architectures. The system is based on the axiomatic architecture description language AADL, which is sufficiently rich to allow the specification of target architectures while providing a concise model for clocked microarchitectures. For each description A epsilon AADL of a host, it is shown how to construct systematically a (Hoare-style) axiomatic definition of an A-dependent high-level microprogramming language based on S*. The axiomatization of A's microoperations together with a powerful proof-rule dealing with the inherent low-level parallelism of horizontal architectures allow a complete axiomatic treatment of the timing behavior and dynamic conflicts of microprograms written in S*(A).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A system for verification of interactive microprogram transformations

Since its introduction by Wilkes in 1951 the field of microprogramming gets an increasing importance. But until yet there exist only few and restrictable tools to support a designer in his errorprone task [1] of microprogram development. Most of the activities in the field of microprogramming concern developing microcode compilers. They convert a specification of the intended behavior expressed in a high level microprogramming language [2], [3] into a ho r i zon ta l m i c rop rog ram wh ich is interpretable by a given micro machine.

Retargetable microcode synthesis

Most work on automating the translation of high-level microprogramming languages into microcode has dealt with lexical and syntactic analysis and the use of manually produced macro tables for code generation. We describe an approach to and some results on the formalization and automation of the more difficult problem of retargeting local code generation in a machine-independent, optimizing microcode synthesis system. Whereas this problem is similar in many ways to that of retargeting local code generation in high-level language compilers, there are some major differences that call for new approaches. The primary issues addressed in this paper are the representation of target microprogrammable machines, the intermediate representation of local microprogram function, and general algorithmic methods for deriving local microcode from target machine and microcode function specifications. Of particular interest are the use of formal semantics and data flow principles in achieving both a general and reasonably efficient solution. Examples of the modeling of a representative horizontal machine (the PUMA) and the generation of microcode for the PUMA machine model from our working implementation are presented.

Progress im High-Level Microprogramming

A high-level microprogramming language would speed work on higher level microprogramming and firmware engineering and decouple algorithm design from microcoding. This article examines several approaches.

The AADL/S* Approach to Firmware Design Verification

If microprogramming aims to provide direct hardware control— allowing fast, reliable, and flexible implementation of higher architectural layers—how can high-level microprogramming languages be microarchitecture independent?

On the formal pescription of microoperations and its impact on automatic microcode generation

Automatic microcode generation is a significant research field of firmware engineering. In the research System AMPS, three kinds of formal description of microoperations will be needed in automatic microcode generation from high level microprogramming language: algorithmic microoperations, real microoperations, and formal microoperations. In this paper, we present and discuss the formal descriptions, the relationship among real microoperations as well as the factors by which the concurrency of microoperations can be identified; we also show the vitality of these three kinds of description mentioned above in allowing the high level microprogramming language being machine-independent, and the generality of microcode compaction algorithm.

An axiomatization of low-level parallelism in microarchitectures

This paper presents the heart of a universal syntax-directed proof system for the verification of horizontal computer architectures. The system is based on the axiomatic architecture description language AADL, which incorporates a comcise model of clocked microarchitectures. For a given description A of a host architecture, we show how to axiomatize A's microoperations and present powerful proof-rules dealing with the inherent low-level parallelism of horizontal architectures. They allow for a complete axiomatic treatment of the timing behaviour and dynamic conflicts of microprograms written in an A-dependent high-level microprogramming language based on S*.

A retargetable compiler for a high-level microprogramming language

A compiler for the generation of microcode for a high-level microprogramming language is presented. The compiler is target machine independent. The input to the compiler consists of a hardware description, a high-level microprogram and a set of program transformation rules. The compiler is able to take advantage of optimization techniques which are used by microprogrammers because many of these can be represented by program transformation rules.

High level microprogramming

High level microprogramming languages have been studied extensively, but no widely accepted HLML exists to date. We examine the classes of HLMLs, giving examples. We then give some reasons as to the current lack of an accepted HLML, and give some suggestions how to solve this problem. The existence of a HLML would allow work on higher level microprogramming and firware engineering to proceed more rapidly. A possible microprogramming environment, based on a HLML, is presented.

Axiomatic proof rules for a machine-specific microprogramming language

In recent years, much effort has been devoted to the design and implementation of high level microprogramming languages. One of the goals for such languages is to facilitate the formal verification of microprograms using Hoare's inductive assertion method. Essential to the use of this method is an axiomatic definition of the microprogramming language.In this paper, we describe the axiomatization of the machine dependent microprogramming language S*(QM-1) [12]. This language is an instantiation of the machine independent language schema S* [3,4], for the Nanodata QM-1 "nanolevel" architecture. We show that, in spite of the complexity of the QM-1, with its variety of side-effects and special conditions, a small and uniform set of proof rules can be constructed.

Towards a family of languages for the design and implementation of machine architectures

In recent years, increases in complexity of hardware/firmware systems, and the concern for systems reliability have resulted in growing interest in methodologies and tools for the design, description and verification of computer systems. A vital component of any such design methodology is the language used for representing the design. In the case of particularly complex systems the design process may involve a succession of stages each of which represents the system at a particular level of abstraction. In such situations several languages may be required, each suited to a particular level of abstraction. We present here, one such family of languages , consisting at present of two members, S*A, an architectural description language, and S*, a high level microprogramming language schema. These closely related (“kin”) languages may be used collaboratively for the systematic, top-down development of an architecture, down to the microcode level. The resulting descriptions of the architecture provide, in addition, a complete unified document of the multilevel design process.

Direct execution of lisp on a list_directed architecture

We have defined a direct-execution model dedicated to non-numerical processing which is based upon an internal representation of source programs derived from LISP. This model provides good support for both sophisticated editing (syntactical parsing, tree manipulation, pretty-printing, ...) of conventional languages and artificial intelligence languages. A high level microprogramming language (LEM) was designed to write the interpreters and the editors. A hardware processor was built and a LISP interpreter, microprogrammed in LEM, has been operational since September 1980. First, the influence of LISP on the LEM language and the architecture is discussed. At the LEM level, we will see that LISP has prompted the control constructs and the access functions to the tree-structured internal form. As for the architecture, we present the hardware implementation of a special garbage collector based upon reference counters. In turn, the machine has influenced the implementation of LISP. We present here the structure of our LISP interpreter and we give evaluation measures dealing with size, development effort, speed; they prove that programming in LEM is easy, short to debug and very concise. Moreover, the speed of our LISP interpreter confirms that the architecture is very efficient for symbolic processing.

Direct execution of lisp on a list_directed architecture

We have defined a direct-execution model dedicated to non-numerical processing which is based upon an internal representation of source programs derived from LISP. This model provides good support for both sophisticated editing (syntactical parsing, tree manipulation, pretty-printing, ...) of conventional languages and artificial intelligence languages. A high level microprogramming language (LEM) was designed to write the interpreters and the editors. A hardware processor was built and a LISP interpreter, microprogrammed in LEM, has been operational since September 1980. First, the influence of LISP on the LEM language and the architecture is discussed. At the LEM level, we will see that LISP has prompted the control constructs and the access functions to the tree-structured internal form. As for the architecture, we present the hardware implementation of a special garbage collector based upon reference counters. In turn, the machine has influenced the implementation of LISP. We present here the structure of our LISP interpreter and we give evaluation measures dealing with size, development effort, speed; they prove that programming in LEM is easy, short to debug and very concise. Moreover, the speed of our LISP interpreter confirms that the architecture is very efficient for symbolic processing.

A retargetable microcode generation system for a high-level microprogramming language

A system for the generation of microcode from a high-level microprogramming language is presented. The system is independent of the target machine because it is table-driven by a separate hardware declaration. It is applicable for horizontally microprogrammed machines.

MicroTAL - a machine-dependent, high-level microprogramming language

The design and implementation of a high-level microprogramming language is described. The language is a subset of an existing systems programming language, TAL, which allows algorithms to be written and debugged using that language. The procedure may then be recompiled using the microTAL compiler to produce a semantically equivalent microprogram which is accessed via an opcode rather than a procedure call. The microTAL compiler automatically generates code to handle interrupts and page faults which may occur during the execution of the procedure.

S*(QM-1)

In previous papers [1,2,3] a high level microprogramming language schema called S* was described. S* is a partially specified language such that for a given host machine M1, a particular language S*(M1) results when M1's properties are used to complete the specifications of S*. We say that S* is instantiated into S*(M1) with respect to M1. This paper describes the instantiation of S* with respect to the Nanodata QM-1. The resulting language S*(QM-1) allows high level “nanoprograms” to be written for the QM-1. The major objective of this research was to examine the language schema S*, from which S*(QM-1) was instantiated, in light of its overall philosophy and usefulness as a tool in the development of a specific microprogramming language for a highly complex microprogrammable machine.

Considerations for local compaction of nanocode for the nanodata QM-1

Much work has been done recently on the problem of compaction of microcode, that of detecting parallelism between microoperations expressed in a sequential manner in order to pack the operations into as few microinstructions as possible. In particular, the theory of local compaction has developed to the stage where some extensive testing of the models and methods is called for. This paper examines some of the considerations for local compaction of the nanocode of the Nanodata QM-1 in the context of the theoretical model of compaction presented in the literature. This application of compaction to QM-1 nanocode not only provides a stringent test of the model, but also shows that compaction of code for this architecture is feasible, thus forming part of a test of the practicalities of developing a high-level microprogramming language for the QM-1.

An experiment in high level language microprogramming and verification

The STRUM system was created to apply software engineering techniques to microprogramming. It provides the tools that allow the microprogrammer to use high level language, structured programming, and formal program verification to create emulations for a horizontally microprogrammed computer. This system is evaluated in two parts: (1) High level microprogramming language design and its use in structured microprogramming; and (2) Verification of a large microprogram. Both parts of this evaluation include experimental results. Part I includes a comparison of an emulation created using traditional techniques to the same emulation created using the STRUM system. Part II describes the formal verification of a 1700 line program that was immediately subjected to extensive testing. This work provides new results on the efficiency of high level microprogramming languages, the effectiveness of peephole optimization for microcode and the practicality of formal microprogram verification.

Some Experiments in Local Microcode Compaction for Horizontal Machines

Microcode compaction is an essential tool for the compilation of high-level language microprograms into microinstructions with parallel microoperations. The purpose of the research reported in this paper is to compare four microcode compaction methods reported in the literature: first-come first-served, critical path, branch and bound, and list scheduling. In order to do this a complete, machine independent method of representing the microoperations of real machines had to be developed; and the compaction algorithms had to be recast to use this representation. The compaction algorithms were then implemented and tested on microcode produced by a compiler for a high-level microprogramming language. The results of these experiments were that for all cases examined the first-come first-served and list scheduling algorithms produced microcode compacted into a minimal number of microinstructions in time that was a polynomial function of order two of the number of input microoperations.