High Electromigration Resistance Research Articles

Ag metallization with high electromigration resistance for ULSI

Electromigration is investigated for sputtered Ag lines patterned by a novel hybrid etching technique. This new patterning technique works in two steps. After employing an oxygen plasma in the first step, a hydrogen peroxide solution is used in the second step. The electromigration is tested by an accelerated stress test. It was found that Ag lines show an increased electromigration resistance in comparison to chemical vapor deposition- and PVD-Cu lines from literature. The lifetime values of the lines show variations between different testchips. This is assumed to be due to thermal induced stress voiding in the lines. This can be prevented by improving the adhesion properties by applying suitable etching conditions or an additional adhesion layer.

Control of the (111) Orientation in Copper Interconnection Layer

Low sheet resistance copper conductive layer has been used extensively in logic large scale integrated circuits. High density current can be flowed under the high stress field. Higher electromigration resistance is another promising point in the copper conductive layer. 1,2 Deposition of thick copper conductive layer with high ~111! orientation and with low stress is required in the copper conductive layer. 3 It has recently been reported that resistivity of the electroplating copper layer is determined mainly by the grain growth of ~111! and by the stress with barrier layer 4 rather than by the impurity in the copper layer. Adhesion strength of thick copper conductive layer and agglomeration of the copper seed layer are also influenced by the ~111! orientation and by the stress of seed layer as reported elsewhere. 5,6 Although the control of the ~111! orientation is very important in the copper conductive layer, few papers have reported the control of ~111! orientation in the electroplating layer. This paper describes the control of ~111! orientation in electroplating copper layer.

In Situ Rapid Thermal Oxidation and Reduction of Copper Thin Films and Their Applications in Ultralarge Scale Integration

Copper is widely accepted as a next-generation metallization material for ultralarge-scale integration (ULSI) because of its low resistivity and high electromigration resistance. It is well known that Cu oxidizes easily at low temperatures. This characteristic has impeded the application of Cu in integrated circuits. However, the high oxidation rate of Cu and high reduction rate of its oxides at low temperature can be exploited for some potential applications. This paper presents the kinetic studies of Cu film oxidation and in situ reduction of its oxide films. The Cu oxidation experiments were performed in dry and wet oxygen at temperatures from 100 to 600°C for oxidation times from 10 to 718 s. Scanning electron microscopy, Rutherford backscattering spectrometry, spectroscopic ellipsometry and reflectometry, and X-ray photoelectron spectroscopy were used for analyzing the chemical composition of the processed material and determining the oxidation/reduction kinetics of the films. The results showed that the oxide phase is CuO at higher temperature and at lower temperature (<400°C). In situ reduction of copper oxide was studied using secondary ion mass spectroscopy, indicating that the reduction of Cu oxides proceeds from the interface to the surface with a high reduction rate. The infrared reflectivity of Cu surface is over 99%. This is a problem when the Cu process is performed in a rapid thermal processing (RTP) system, since most of the radiation from the lamps is consequently reflected by the Cu surface. An improved process, called shield-enhanced RTP, results in higher lamp power efficiency and better within wafer temperature uniformity. © 2001 The Electrochemical Society. All rights reserved.

Package-and wafer-level electromigration tests on Al−Cu interconnect with Ti and TiN underlayers

The effect of A1 underlayer between Ti and TiN on the electromigration (EM) lifetime of Al stack film were compared with package-level and conventional wafer-level EM tests. The higher EM resistance of the Al stacks prepared with Ti underlayer can be best explained by their better Al (111) texture and grain size distribution than those with TiN underlayer. The surface roughness of the underlayer is related to the grain size distribution and surface roughness of Al film. The conventional wafer-level EM test results showed a similar trend with respect to Ti and TiN underlayers with less accuracy than those from package-level EM test results.

Effects of Ti and TiN underlayers on electromigration reliability of Al–Cu interconnects

The effects of Al underlayer between Ti and TiN on the electromigration (EM) reliability of Al stack film were compared. And both package-level and conventional wafer-level EM tests were performed. Microstructures of underlayer and Al films were characterized to understand the EM results. The surface roughness of the underlayer was related to the grain size distribution and surface roughness of Al film. The higher EM resistance of the Al stacks prepared with Ti underlayer can be best explained by their better Al (111) texture and grain size distribution than those with TiN underlayer.

Effects of Rapid Thermal Annealing after Plasma H2 Pretreatment of the Copper Seed Layer Surface on Copper Electroplating

In ULSI fabrication, copper is widely accepted as a new interconnect material to replace aluminum and its alloys due to its low resistivity and high electromigration resistance. Cu seed layers for copper electroplating were deposited by magnetron sputtering on silicon wafers using TaN as diffusion barriers between the seed layer and silicon. Effects of plasma H2 pretreatment and also the combined effects of plasma H2 pretreatment and rapid thermal annealing of the Cu seed layers have been investigated on the physical properties including the resistivity, the grain size and the surface roughness of the electroplated copper films. The best physical properties were obtained for the electroplated copper film on the TaN film the surface of which was given the plasma H2 treatment at the rf-power of 100 W for 10 min followed by rapid thermal annealing at 350°C for 30 s. The mechanism of the cleaning process has also been discussed.

Crack formation in TiN films deposited on Pa- n due to large thermal mismatch

Advanced metallization requires stringent demands on the properties of dielectric materials and the respective conducting metals used. These include low dielectric constant, negligible water take up, chemical inertness, low temperature deposition, as well as compatibility with current integrated circuits manufacturing, low resistivity, and high electromigration resistance. To meet future integration requirements, Pa- n as the low κ-dielectric material and silver or copper as the low resistive metals are being studied. The issues of metal diffusion and adhesion are important for successful operation and long-term reliability. The diffusion barrier, titanium nitride has been well studied and is an accepted material in current industrial manufacturing. In this study, TiN was deposited using DC magnetron sputtering to minimize the thermal budget constrains associated with Pa- n. In situ four-point probe analysis was used to measure the resistivity of TiN and to elucidate the discontinuity in the films during thermal annealing. In situ X-ray analysis was performed to determine the coefficient of linear thermal expansion, which was then used to determine thermal stresses in TiN and Pa- n films. During the annealing, the hard and brittle TiN film did not comply with ductile Pa- n due to the thermal mismatch. This large tensile stress opposes the pre-existing compressive stress present upon deposition, and eventually exceeds the TiN fracture strength at approximately 150°C resulting in crack formation.

Scaling properties and electromigration resistance of sputtered Ag metallization lines

Resistivity and electromigration were investigated for thin sputtered Ag films and microstructured Ag lines. Resistivities of thin films were found to be lower compared to copper and follow the prediction of the size effect. Microstructured Ag lines show a high electromigration resistance at accelerated stress measurements. Considering joule heating of the lines, the activation energy for electromigration was found to be 0.58 eV. The extrapolated median lifetime of Ag lines was found to be similar or higher than for Cu lines.

Selective Deposition of Thin Copper Films onto Silicon with Improved Adhesion

Metallization plays a key role in the production process of integrated devices. Recently, copper (Cu) has been proposed as an alternative material to aluminum to address the need for metallic thin films with low resistivity and high electromigration resistance. 1 As a consequence, great attention has been paid to electrochemical processes, which enable the deposition of metallic copper at low temperatures with low costs. Copper electroless deposition has been shown to selectively plate silicon (Si) substrates and structures with high aspect ratios and large structural heights. 2,3 However, this method requires a pretreatment to activate the surface. Selectivity is achieved only to the extent that the activating treatment can be made selectively. In addition, many studies have also been carried out on the galvanic deposition of copper from fluoride containing solutions.4-11 In contrast to electroless deposition, galvanic displacement deposition requires no prior activation of the surface and is truly selective to silicon surfaces. Thus, it provides an attractive deposition method for copper interconnects or seed layers for subsequent metallization.4 Galvanic displacement is also a promising avenue for the integration of metals in micromechanical devices, due to its conformal nature and high substrate selectivity. Despite these attractive features, a crucial issue in the aforementioned processes is the lack of adhesion of copper to the Si substrate, which may severely constrain their application. 12 In particular, copper films deposited by galvanic displacement fail the qualitative Scotch tape test. In this paper, we report a process for the galvanic deposition of copper onto silicon from fluoride-containing solutions. Thin copper films with reflective and smooth surfaces and excellent adhesion to silicon are obtained. Results on plating of microelectromechanical systems (MEMS) after release are also presented. Polycrystalline silicon and single crystalline Si(100) and Si(111), p- or n-type, and analytical grade chemicals were used. Samples were ultrasonicated in acetone and, after drying with nitrogen flux, etched in concentrated hydrofluoric acid for 10 min. The hydrogenterminated surfaces thus obtained were rinsed, dried, and immersed in the plating solution. The following additives were used to prepare the aqueous solution: ammonium fluoride (NH 4 F 40%) 50 vol %, copper sulfate (CuSO 4 ·5H 2 O) 0.01 M, ascorbic acid (C 6 H 8 O 6 ) 0.01 M, sodium potassium tartrate (KNaC 4 H 4 O 6 ·4H 2 O) 0.005 M, and methanol 30 vol % (percentages are referred to the final solution volume).13 The pH of the solution was 7.5. Room temperature (25°C) and gentle agitation of samples were used. Samples were finally rinsed in deionized water and dried with nitrogen flux. The adhesion of the copper film to the substrate is strongly related to the presence of ascorbic acid in solution. The absence of the acid results in the formation of a copper film which fails the standard scotch tape test. Because we have observed a similar effect when ascorbic acid was substituted with fumaric acid, and both acids are

Effects of Various Passivation Dielectrics and Via Reservoir Lengths on Stress and Electromigration Reliability of Metal Interconnects

ABSTRACTReservoir length dependencies of electromigration lifetime in multilevel interconnect were compared for two passivation dielectrics, that is, FOX (Flowable Oxide) and HDP FSG (High Density Plasma Fluorinated Silicate Glass). The higher electromigration resistance of interconnects passivated by FOX can be best explained by their lower stress and vacancy concentration levels than the case for FSG. It was also proposed that lower levels of stress and vacancy concentration in the longer reservoir could partially contribute to the better electromigration reliability of interconnect with the longer reservoir.

Comparative Study on Wafer-Level and Package-Level Electromigration Reliability for Sub-Quarter Micron Logic Devices

ABSTRACTThe effects of Al underlayer between Ti and TiN on the electromigration (EM) lifetime of Al stack film were compared by the package-level and conventional wafer-level EM tests. The higher EM resistance of the Al stacks prepared with Ti underlayer can be best explained by their better Al (111) texture and grain size distribution than those with TiN underlayer. The surface roughness of the underlayer is related to the grain size distribution and surface roughness of Al film.

Thermal stability and adhesion improvement of Ag deposited on Pa-n by oxygen plasma treatment

Parylene- n ( Pa- n) and silver are being studied for ultralarge scale integrated circuits because of their favorable properties. These include low dielectric constant (2.65), negligible water take-up, chemical inertness, low temperature deposition, as well as compatibility with current integrated circuits manufacturing for Pa-n and the low resistivity (1.6 μΩ cm), high electromigration resistance for silver. To meet integration requirements, Pa-n and Ag are studied to understand specific reliability issues, e.g., diffusion, delamination, or loss of adhesion, compatibility, etc. Initial measurements of silver and dielectric Pa-n were done using four-point probe. Thermal stability and texturing of Ag films on Pa-n were confirmed using x-ray diffraction analysis. The change associated with resistivity of Ag films on Pa-n sample supports the changes observed in x-ray spectra. Rutherford backscattering spectrometry and secondary ion mass spectroscopy analysis show insignificant diffusion of Ag in Pa-n. Adhesion analysis of Ag/Pa-n and Pa-n/Si was done using scratch and tape tests. Oxygen plasma surface treatment of Pa-n shows drastic improvement of adhesion between Ag and Pa-n without loss of thermal stability of the system. The improvement in adhesion is associated with increased roughness of Pa-n surface after plasma treatment.

Surface Morphology Improvement of Metalorganic Chemical Vapor Deposition Al Films by Layered Deposition of Al and Ultrathin TiN

The surface morphology of aluminum (Al) films grown by metalorganic chemical vapor deposition (MOCVD) has been improved by inserting a 1.0-nm-thick titanium nitride (TiN) layer between 90-nm-thick Al layers. For multilayered Al/TiN film depositions, dimethylaluminum-hydride (DMAH) and tetrakis(dimethylamido)titanium (TDMAT) are used as metalorganic precursors. For uniform and conformal TiN layers 1.0-nm-thick atomic layer deposition (ALD) was carried out in the same reaction chamber as the Al MOCVD. The surface morphology of the films was evaluated by measuring the optical reflectance. In the early stage of Al MOCVD, the reflectance versus film thickness curve shows a rapid decrease because of the scattering of incident light from the Al nuclei, and then it increases sharply to a maximum reflectance until the completion of island coalescence. However, it monotonically decays again with Al thickness due to the nonuniform grain growth. By inserting a 1.0 nm TiN layer on the Al layer at the maximum reflectance, the reflectance is restored again to the peak reflectance in the manner of a sinusoid waveform. Moreover, the multilayered Al/TiN films have a strong (111) preferred crystal orientation, and small and uniformly sized Al grains, which are expected to result in higher electromigration resistance. Therefore, the combined deposition technique with Al MOCVD and TiN ALD is considered a promising candidate to make Al MOCVD suitable for future microelectronic applications.

Copper electroplating for future ultralarge scale integration interconnection

Copper has received considerable attention during the past few years because of its low electrical resistivity, high melting temperature, and high electromigration resistance. Since electrochemical plating has several advantages compared to physical vapor deposition and chemical vapor deposition due to its low cost and low processing temperature, it becomes the most attractive technique for the implementation of Cu metallization. In this article, we report an electroplating scheme for Cu deposition and study aspects of copper electroplating related to chemical additives effected on Cu deposition. A low resistivity Cu film (∼2 μΩ cm) could be obtained when metallic ion concentration is decreased or current density is increased. The detailed correlation between film resistivity, electrolyte concentration, current density, and film morphology is given in this study. In addition, chemical additives in electrolyte solutions also play important roles in copper electroplating. In this report, thiourea and polyethylene glycol, which are usually added in printing circuit board electroplating to influence nucleation, have been used as gap filling promoters to help Cu filling. The results show that addition of thiourea and polyethylene glycol could help in forming smooth Cu film but does not promote Cu filling ability. Hydroxyl amine sulfate, which has both amino and sulfate groups, is proposed for use as a gap filling promoter in helping Cu electroplating. In this work, we demonstrate that Cu could be electroplated into fine trenches (at 0.3 μm dimension with aspect ratio of 3) when hydroxyl amine sulfate is present and no voids are formed.

Barrier layer effect of titanium-tungsten on the electromigration in sputtered copper films on polyimide

Titanium-tungsten is employed as the diffusion barrier in a Cu/barrier/polyimide/Si system. The electromigration damage (EMD) of Cu with a TiW barrier is investigated utilizing an empirical formula. Two activation energies are obtained suggesting a surface electromigration mechanism at low temperature (140–190 °C) and a combined migration mechanism at high temperature (190–230 °C). The presence of the TiW barrier layer improves the high temperature electromigration resistance. The effects of the TiW barrier on the microstructure and electrical properties of Cu metallization are discussed.

Reactive ion etch of patterned and blanket silver thin films in Cl2/O2 and O2 glow discharges

Silver (Ag) is being investigated as a potential metal for interconnect technology because it has the lowest bulk resistivity of any metal and higher electromigration resistance than aluminum. Silver dry etch is an important process step in the implementation of this metal as an interconnect. This article demonstrates both blanket and patterned etch of Ag films in a reactive ion-etch reactor using Cl2/O2 and O2 glow discharges. X-ray diffraction and scanning electron microscopy were used to analyze the postetch materials. Stress caused by volume expansion upon the formation of Ag2O, AgO, AgCl, and AgClOx, and possibly the sputtering and formation of volatile products, are also believed to induce the etch. The etch mechanism initiated by stress led to roughness and residues on the postetch surface for a blanket etch, and jagged edges for a line etch. It is not suitable to use the above chemistries for a blanket films etch; but for pattern etch, it showed suitable line formation after resist removal and clean. Further study will be needed to improve roughness, uniformity, and edges geometry of the line edges. Corrosion of Ag in chlorine ambient is an essential issue to be considered in future work.

Effects of grain orientation on preferred abnormal grain growth in copper films on silicon substrates

Aluminum and its alloys are the major materials used for interconnects in integrated circuits. However, their resistivities are not low enough to operate ultra-large-scale integration (ULSI) circuits at ultrahigh speeds because the parasitic capacitances of interconnects increase according to the scaling down of their physical dimensions. Furthermore, aluminum and its alloys are liable to show poor reliability against failures caused by elecromigration and stress migration. Copper (Cu) is an attractive alternative to these materials and has been investigated for applications in interconnect formation [1, 2]. The obvious advantage for using copper stems from its low resistivity (1.72 iUcm) leading to low R±C delays, where R and C, respectively, represent the resistance and capacitance associated with interconnect architecture, and expected higher electromigration resistance. The lower resistivity of copper will also act to prevent Joule heating that should aid in this regard, as well. However, because of the difference in the thermal expansion coef®cients (a) between the copper ®lm and the silicon substrate (aCu ˆ 17 3 10y6 8Cy1 and aSi ˆ 33 10y6 8Cy1, respectively), the larger Young's modulus than aluminum (ECu ˆ 12:98 3 10 dyn cmy2, EAl ˆ 7:06 3 10 dyn cmy2) and the large difference in thickness (h) between the ®lm and substrate (hSi=hCu ˆ 400 500), large biaxial stresses are generated in the copper ®lms during the thermal treatments required for device fabrication. Film stresses as large as 210 MPa (compressive) during heating and 400 MPa (tensile) at room temperature have been measured [3]. These large stresses may produce changes in the ®lm and interconnect morphologies that are deleterious to device manufacturing yield and ultimate circuit reliability. The large compressive stresses produce hillocks [4] on the ®lm surface that lead to interlevel short circuiting between metallization layers. Tensile stresses produce voids [5, 6] in passivated ®lm that locally reduce the ®lm cross-section and currentcarrying capability of the interconnects. Mechanical, physical and chemical properties of thin ®lms are affected by microstructural attributes such as grain size, grain size distribution, defect density and texture. Film texture is of particular interest owing to the anisotropic property variations observed in copper. For example, the texture of electroless copper ®lm has been shown to affect the resulting oxidation behavior [7]. The correlation of roomtemperature stress with texture and the subsequent in uence on ®lm resistivity has also been noted [8]. Ohmi et al. found that (1 0 0) and (1 1 1) preferred orientation Cu ®lms were grown on Si substrates by a low kinetic energy particle process, and (1 1 1)oriented ®lms thus created on SiO2 were metastable and easily transformed by thermal annealing into completely (1 0 0)-oriented ®lms with large grains of about 100 im [9]. A recent paper discussed the observed texture responses of copper thin ®lms deposited by a variety of techniques [10], in general, (1 0 0)-, (1 1 0)-, (1 1 1)and (5 1 1)-oriented ®lms dominated the response. From surface energy considerations, the close-packed (1 1 1)-oriented grains should be favored. An understanding of these preferred abnormal orientation grain growths has remained elusive [11]. The purpose of this letter is to explain the often extensive fraction of (1 0 0), (1 1 0), (1 1 1) and (5 1 1) texture component during thermal annealing by considering the effect of grain crystallographic orientation, with respect to the direction of the applied biaxial strains, on ®lm stresses. We assume that the polycrystalline ®lms with a facecentered cubic (f.c.c.) structure (for example, Cu or Al) are deposited on rigid silicon substrates and that the grain structure is columnar in the ®lm, that is, the grain height is equal to the ®lm thickness. The ®lm thermal stress (oe) at temperature (T ) induced by thermal expansion mismatch is given by

Texture Control and Electromigration Performance in Al-Based and Cu-Based Layered Interconnects

ABSTRACTTexture control of Al and Cu by underlying refractory metal is discussed. Al texture can be controlled with underlayer metals like as Ti and TiN which have the same atomic arrangement within 3% misfits to Al. Cu texture can be also controlled by underlayer TiN in spite of a large difference in inter-atomic distance of Cu and TiN. Since the epitaxial growth of TiN on Cu is observed, it is suggested that epitaxial growth may occur at the early stage of Cu deposition on TiN.The electromigration performance was evaluated in double level interconnects with W-stud via. It is confirmed that highly &lt;111&gt; textured Al and Cu have high electromigration resistance. Both the diffusion of Cu in Al-Cu and Al drift are suppressed in &lt;111&gt; textured Al-alloy interconnects, and Cu drift is also suppressed in Cu damascene lines formed on &lt;111&gt; textured TiN. Grain boundary diffusion and the interfacial diffusion would be suppressed in highly textured metals with underlayer and it is speculated that interfacial diffusion is more important in Cu damascene lines.

Electromigration resistance of copper interconnects

Copper has been suggested as a promising interconnect material for ULSI applications, because of the low resistivity of copper compared to aluminum. Due to decreasing interconnect and contact dimensions, a high electromigration resistance of the metallization material is required. Electromigration tests were performed in the course of the european COIN project on copper interconnects with linewidths between 1 and 4 μm and different sample preparations. The copper was deposited by CVD or PVD methods. Patterning was done by ion milling or RIE. TiN or TiW were used as a barrier. Tests were performed at wafer level and package level in the temperature range from 170°C to 250°C and current densities from 2 MA/cm 2 to 15 MA/cm 2. Activation energies between 0.60 and 1.00 eV were determined depending on the deposition and patterning method and the used barrier. A comparison between the different copper samples and a standard AlSiCu is presented showing a 10-fold improvement in lifetime.

Enhanced reliability of W-encapsulated AlSi-interconnections using selective W-CVD

Reliability of Al based interconnections can be enhanced by using refractory metal base and top layers. Therefore encapsulation of Al alloy lines by selective W-CVD was examined with respect to electromigration stability. The selective W-CVD was performed in a commercial cluster tool with a specially equipped selective W-CVD chamber and a high vacuum load lock. The deposition process was based on the silane reduction of WF 6, which takes place preferentially on electron donating materials (metals, silicides, TiN, etc.). Different pretreatments were examined with respect to their influence on selectivity and nucleation behaviour at the surface (top and sidewall) of AlSi lines. Optimized pretreatment combinations (HF dip; HF dip + H 2 plasma) resulted in selective growth of tungsten and uniform encapsulation of the lines. Electromigration tests were performed on 2 μm and 3 μm wide NIST structures. The determined mean times to failure (MTF) are up to 7 times larger compared to conventional AlSi interconnections depending on W thickness. The evolution of resistance during an EM test shows that void formation takes place in the Al alloy. In this case current flow can be maintained by the encapsulation layer due to the high electromigration resistance of tungsten.