HfO2 Gate Dielectrics Research Articles

Effect of Al incorporation on the performance and reliability of p-type metal-oxide-semiconductor field effect transistors

This study examined the performance and reliability of HfO2 gate dielectrics in p-type metal-oxide-semiconductor field effect transistors (pMOSFETs) capped with Al or Al2O3. The presence of Al capping deteriorated the pMOSFET scalability and channel mobility compared to Al2O3 capping. Al capping caused a higher rate of Al diffusion in the HfO2 dielectric layer, reducing the device performance and oxide thickness scaling. This degradation of the negative bias temperature instability of the Al-incorporated sample was attributed to decay of the interface quality rather than to a decrease in charge trapping in the bulk high-k dielectric.

Performance Improvement of Pentacene-Based Organic Thin-Film Transistor with HfO2 Gate Dielectrics Treated by CF4 Plasma

Fluorine incorporation into the HfO2 gate dielectrics by post CF4 plasma treatment in an inductively coupled plasma chamber was proposed to improve gate leakage current and modify surface property for low-temperature fabrication. During the whole process, the temperature is controlled below 150 oC. The low-leakage HfO2 dielectric treated by CF4 plasma was characterized and then utilized in pentacene-based OTFTs. After CF4 plasma treatment, the gate leakage and field effect mobility were effectively improved. By integrating high-k HfO2 by CF4 plasma treatment and HMDS evaporation treatment, a low operating voltage (-4V), low threshold voltage (-1.12V), a low subthreshold swing (266 mV/decade), a field-effect mobility (0.029cm2/Vs) and an on/off current ratio (>104) were obtained.

Tunneling FETs on SOI: Suppression of ambipolar leakage, low-frequency noise behavior, and modeling

We report on thin-body tunneling field-effect transistors (TFETs) built on SOI substrates with both SiO2 and HfO2 gate dielectrics. The source–drain leakage current is suppressed by the introduction of an intrinsic region adjacent to the drain, reducing the electric field at the tunnel junction in the off state. We also investigate the temperature dependence of the TFET characteristics and demonstrate that the temperature-induced change in the Si bandgap is the main mechanism that determines the tunneling barrier and hence the drain current ID. We present a model of the TFET as a combination of a gated diode and a MOSFET, which can be solved analytically and can predict the experimentally measured ID over a wide range of drain and gate bias. Finally we report on the low frequency noise (LFN) behavior of TFETs, which unlike conventional MOSFETs exhibits 1/f2 frequency dependence even for large gate areas. This dependence indicates less trapping due to the much smaller effective gate length over the tunneling junction.

Impacts of Zr Composition in $\hbox{Hf}_{1-x} \hbox{Zr}_{x}\hbox{O}_{y}$ Gate Dielectrics on Their Crystallization Behavior and Bias-Temperature-Instability Characteristics

The effects of Zr composition on the crystallization behaviors and reliability characteristics of atomic-layer-deposited Hf1-x ZrxOy (0 ≤ x ≤ 1) gate-dielectric films are examined. n-Channel metal-oxide-semiconductor field-effect transistor (nMOSFET) devices with ZrO2 gate dielectrics showed a much smaller Vth shift under the positive bias stress compared with the same device with HfO2 gate dielectrics. The impact of Zr composition on the crystallization temperature, crystalline phases, and surface morphology of Hf1-x ZrxOy films is studied. As the Zr composition in the Hf1-x ZrxOy films increased, the reduction of crystallization temperature and the transformation from a monoclinic to a tetragonal phase were observed. The grain size of the crystallized ZrO2 film is much smaller than that of crystallized HfO2. The Hatband voltage (Vfb) shift under positive gate-bias stress in p-channel MOS capacitor (pMOSCAP) devices show a similar trend to the Vth shift in nMOSFET devices. In addition, the annealed ZrO2 films show a large reduction in the Vfb, shift under the positive bias stress compared with as-deposited ZrO2 in pMOSCAP devices. The improved bias-temperature-instability characteristics of ZrO2 compared with that of HfO2 is related to the smaller grain size of crystallized ZrO2.

Reliability Properties and Current Conduction Mechanisms of HfO2 MIS Capacitor with Dual Plasma Treatment

The incorporation of nitrogen in HfO2 gate dielectrics has been reported to be beneficial for electrical performance. The improvement in the electrical characteristics of HfO2 thin film with plasma nitridation process or plasma fluorination process has also been examined. In this study, dual plasma, CF4 pre-treatment and nitrogen post-treatment, treatments were performed on HfO2 MIS capacitor for further improvement on reliability characteristic. We examine the reliability properties and the current conduction mechanism of HfO2 thin films. The frequency dispersion and constant voltage stress (CVS) characteristics of the samples were analyzed to estimate the improvement. According to the present study, dual plasma treatment could be better than single plasma treatment and would be an effective approach for HfO2 dielectric improvement.

Electrical Properties of SiGe MOS Capacitors with Ultrathin ALD Hafnium Dioxide

Ultra thin HfO2 high-k gate dielectric has been deposited directly on Si0.81Ge0.19 by the atomic layer deposition (ALD) process. HfO2 layers were characterized by grazing incidence x-ray diffraction (GIXRD) to examine crystallinity. In this work it is shown that MIS capacitors annealed in N2 ambient show better electrical properties than the samples annealed in O2 and mixed gas ambient (O2 and N2) and without annealing. Furthermore, trapping and detrapping behavior of charge carriers in N2 annealed ultrathin HfO2 gate dielectrics during constant current stress (CCS) and constant voltage stress (CVS) has been investigated in detail.

High Hole Mobility in 65 nm Strained Ge p-Channel Field Effect Transistors with HfO2 Gate Dielectric

Biaxially-strained Ge p-channel field effect transistors (pFETs) have been fabricated for the first time in a 65 nm technology. The devices are designed to have a reduced effective oxide thickness (EOT) while maintaining minimized short channel effects. Low and high field transport has been studied by in-depth electrical characterization, showing a high hole-mobility that is enhanced by up to 70% in the strained devices. The important role of pocket implants in degrading the drive current is highlighted. Using a judicious implantation scheme, we demonstrate a significant gain in on-current (up to 35%) for nanoscaled strained Ge pFETs. Simultaneous optimization of the gate metal and dielectric, together with the corresponding uniaxial stress engineering, is identified as a promising path for further performance enhancement.

Performance Improvement of Pentacene-Based Organic Thin-Film Transistor with HfO2 Gate Dielectrics Treated by CF4 Plasma

not Available.

Bulk and interface trap generation under negative bias temperature instability stress of p-channel metal-oxide-semiconductor field-effect transistors with nitrogen and silicon incorporated HfO2 gate dielectrics

Negative bias temperature instabilities (NBTIs) of p-channel metal-oxide-semiconductor field-effect-transistor with HfO2, HfOxNy, and HfSiON were investigated. Higher bulk trap generation (ΔNot) is mainly attributed to threshold voltage shift rather than interface trap generation (ΔNit). ΔNit, ΔNot, activation energy (Ea), and lifetime were exacerbated with incorporated nitrogen while improved with adding Si into gate dielectrics. Compared to HfO2, HfOxNy showed worse NBTI due to nitrogen pile-up at Si interface. However, adding Si into HfOxNy placed nitrogen peak profile away from Si/oxide interface and NBTI was reduced. This improvement is ascribed to reduced ΔNot and ΔNit, resulting from less nitrogen at Si interface.

Characterization of Local Electrical Properties of Gate Dielectrics by Conductive Atomic Force Microscopy

A conducting atomic force microscopy (C-AFM) in ultrahigh vacuum is used to directly observe the evolution of leakage path in HfO2 gate dielectrics. Thanks to the UHV environment, reproducible results for both positive and negative tip biases are obtained without material formation on the surface, which has been a problem for atmospheric C-AFM. It is found that the density of leakage spots increases exponentially as a function of tip bias and that it is a large factor for leakage current increase. It is also found that these local leakage paths in HfO2 films annihilate after applying a reverse tip bias. This process seems to be related to the initial stage of the forming process of resistive switching materials. The fact that these paths annihilate by a very small reverse bias suggests that this behavior is caused by local reduction and oxidation in the HfO2 layer.

The Effects of Postdeposition Annealing on the Crystallization and Electrical Characteristics of HfO2 and ZrO2 Gate Dielectrics

This study examined the effects of postdeposition annealing (PDA) on the electrical characteristics of atomic layer deposited ZrO2 and HfO2 films using similar precursors and process conditions. After PDA at 600oC, the insulating properties of ZrO2 improved but those of HfO2 deteriorated. The improved insulating properties of ZrO2 were attributed to the negligible increase in the interfacial layer thickness and an amorphous to tetragonal phase transformation. In addition, the degraded insulating properties of HfO2 after PDA at high temperatures were attributed to an abrupt increase in the interfacial layer thickness and the generation of conducting paths through the grain boundaries.

High Mobility ZnO thin film transistors using the novel deposition of high-k dielectrics

ABSTRACTIn order to investigate the performance of ZnO-based thin film transistors (ZnO-TFTs), we fabricate devices using amorphous hafnium dioxide (HfO2) high-k dielectrics. Sputtered ZnO was used as the active channel layer, and aluminium source/drain electrodes were deposited by thermal evaporation, and the HfO2 high-k dielectrics are deposited by metal-organic chemical vapour deposition (MOCVD). The ZnO-TFTs with high-k HfO2 gate insulators exhibit good performance metrics and effective channel mobility which is appreciably higher in comparison to SiO2-based ZnO TFTs fabricated under similar conditions. The average channel mobility, turn-on voltage, on-off current ratio and subthreshold swing of the high-k TFTs are 31.2 cm2V-1s-1, -4.7 V, ~103, and 2.4 V/dec respectively. We compared the characteristics of a typical device consisting of HfO2 to those of a device consisting of thermally grown SiO2 to examine their potential for use as high-k dielectrics in future TFT devices.

Dose Enhancement and Reduction in SiO$_{2}$ and High-$\kappa$ MOS Insulators

The effects of 10-keV X-rays and 400-keV endpoint-energy bremsstrahlung X-rays on MOS capacitors with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> or HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectrics and Al and TaSi gate metallization have been studied using the Monte Carlo simulator, MRED. We compare these calculations with previous results in the literature obtained with other Monte Carlo and discrete ordinates codes, and with experiments on devices with SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectrics, and find generally good agreement. There is a significant dose reduction in thin HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> layers exposed to 10-keV X-rays, when the HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> is surrounded by lower-Z materials (e.g., Si, Al). This dose reduction does not occur in a medium-energy bremsstrahlung X-ray environment; in that case, the dose in a HfO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> gate dielectric can be ~10 times higher than the dose in a SiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> dielectric, for the same incident X-ray fluence. These results demonstrate the capability of MRED to assist in the evaluation of dose enhancement and reduction in regions including or nearby high-Z materials in microelectronic materials and devices.

Calculation of the electron mobility in III-V inversion layers with high-κ dielectrics

We calculate the electron mobility for a metal-oxide-semiconductor system with a metallic gate, high-κ dielectric layer, and III-V substrate, including scattering with longitudinal-optical (LO) polar-phonons of the III-V substrate and with the interfacial excitations resulting from the coupling of insulator and substrate optical modes among themselves and with substrate plasmons. In treating scattering with the substrate LO-modes, multisubband dynamic screening is included and compared to the dielectric screening in the static limit and with the commonly used screening model obtained by defining an effective screening wave vector. The electron mobility components limited by substrate LO phonons and interfacial modes are calculated for In0.53Ga0.47As and GaAs substrates with SiO2 and HfO2 gate dielectrics. The mobility components limited by the LO-modes and interfacial phonons are also investigated as a function of temperature. Scattering with surface roughness, fixed interface charge, and nonpolar-phonons is also included to judge the relative impact of each scattering mechanism in the total mobility for In0.53Ga0.47As with HfO2 gate dielectric. We show that InGaAs is affected by interfacial-phonon scattering to an extent larger than Si, lowering the expected performance, but probably not enough to question the technological relevance of InGaAs.

The VFB Modulation Effect of ALD Grown Al2O3, SrO, La2O3 Capping Layers with HfO2 Gate Dielectrics

The effect of atomic layer deposited Al2O3, SrO, and La2O3 capping layers with HfO2 gate dielectrics were examined ffor flat band voltage (VFB) modulation. Al2O3 capping layers cause a VFB shift into the positive voltage direction, while SrO and La2O3 capping layers cause a shift into the negative voltage direction. The bottom capping layer, which positions between the Si substrate and the HfO2 dielectric was more effective in modulating the VFB compared to the top capping layer. The insulating properties of the gate dielectric stacks with different capping layers were also examined. X-ray photoelectron spectroscopy analysis verified that top capping layers did not generally diffuse to the interface between the Si substrate and the HfO2 dielectrics, which supports the result that bottom capping layers are more effective in modulating the VFB.

Control of Gate Metal Effective Work Functions and Interface Layer Thickness by Designing Interface Thermodynamics Based on Heteroatom Incorporation into High-k HfO2 Gate Dielectrics

We have proposed a new approach for controlling both gate metal effective work functions and interface layer thickness at the same time based on the incorporation of hetero atoms into HfO2 gate dielectrics. We investigated C atom incorporation into HfO2 by the first principles calculations. The results indicate that additional C atoms in HfO2 can reduce an interfacial SiO2 layer, which also causes modification of a gate metal effective work function. Redesigning interface thermodynamics by incorporating hetero atoms can be a crucial recipe for controlling both gate metal work functions and thickness of interfacial SiO2 layers in high-k gate stacks

DC modeling and the source of flicker noise in passivated carbon nanotube transistors

DC and intrinsic low-frequency noise properties of p-channel depletion-modecarbon nanotube field effect transistors (CNT-FETs) are investigated. Tocharacterize the intrinsic noise properties, a thin atomic layer deposited (ALD)HfO2 gatedielectric is used as a passivation layer to isolate CNT-FETs from environmental factors. The ALDHfO2 gate dielectric in these high-performance top-gated devices is instrumentalin attaining hysteresis-free current–voltage characteristics and minimizeslow-frequency noise. Under small drain–source voltage, the carriers inthe CNT channel are modulated by the gate electrode and the intrinsic1/f noise is found to be correlated with charge trapping/detrapping from the oxidesubstrate as expected. When thermionic emission is the dominant carriertransport mechanism in CNT-FETs under large drain–source voltages, the excess1/f noise is attributed to the noise stemming from metal–CNT Schottky barrier contacts asrevealed by the measurements.

Fabrication and characteristics of ZnO MOS capacitors with high-K HfO2 gate dielectrics

ZnO thin films are first deposited on n-type silicon by radio frequency (rf) magnetron sputtering at room temperature. And high-K HfO2 gate dielectrics thin films are deposited on ZnO films to form metal-oxide semiconductor (MOS) capacitors. The temperature to fabricate ZnO MOS capacitors is 400°C, and the low temperature process is applicable for thin film transistors, flat-panel display (FPD), flexible display, etc. The electronic availability of ZnO thin films, which serve as a semiconductor material for MOS capacitors with HfO2 gate dielectric is investigated. High frequency (1 MHz) capacitance-voltage (C-V) and current-voltage (I-V) characteristics of ZnO-based MOS capacitors are measured. The thermal stability and electronic stability of the ZnO capacitors are investigated, respectively. Experimental results indicate that good electrical characteristics can be obtained on ZnO substrates with high-K HfO2 gate dielectrics. Besides, the ZnO capacitors can exhibit high thermal and electronic stabilities.

Effect of postdeposition anneals on the Fermi level response of HfO2/In0.53Ga0.47As gate stacks

The electrical characteristics, in particular interface trap densities, oxide capacitance, and Fermi level movement, of metal oxide semiconductor capacitors with HfO2 gate dielectrics and In0.53Ga0.47As channels are investigated as a function of postdeposition annealing atmosphere. It is shown, using both conductance and Terman methods, that the Fermi level of nitrogen annealed stacks is effectively pinned at midgap. In contrast, samples annealed in forming gas show a large band bending in response to an applied gate voltage and a reduced midgap interface trap density compared to those annealed in nitrogen.

Control of Interface Traps in HfO2 Gate Dielectric on Silicon

The effects of postdeposition annealing (PDA) on the interface between HfO2 high-k dielectric and bulk silicon were studied in detail. The key challenges of successfully adopting the high-k dielectric/Si gate stack into advanced complementary metal–oxide–semiconductor (CMOS) technology are mostly due to interfacial properties. We have proposed a PDA treatment at 600°C for several different durations (5 min to 25 min) in nitrogen or oxygen (95% N2 + 5% O2) ambient with a 5-nm-thick HfO2 film on a silicon substrate. We found that oxidation of the HfO2/Si interface, removal of the deep trap centers, and crystallization of the film take place during the postdeposition annealing (PDA). The optimal PDA conditions for low interface trap density were found to be dependent on the PDA duration. The formation of an amorphous interface layer (IL) at the HfO2/Si interface was observed. The growth was due to oxygen incorporated during thermal annealing that reacts with the Si substrate. The interface traps of the bonding features, defect states, and hysteresis under different PDA conditions were studied using x-ray photoelectron spectroscopy (XPS), x-ray diffraction (XRD), transmission electron microscopy (TEM), and leakage current density–voltage (J–V) and capacitance–voltage (C–V) techniques. The results showed that the HfO2/Si stack with PDA in oxygen showed better physical and electrical performance than with PDA in nitrogen. Therefore, PDA can improve the interface properties of HfO2/Si and the densification of HfO2 thin films.