Hf-silicate Layer Research Articles

X-ray photoemission and X-ray absorption studies of Hf-silicate dielectric layers

Photoelectron spectroscopy and X-ray absorption spectroscopy (XAS) measurements have been performed on HfSi x O y and HfSi x O y N z dielectric layers, which are potential candidates as high- k transistor gate dielectrics. The hafnium silicate layers, 3–4 nm thick, were formed by codepositing HfO 2 and SiO 2 (50%:50%) by MOCVD at 485 °C on a silicon substrate following an IMEC clean. Annealing the HfSi x O y layer in a nitrogen atmosphere at 1000 °C resulted in an increase in the Si 4+ chemical shift from 3.5 to 3.9 eV with respect to the Si 0 peak. Annealing the hafnium silicate layer in a NH 3 atmosphere at 800 °C resulted in the incorporation of 10% nitrogen and the decrease in the chemical shift between the Si 4+ and the Si 0 to 3.3 eV. The results suggest that the inclusion of nitrogen in the silicate layer restricts the tendency of the HfO 2 and the SiO 2 to segregate into separate phases during the annealing step. Synchrotron radiation valence band photoemission studies determined that the valence band offsets were of the order of 3 eV. X-ray absorption measurements show that the band gap of these layers is 4.6 eV and that the magnitude of the conduction band offset is as little as 0.5 eV.

Physical origin of threshold voltage problems in polycrystalline silicon/HfO2 gate stacks

Based on theoretical calculations, we find that at p+ polycrystalline silicon (poly-Si)∕HfO2 gates, Si interstitials are easily migrated from the electrode, forming Hf–Si bonds with a charge transfer to the electrode, and the resulting interface dipole raises the Fermi level of poly-Si toward the pinning level, causing high flat band voltage shifts. In O-rich grown HfO2 on Si substrates, the Si atoms substitute for the Hf sites, leading to the formation of Hf-silicate layers, while under O-poor conditions, they remain as interstitial defects, binding with the Hf atoms, and behave as a negative-U trap, which causes the threshold voltage instability.

Wet Etch Characteristics of Hafnium Silicate Layers

To facilitate selective removal of the gate dielectric toward the gate electrode, wet etch characteristics of and in acidified HF solutions were determined as a function of several process parameters. Etch behavior of Hf-silicates was found to be little influenced by the various chemical vapor deposition processes. The top part (0–2 nm) of thick Hf-silicate layers etched similar to as-deposited thin layers , while the bulk part etched significantly more slowly. However, etch rates were strongly dependent on composition (lower for Hf-rich silicates). Also, the removal rate of was mainly dependant on the amount of incorporated nitrogen and crystallization temperature. Thermally nitrided layers were easier to remove compared to plasma-nitrided layers. Postnitridation anneals at high temperature in nitrogen environment decreased the etch rate. After removal, Hf concentrations below for most of the layers under study were observed after a short (typically a few seconds) etch process in a single-wafer spin-cleaning tool.

Control of interfacial silicate between HfO2 and Si by high concentration ozone

By high concentration ozone oxidation at low temperature, the Hf-silicate interfacial layer between HfO2 and silicon substrate is effectively controlled. This is evident by investigating the chemical shifts of the Hf4f and Si2p core-level spectra with depth by using x-ray photoelectron spectroscopy. The improved interfacial microstructure is further confirmed by high-resolution cross-sectional transmission electron microscopy. The capacitance-voltage curves, obtained from the metal-oxide-semiconductor capacitors using the ozone oxidized HfO2 as the gate dielectric, show a negligible hysteresis of about 5mV and a low fixed charge density.

Annealing-temperature dependence: Mechanism of Hf silicidation in HfO2 gate insulators on Si by core-level photoemission spectroscopy

We have investigated the mechanism of Hf silicidation from HfO2 gate insulators on Si by high-resolution core-level photoemission spectroscopy with detailed annealing-temperature controlling. We have found that the silicidation temperature depends on the difference of the chemical states at the interfacial layer. The Hf-silicate layer which is more stable than the SiO2 layer prevents the silicidation. In addition, silicidation processes also promote the formation of SiO2. Chemical shifts in core-level photoemission spectra depend on the interfacial-layer thickness and SiO2 concentration in the HfO2 top layer, which are tunable by detailed annealing temperature.

Effects of Remote Plasma Pre-oxidation of Si Substrates on the Characteristics of ALD-Deposited HfO[sub 2] Gate Dielectrics

We investigated the physical and electrical characteristics of a HfO 2 /ultrathin SiO 2 (∼0.5 nm)/Si structure grown by a remote plasma atomic layer deposition (RPALD). The HF-cleaned Si substrate was oxidized by a remote plasma oxidation (RPO) process and yielded a ∼0.5 nm thick SiO 2 layer. HfO 2 films were deposited on both H-terminated and RPO-treated Si substrates by the RPALD. During HfO 2 film deposition, the RPO-treated sample showed more effectively retarded formation of initial Hf silicate layers than the sample on H-terminated Si. RPO treatment also improves electrical properties including hysteresis, effective fixed oxide charge density (Q f,eff ) and equivalent oxide thickness (EOT).

The impact of Hf metal pre-deposition on the physical and electrical properties of ultrathin HfO2 films on Si0.9954C0.0046/Si heterolayers

The impact of Hf metal prior to the deposition of HfO2 films on tensile-strained SiC layers is demonstrated. The physical thicknesses are found to be ∼4.5 nm and ∼3.5 nm for HfO2/Hf gate stacks and HfO2 films, respectively, by a high-resolution transmission electron microscope. The formation of a Hf-silicate layer due to Si diffusion into the high-κ films is confirmed by x-ray photoelectron spectroscopy measurements. The effective dielectric constants of κ ∼ 6 for HfO2 films and κ ∼ 13 for HfO2/Hf gate stacks are calculated from the accumulation capacitance at the gate voltage of −2 V. The low leakage current density of ∼1 × 10−4 A cm−2 at −2 V, moderate interface state density of ∼1 × 1012 cm−2 eV−1 and low capacitance equivalent thickness (CET) of ∼1.4 nm for HfO2/Hf gate stacks on tensile-strained Si0.9954C0.0046 layers show a promising candidate for the new generation of complementary metal-oxide-semiconductor applications.

Chemical reaction at the interface between polycrystalline Si electrodes and HfO2∕Si gate dielectrics by annealing in ultrahigh vacuum

We have investigated the chemical reaction at the interface between polycrystalline-Si (poly-Si) electrodes and HfO2∕Si gate dielectrics by photoemission spectroscopy and x-ray absorption spectroscopy depending on the annealing temperature in an ultrahigh vacuum. From Si2p and Hf4f high-resolution core-level photoemission spectra, we revealed that the Hf-silicide formation starts at as low temperature as 700°C and that the Hf-silicate layer is also formed at the interface between poly-Si electrodes and HfO2. Crystallization of the amorphous HfO2 layer even at 700°C was suggested from valence-band and OK-edge absorption spectra. By the annealing at 800°C, the HfO2 layer disappeared completely and the Hf-silicide clusters were formed on the Si substrate. Direct contact between poly-Si electrodes and HfO2 promotes the interfacial reaction compared to the case without poly-Si electrodes.

Electrical properties of 0.5 nm thick Hf-silicate top-layer∕HfO2 gate dielectrics by atomic layer deposition

The electrical properties have been studied for hafnium (Hf)-based gate stack structures, fabricated using atomic layer deposition (ALD) technology. The very thin ALD Hf-silicate layers on the top of HfO2 gate structures were very important in obtaining good electrical properties, because these surface films prevented a reaction between the polysilicon electrodes and HfO2 films during high temperature activation annealing. From subthreshold characteristic measurements, Ioff values were less than about 10pA∕μm and Ion values at ∣Vg∣=1.1V were greater than 350 and 120μA∕μm for n- and p- metal oxide semiconductor field effect transistors, respectively. The effective mobility curves for the Hf-based gate stack structures were at the same level as those of 1.6 nm SiON reference films at 0.8MV∕cm. Furthermore, the interfacial trap densities were less than 5*1010cm−2 for the Hf-based gate stack structures, achieving the same level as in the 1.6 nm SiON reference films.

Effects of interfacial NH 3/N 2O-plasma treatment on the structural and electrical properties of ultra-thin HfO 2 gate dielectrics on p-Si substrates

The interfacial characteristics of high- κ HfO 2 on NH 3- and N 2O-plasma treated p-Si substrates have been investigated using high-resolution transmission electron microscopy (HRTEM), time-of-flight secondary ion mass spectroscopy (ToF-SIMS), and auger electron spectroscopy (AES). NH 3- and N 2O-plasma treated films show the formation of a nitrogen-rich Hf-silicate interfacial layer between the deposited HfO 2 and Si substrates. The electrical characteristics have been studied using metal–oxide-semiconductor (MOS) structures. Interfacial nitrogen increases the capacitances by ∼33% for NH 3 and ∼47% for N 2O-treated Si as compared to the untreated surface. A dielectric constant of ∼26 for HfO 2 film, ∼6.0 for Hf-silicate, ∼9.0 for NH 3- and ∼11.0 for N 2O-treated interfacial layers have been calculated from the accumulation capacitances of the MOS capacitors. The relatively higher dielectric constant, lower capacitance equivalent thickness (CET), lower leakage current and higher breakdown voltage for N 2O-plasma treated film makes it attractive for scaled Si MOSFET applications.

Thermal stability of the HfO2∕SiO2 interface for sub-0.1μm complementary metal-oxide-semiconductor gate oxide stacks: A valence band and quantitative core-level study by soft x-ray photoelectron spectroscopy

Synchrotron-radiation photoelectron spectroscopy is used to study the valence-band structure and the core-level photoemission spectra of HfO2 ultrathin films grown onto SiO2∕Si substrates by atomic layer deposition (ALD). We determine the band offsets (valence and conduction) of HfO2 to Si as a function of postdeposition annealing treatments (under an inert N2 atmosphere or in situ in ultrahigh vacuum) and find a significant evolution, the conduction-band offset remaining larger than 1.5eV. The Si2p and the Hf4f core-level spectra give detailed information on the composition and the spatial extent of the interfacial Hf silicate layer formed between the SiO2 bottom oxide and the HfO2 ALD thin film. By a quantitative treatment of the Si2p core-level intensities, we examine the thermal stability of the interface silicate after postdeposition annealing under N2 and in situ annealing in ultrahigh vacuum (UHV), both at 800°C. The as-deposited layer gives rise to a HfO2∕Hf0.35Si0.65O2∕SiO2 stack with corresponding thicknesses of 0.74∕0.51∕0.73nm. After postdeposition annealing at 800°C in a N2 atmosphere, this becomes a HfO2∕Hf0.31Si0.69O2∕SiO2 stack with corresponding thicknesses of 0.71:0.58:0.91nm. In situ annealing in UHV, on the other hand, gives a HfO2∕Hf0.35Si0.65O2∕SiO2 stack with corresponding thicknesses of 0.65:0.70:0.76nm. The former favors an extension of both the silicate and the SiO2 interface layers, whereas the latter develops only the silicate layer.

Atomic scale characterization of HfO2∕Al2O3 thin films grown on nitrided and oxidized Si substrates

One and three bilayers of HfO2(9Å)∕Al2O3(3Å) thin films were grown by atomic layer chemical-vapor deposition on Si(001) substrates whose surfaces were nitrided or oxidized. The films as-grown and postannealed in an ultrahigh vacuum were analyzed by atomic force microscopy, photoelectron spectroscopy, and medium energy ion scattering. For the one- and three-bilayer films grown on the nitrided Si substrates, the HfO2 and Al2O3 layers are mixed to form Hf aluminates at temperatures above 600°C. The mixed Hf aluminate layer is partly decomposed into HfO2 and Al2O3 grains and Al2O3 segregates to the surface by postannealing at 900°C. Complete decomposition takes place at 1000°C and the surface is covered with Al2O3. The surfaces are uniform and almost flat up to 900°C but are considerably roughened at 1000°C due to the complete decomposition of the Hf aluminate layer. In contrast, for one- bilayer films stacked on the oxidized Si substrates, Hf silicate layers, including Hf aluminate, are formed by annealing at 600–800°C. At temperatures above 900°C, HfSi2 grows and Al oxide escapes from the surface.

High-quality HfSixOy gate dielectrics fabricated by solid phase interface reaction between physical-vapor-deposited metal–Hf and SiO2 underlayer

We fabricated high-quality Hf–silicate (HfSixOy) gate dielectrics by utilizing the solid phase interface reaction between physical-vapor-deposited metal–Hf (typically 0.5nm thick) and SiO2 underlayers. Metal diffusion to the SiO2 layer increases the permittivity of the underlayer, while preservation of the initial SiO2∕Si bottom interface ensures good electrical properties of the gate dielectrics. The Hf–silicate layer remains amorphous and the poly-Si∕HfSixOy gate stack endures activation annealing at 1000°C. The interface trap density was comparable to that of conventional SiO2 dielectrics and the hysteresis of capacitance–voltage curves was as low as 4mV for a bias swing between −2 and +2.5V. Moreover, high electron mobility, equal to 89% of the universal mobility, was obtained for the high-k gate transistor.

Ultrathin HfO 2 gate dielectrics on partially strain compensated SiGeC/Si heterostructure

Ultrathin HfO 2 gate dielectrics have been deposited on strain-compensated Si 0.69Ge 0.3C 0.01 layers by rf magnetron sputtering. X-ray diffraction spectra show the films to be polycrystalline having both monoclinic and tetragonal phases. The formation of an interfacial layer has been observed by high-resolution transmission electron microscopy. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the deposited oxide and SiGeC films. The average concentration of Ge at the interfacial layer is found to be 2–3 at%. The leakage current density of HfO 2 gate dielectrics is found to be several orders of magnitude lower than that reported for thermal SiO 2 with the same equivalent thickness.

Physical and electrical properties of ultrathin HfO2/HfSixOy stacked gate dielectrics on compressively strained-Si0.74Ge0.26/Si heterolayers

The physical properties of HfO2/HfSixOy stacked gate dielectric films deposited on compressively strained-Si0.74Ge0.26/Si heterolayers have been investigated using Rutherford backscattering spectrometry, high-resolution transmission electron microscopy, time-of-flight secondary ion mass spectroscopy, and Auger electron spectroscopy measurements. Polycrystalline HfO2 film with physical thickness of ∼4.0 nm and an amorphous interfacial layer with a physical thickness of ∼4.5 nm has been observed. Secondary ion mass spectroscopy and Auger electron spectroscopy analyses show the formation of an amorphous Hf-silicate interfacial layer between the oxide deposited and SiGe films. The electrical properties in terms of capacitance–voltage (C–V), conductance–voltage, hysteresis, current density-electric field, and shift in gate voltage under constant current stress have been studied using a metal–oxide–semiconductor structure. Dielectric constants of 26 for HfO2 and 8.0 for the interfacial Hf-silicate layer have been calculated from the high frequency C–V (100 kHz) characteristics. These dielectrics show an equivalent oxide thickness as small as 0.6 nm for HfO2 and 2.2 nm for the interfacial silicate layer. The fixed oxide charge density and interface state density are found to be 1.5×1012 cm−2 and 5.5×1011 cm−2 eV−1, respectively, for HfO2 with the interfacial layer and those values are found to be 3.5×1012 cm−2 and 1.3×1012 cm−2 eV−1 for the Hf-silicate interfacial layer, respectively. The metal–oxide–semiconductor capacitor shows low hysteresis of 0.08 V, low leakage current density of ∼10−7 A/cm2 at −1.0 V, and breakdown field of 6.5 MV/cm for HfO2 with interfacial layer. Significant improvement of the charge trapping properties under Fowler–Nordheim constant current stress in HfO2 with the interfacial layer has been observed.

Characteristics of ultrathin HfO2 gate dielectrics on strained-Si0.74Ge0.26 layers

The structural and electrical characteristics of HfO2 gate dielectrics along with the interfacial layers formed on strained-Si0.74Ge0.26 films have been investigated. The polycrystalline HfO2 film with a physical thickness of ∼4.0 nm and an amorphous Hf–silicate interfacial layer with a physical thickness of ∼4.5 nm have been observed by high-resolution transmission electron microscopy and time-of-flight secondary ion mass spectroscopy. The electrical properties have been studied using metal–oxide–semiconductor (MOS) structures. A dielectric constant of 26 for HfO2 film and 8.0 for Hf–silicate interfacial layer have been calculated from the accumulation capacitances of the capacitors. These dielectrics show an equivalent oxide thickness as low as 0.6 nm for HfO2 and 2.2 nm for the Hf–silicate layers. The fabricated SiGe MOS capacitors show a low leakage current density of ∼6.5×10−7 A/cm2 at a gate voltage of −1.0 V, breakdown field of 6.5 MV/cm, and moderately low interface state density of 5.5×1011 cm−2 eV−1.

Electrical and physico-chemical characterization of HfO 2/SiO 2 gate oxide stacks prepared by atomic layer deposition

In this paper, we have correlated electrical measurements of thin HfO 2 layers deposited on SiO 2 by atomic layer deposition with angle-resolved X-ray photoelectron spectroscopy experiments. Results show that the HfO 2/Si interface layer (IL) is made of a SiO x layer underneath a Si-rich Hf-silicate layer. The increasing of the IL thickness, during annealing, was essentially due to the silicon oxidation by –OH groups remaining in the HfO 2 layer after deposition. Using shorter water pulse time, we were able to limit the SiO x growth during deposition. We have also observed, after annealing at 800 °C under nitrogen, a decreasing of the interfacial layer electrical thickness as well as an improvement of the equivalent oxide thickness of the stack.