Heteromaterial Gate Research Articles

Hetero-Material Gate Doping-Less Tunnel FET and Its Misalignment Effects on Analog/RF Parameters

In this paper, with the use of a hetero-material gate technique, a tunnel field-effect transistor (TFET) subject to charge plasma technique is proposed, named as hetero-material gate doping-less tunnel FET (HMG-DLTFET) and a brief study has been done on the effects due to misalignment of the bottom gate towards drain (GMAD) and towards source (GMAS). The proposed devices provide better performance as the drive current increased by three times as compared to conventional doping-less TFET (DLTFET). The results are then analyzed and compared with conventional doped hetero-material gate double-gate tunnel FET (HMG-DGTFET). The analog/radiofrequency (RF) performance has been studied for both devices and comparative analysis has been done for different parameters such as drain current (ID), transconductance (gm), output conductance (gd), total gate capacitance (Cgg) and cutoff frequency (fT). Both devices performed similarly in different misalignment configurations. When the bottom gate is perfectly aligned, the best performance is observed for both devices, but the doping-less device gives slightly more freedom for fabrication engineers as the amount of tolerance for HMG-DLTFET is better than that of HMG-DGTFET.

Heteromaterial-gate line tunnel field-effect transistor based on Si/Ge heterojunction**Project supported by the National Natural Science Foundation of China (Grant No. 61306105), the National Science and Technology Major Project of China (Grant No. 2011ZX02708-002), the Tsinghua University Initiative Scientific Research Program and the Tsinghua National Laboratory for Information Science and Technology (TNList) Cross-discipline Foundation of China.

A Si/Ge heterojunction line tunnel field-effect transistor (LTFET) with a symmetric heteromaterial gate is proposed. Compared to single-material-gate LTFETs, the heteromaterial gate LTFET shows an off-state leakage current that is three orders of magnitude lower, and steeper subthreshold characteristics, without degradation in the on-state current. We reveal that these improvements are due to the induced local potential barrier, which arises from the energy-band profile modulation effect. Based on this novel structure, the impacts of the physical parameters of the gap region between the pocket and the drain, including the work-function mismatch between the pocket gate and the gap gate, the type of dopant, and the doping concentration, on the device performance are investigated. Simulation and theoretical calculation results indicate that the gap gate material and n-type doping level in the gap region should be optimized simultaneously to make this region fully depleted for further suppression of the off-state leakage current.

The High-Frequency Performance of Hetero-Material-Gate CNTFETs with Gate Underlap

For the first time, a new type of carbon nanotube field–effect transistor (CNTFET), the hetero-material-gate(HMG) with underlap, is proposed and simulated using quantum model that is based on two-dimensional nonequilibrium Green's function (NEGF) solved self-consistently with Poisson equation. The simulated results reveal that the intrinsic cutoff frequency of single-material-gate CNTFETs (C-CNTFETs) reaches up to a few THz, which is 50% higher than that of ballistic Si FETs. Furthermore, we investigate the performance of C-CNTFETs with gate underlap. The results indicate that gate underlap can improve the cutoff frequency fT and switching speed, but deteriorate Ion/Ioff ratio. To improve Ion/Ioff ratio and perfect high-frequency performance, we propose HMG-CNTFETs with underlap and evaluate frequency and switching performance. The calculated results show that, for HMG-CNTFETs, gate underlap of about 11 nm can obviously optimize Ion/Ioff ratio and achieve an ideal cutoff frequency simultaneously. Our study provide a theoretical base for optimizing high-performance of CNTFET and broadening its application.

High-frequency and switching performance investigations of novel lightly doped drain and source hetero-material-gate CNTFET

The effects of lightly doped drain and source (LDDS) and hetero-material-gate (HMG) structure on the static characteristics and switching speed performance for a carbon nanotube field effect transistor (CNTFET) have been theoretically investigated by a quantum kinetic model. This model is based on two-dimensional non-equilibrium Green׳s functions (NEGF) solved self-consistently with Poisson׳s equation. A comparison study of electrical characteristics in conventional single-material-gate CNTFET (C-CNTFET), LDDS-CNTFET, HMG-CNTFET and LDDS-HMG-CNTFET structures has been performed. Simulations show that, compared with the other structures, LDDS-HMG-CNTFET significantly decreases leakage current, subthreshold swing, and increases on/off current ratio. In addition, effects of the gate electrode work function of the LDDS-HMG-CNTFET have been studied theoretically. The results indicate that the electron transport efficiency, and the cutoff frequency of the device, can be optimized by reasonably selecting the gate electrode work function. This work illustrates that the proposed LDDS-HMG-CNTFET might be useful for low-power high-speed CNTFET digital design.

A Two-Dimensional Analytical Model for Tunnel Field Effect Transistor and Its Applications

In this paper, a two-dimensional analytical model for the tunnel field effect transistor (TFET) on the silicon-on-insulator substrate is proposed. The accurate electrostatic potential and electric field of the device are obtained by solving the Poisson equation with appropriate boundary conditions. The accuracy of the proposed analytical model is verified by comparing with numerical simulation. It is shown that the electrical behavior of the TFET is more properly described by defining the zero vertical electric field at the channel/buried oxide interface. Furthermore, this analytical model is extended to implement in the hetero-material-gate (HMG) TFET. The physical principle of the HMG TFET can also be depicted, and electrical properties are characterized using this model.

Effects of the improved hetero-material-gate approach on sub-micron silicon carbide metal-semiconductor field-effect transistor

Based on the device operation mechanism and physical model, effects of the improved hetero-material-gate (HMG) approach on deep sub-micron silicon carbide (SiC) metal-semiconductor field-effect transistor (MESFET) are analyzed. By comparing with the conventional MESFET, it is shown that the improved HMG approach induces a multi-stepped distribution of the potential in the channel, leading to an enhanced electric field at the source. Meanwhile, the position of the maximum of the channel potential is changed to the drain side compared with the dual-material-gate (DMG) device, thus the carriers in the channel are accelerated more efficiently and the variation of potential caused by drain voltage is eliminated to a certain degree, resulting in a better restraint in short-channel effect. Also, different technological parameters are designed to study the dependence of the device performance and an optimization plan is obtained, leading to a decreased sub-threshold swing. In addition, asymmetric gate structures are designed for high power application, achieving an improved distribution of the electric field at the gate edge and an enhanced breakdown voltage of the small scale device.

Study of modeling for hetero-materiel gate fully depleted SSDOI MOSFET

In this paper,we propose a new device structure called HMG SSDOI (hetero-materiel gate strained Si directly on insulator), which combines the advantages of strained-silicon and hetero-material gate technology. By solving 2D Poisson's equation, we present models of the surface potential, surface electric field and threshold voltage for the new structure. These models take into account the effects of the gate length, the work function and the energy band. ISE TCAD is also used to simulate the performance of new device structure. The comparison results of model calculation and mathematic simulation show that the new structure of HMG SSDOI can enhance the carrier transport efficiency and suppress short channel effect, drain induction barrier lower and hot carrier effect, which improves device performance greatly.

Heteromaterial gate tunnel field effect transistor with lateral energy band profile modulation

A tunnel field effect transistor (TFET) device with a heteromaterial gate structure was introduced, and the influence of the lateral energy band profile modulation effect on the performance of TFET devices has been investigated. The two-dimensional numerical simulations demonstrated that a local minimum of the conduction band in the channel was formed by work function mismatch, which resulted in the abrupt transition between the on- and off-states and significant drive current enhancement. In particular, these unique features could be manipulated by engineering the heteromaterial and the gate length. This work reveals an effective method to improve the performance of nanoscale TFETs.

A Stepped Oxide Hetero-Material Gate Trench Power MOSFET for Improved Performance

In this brief, we propose a new stepped oxide hetero-material trench power MOSFET with three sections in the trench gate (an N <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> poly gate sandwiched between two P <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">+</sup> poly gates) and having different gate oxide thicknesses (increasing from source side to drain side). The different gate oxide thickness serves the purpose of simultaneously achieving the following: 1) a good gate control on the channel charge and 2) a lesser gate-to-drain capacitance. As a result, we obtain higher transconductance as well as reduced switching delays, making the proposed device suitable for both RF amplification and high-speed switching applications. In addition, the sandwiched gate with different work-function gate materials modifies the electric field profile in the channel, resulting in an improved breakdown voltage. By using 2-D simulations, we have shown that the proposed device structure exhibits about 32% enhancement in breakdown voltage, 25% reduction in switching delays, 20% enhancement in peak transconductance, and 10% reduction in figure of merit (product of ON-resistance and gate charge) as compared to the conventional trench-gate MOSFET.

Lateral channel engineered hetero material insulated shallow extension gate stack (HMISEGAS) MOSFET structure: high performance RF solution for MOS technology

In this work, due to increasing interest in analog and RF applications of MOS technology, an extended study is performed using ATLAS-2D device simulation software to assess the RF performance of insulated shallow extension gate stack (ISEGAS) devices in comparison to conventional bulk devices. The paper analyzes the frequency dependence of gate transconductance and parasitic capacitances that affect various RF performance metrics. Improvement in the characteristics of ISE with hetero material gate (HMG) incorporation (HMISEGAS) is also studied. Thus, the ISE structure with the HMG architecture can revolutionize the wireless communication market on account of having enormous RF application potential and the ability to combat short channel effects—the daunting roadblock for miniaturization.

TWO-DIMENSIONAL ANALYTICAL MODELING AND SIMULATION OF RETROGRADE DOPED HMG MOSFET

A novel device architecture, Retrograde doped HMG (Hetero-Material Gate) MOSFET is presented which combines the advantages of an epitaxial layer in the channel region with the HMG MOSFET. This combination tackles the problems of short channel effects (SCEs), hot electron effects and gate transport efficiency in a single structure by reducing threshold voltage and modifying the electric field pattern and surface potential profile along the channel. The expression for the 2-D potential profile in the channel has been derived. The results of surface potential, electric field and threshold voltage have been plotted and compared with their corresponding simulated results.

Exploring the novel characteristics of hetero-material gate field-effect transistors (HMGFETs) with gate-material engineering

The novel characteristics of a new type of MOSFET, the hetero-material gate field-effect transistor (HMGFET), are explored theoretically and compared with those of the compatible MOSFET. Two conceptual processes for realizing the HMG structure are proposed for integration into the existing silicon technology. The two-dimensional (2-D) numerical simulations reveal that the HMGFET demonstrates extended threshold voltage roll-off to much smaller length and shows simultaneous transconductance enhancement and suppression of short-channel effects (SCEs) [drain-induced barrier-lowering (DIBL) and channel-length modulation (CLM)] and, more importantly, these unique features could be controlled by engineering the material and length of the gate. This work demonstrates a new way of engineering ultrasmall transistors and provides the incentive and guide for experimental exploration.

A novel hetero-material gate (HMG) MOSFET for deep-submicron ULSI technology

A novel hetero-material gate MOSFET intended for integration into the existing deep-submicron silicon technology is proposed and simulated. It is shown that by adding a layer of material with a larger workfunction to the source side of the gate, short-channel effects can be greatly suppressed without degrading the driving ability. The threshold voltage roll-off can be compensated and tuned by controlling the length of this second gate. The new structure has great potential in breaking the barrier of deep-suhmicron MOSFET's scaling beyond 0.1 /spl mu/m technologies.