Grid Array Research Articles

Methods for estimating X-ray machine output through measurement and simulation

Ball grid arrays are increasingly being applied in the electronics industry and may require X-ray inspection to ensure the integrity and correct placement of solder pins. However, as the architecture of integrated circuits continues to narrow while simultaneously growing more complex, the risk of electronic failure due to radiation damage increases. While medical X-ray devices have been held to high standards and are repeatedly shown to be well characterized, devices used for electronic inspection are often lacking detailed characterization. This study presents unique methods to solve for important properties in X-ray inspection devices such as source to object distance and energy spectrum. This information can then be applied to Monte Carlo models to achieve better overall dose estimates to electronics, which will lead to superior manufactured products. Since X-ray devices can vary greatly in source characteristics, this work investigates spectral measurement and Monte Carlo representation of three X-ray devices. For a Philips SRO 33 100 medical diagnostic device, the spectral output followed expected trends given by the prediction software SpekCalc and Spektr. For the Dage XD7500NT, direct measurement showed a spectral artifact that through the use of Gafchromic films, was shown to be a contributing effect in the dose output. For the Rad Source RS1800, a high powered irradiation device, direct spectral measurement was not achieved. However, a Monte Carlo model using an assumed spectra was found to match ion chamber measurements to a high degree.

Properties of Sn-3 wt%Ag-5 wt%Cu alloys with Cu6Sn5 intermetallics grain refined by Mg

This paper investigates the influence of Mg additions on the microstructure, thermal properties, electrical properties, and joint strength of bulk and ball grid array (BGA) reflowed Sn-3 wt%Ag-5 wt%Cu solder alloy and the joint intermetallics (IMCs). The cross-sectional microstructure analysis revealed that the addition of Mg effectively triggered the grain refinement of primary Cu6Sn5 IMCs in the bulk solder alloys. In addition, the thickness of the interfacial Cu6Sn5 IMCs layer was suppressed. The optimal addition for refinement is in the vicinity of 0.10 wt%Mg. Furthermore, synchrotron tomography three-dimensional reconstructed imaging reveals that the grain refinement of primary Cu6Sn5 IMCs is also effective even in BGA scale solder joint at normal reflow conditions. These primary Cu6Sn5 IMCs showed a non-faceted morphology. 0.10 wt%Mg addition reduced the number and size of the Cu6Sn5 IMCs. The grain refinement of primary Cu6Sn5 IMCs could be attributed to the presence of Mg, Mg2Sn, and MgO phases that potentially serve as heterogenous nucleation sites. The thermal analysis showed that the degree of undercooling values was significantly reduced to the minimum with 0.10 wt%Mg addition, which increased when the amount of Mg increased to 0.15 wt%. The mechanical properties showed that the ductility of the solder joint at high shear speed was improved.

Shear performance of microscale ball grid array structure Sn–3.0Ag–0.5Cu solder joints with different surface finish combinations under electro-thermo-mechanical coupled loads

Shear performance of microscale ball grid array structure Sn–3.0Ag–0.5Cu solder joints with different surface finish combinations under electro-thermo-mechanical coupled loads

Interfacial Microstructure and Mechanical Reliability of Sn-58Bi/ENEPIG Solder Joints

The 42 wt.% Sn–58 wt.% Bi (Sn-58Bi) Ball Grid Array (BGA) solder balls were mounted to electroless nickel-electroless palladium-immersion gold (ENEPIG) pads by employing the reflow process profile. The effects of reflow cycles and aging time on the interfacial microstructure and growth behavior of intermetallic compounds, as well as the mechanical properties, were investigated. Pd-Au-Sn intermetallic compound (IMC) was formed at the Sn-58Bi/ENEPIG interface. With the increase in reflow cycles and aging time, the IMC grew gradually. After five reflow cycles, the shear strength of the Sn-58Bi/ENEPIG solder joints first decreased and then increased. After 500 h of aging duration under −40 °C, the shear strength of the Sn-58Bi/ENEPIG solder joints decreased by about 12.3%. The fracture mode transferred from ductile fracture to ductile and brittle mixed fracture owing to the fact that the fracture location transferred from the solder matrix to the IMC interface with the increase in reflow cycles and aging time.

Development of 3-D Wafer Level Packaging for SAW Filters Using Thin Glass Capping Technology

The introduction of 5G mobile communication created the need to support a large number of radio frequency (RF) bands. This required high performance and reduced size for microacoustic filters. Based on these requirements, a new three-dimensional wafer-level packaging (3-D WLP) solution based on the predecessors’ developed technology was presented to resolve reliability issues for surface acoustic wave (SAW) filter packages with large cavities. In the 3-D WLP, vertical interconnects were realized using through glass vias (TGVs). To enable such a process scheme, thin glass caps with TGVs were formed through laser-induced chemical etching. Then, glass capping dies were bonded on the corresponding LiTaO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (LT) device wafer to generate a cavity structure. Partial filling of the vias on the pad was used, and a metal trace was formed on the glass. Ball grid arrays (BGAs) were formed on top of the glass. Finally, an SAW filter WLP was fabricated. This glass capping packaging avoids the outgassing problem of conventional thin-film acoustic packaging at high temperatures, which would cause the contamination of the interdigital transducers (IDTs). In addition, a numerical study based on the 3-D finite element (FE) model has been conducted to analyze the reliability of the package. The built model was applied to perform parametric studies on the effects of package geometry, material properties, and the processing conditions on reliability. Based on the above studies, the optimized SAW filter WLP successfully passed the reliability test of pre-con level 3 and temperature cycling test (TCT, −40 °C ~ 125 °C).

Modeling and Analysis of Signal Integrity of Ball Grid Array Packages With Failed Ground Solder Balls

As an integrated circuit (IC) package, ball grid arrays (BGA) are widely used in various electronic systems, playing an important role in energy transfer and electrical signal transmission. In general, a signal solder ball is usually surrounded by ground solder balls. Compared with the signal solder ball, some ground solder balls are closer to the corner position of printed circuit boards (PCB), which leads to a higher failure risk for the ground solder balls in harsh environments. In this research, the impact of failed ground solder balls on the signal integrity of BGA packages was investigated using both theoretical analysis and experimental testing. A 3-D electromagnetic field model of a BGA high-frequency transmission channel with failed ground solder balls was developed. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{11}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$S_{21}$ </tex-math></inline-formula> parameters before and after degradation were analyzed and discussed. Based on transmission line theory, an equivalent circuit model of a soldering transition section with failed ground solder balls was also developed. It was found that the 3-D electromagnetic field model results were in a good agreement with the high-frequency parameters obtained from the equivalent circuit model. Both the 3-D electromagnetic field model and the circuit model results are validated by experimental tests. This study fully considers the return path discontinuity (RPD) aggravated by failed ground solder balls and provides a better understanding of this effect on signal transmission. It provides theoretical understanding and support for the application of fault detection strategies to electronic systems.

Estimation of Heat Generation in Semiconductors Centrally Mounted on Printed Circuit Boards

This work proposes a method to estimate the heat dissipation of components that are centrally soldered to printed circuit boards (PCBs). The power losses of a ball grid array (BGA) package and a MOSFET are estimated via a 1-D thermal model in tandem with a heat flux sensor. The former device is soldered to a multilayer PCB with complex copper traces, whereas the latter is mounted on a PCB without internal copper layers and relatively simple trace patterns. Thermal analyses demonstrate that the 1-D model is capable of representing heat conduction with good agreement in the board without internal copper layers. However, the multilayer PCB requires an adjustment coefficient based on the thermal conductance of the board. Said coefficient is employed to adjust the effective heat transfer coefficient of the multilayer PCB. With the aid of the adjustment coefficient, results show that the 1-D thermal model in combination with a heat flux sensor is capable of predicting heat dissipation within 15% of the actual power loss for both devices.

Investigation into thermo-mechanical reliability of copper trace lines in stacked dies ball grid array packaging

The persistent trend toward device miniaturization in the semi-conductor field has led to an ever finer line width and spacing of the copper trace patterns in the organic substrate used to connect the chip and printed circuit board. Thus, copper trace fracture has emerged as a major concern during the manufacturing process or subsequent thermal cycle reliability testing stage. Accordingly, the present study develops a three-dimensional (3D) computational model to analyze the reliability of the copper trace lines in a stacked ball grid array (BGA) containing two dies under thermal cycling between −65 °C and 150 °C. The simulation model takes account of both the tensile mechanical strength of the copper trace and its creep behavior at elevated temperatures. The validity of the simulation model is confirmed by comparing the predicted distribution of the plastic work density (PWD) in the copper trace/substrate layer following thermal cycling with the experimental observation. In general, the results show that the maximum average PWD of the copper trace should not exceed 400 kJ/m3 in order to minimize the risk of trace fracture. Taguchi analysis experiments are performed to determine the optimal design of the stacked BGA package which minimizes the PWD and hence maximizes the fatigue life of the copper trace. The results indicate that the thermo-mechanical reliability of the stacked BGA package depends mainly on the choice of substrate core material and core trace thickness.

Shear performance of microscale ball grid array structure Cu(Ni)/Sn–3.0Ag–0.5Cu/Cu(Ni) solder joints at low temperatures

In this study, the shear performance of microscale ball grid array structure Cu/Sn–3.0Ag–0.5Cu (SAC305)/Cu, Cu/SAC305/Ni, Ni/SAC305/Cu, and Ni/SAC305/Ni solder joints was investigated at decreasing temperatures (25 °C, 0 °C, −25 °C, −50 °C, −75 °C, −100 °C, and −125 °C). The results showed that the shear performance of the solder joints was considerably influenced by both the temperature and substrate materials. The shear strength of the Cu/SAC305/Cu solder joint monotonically increased with decreasing temperature, whereas the shear strength first increased and then decreased for the other solder joints. The fracture positions of all solder joints shifted from the solder matrix to the interface between the solder matrix and intermetallic compound layer when the temperature decreased, and the fracture mechanism changed from ductile to brittle with a ductile-to-brittle transition temperature of approximately −75 °C. Moreover, the interfacial fracture of the Cu/SAC305/Ni and Ni/SAC305/Cu solder joints was prone to occur at the Ni substrate side.

Abnormal Shear Performance of Microscale Ball Grid Array Structure Cu/Sn–3.0Ag–0.5Cu/Cu Solder Joints with Increasing Current Density

The shear performance and fracture behavior of microscale ball grid array structure Cu/Sn–3.0Ag–0.5Cu/Cu solder joints with increasing electric current density (from 1.0 × 103 to 6.0 × 103 A/cm2) at various test temperatures (25 °C, 55 °C, 85 °C, 115 °C, 145 °C, and 175 °C) were investigated systematically. Shear strength increases initially, then decreases with increasing current density at a test temperature of no more than 85 °C; the enhancement effect of current stressing on shear strength decreases and finally diminishes with increasing test temperatures. These changes are mainly due to the counteraction of the athermal effect of current stressing and Joule heating. After decoupling and quantifying the contribution of the athermal effect to the shear strength of solder joints, the results show that the influence of the athermal effect presents a transition from an enhancement state to a deterioration state with increasing current density, and the critical current density for the transition decreases with increasing test temperatures. Joule heating is always in a deterioration state on the shear strength of solder joints, which gradually becomes the dominant factor with increasing test temperatures and current density. In addition, the fracture location changes from the solder matrix to the interface between the solder matrix and the intermetallic compound (IMC) layer (the solder/IMC layer interface) with increasing current density, showing a ductile-to-brittle transition. The interfacial fracture is triggered by current crowding at the groove of the IMC layer and driven by mismatch strain at the solder/IMC layer interface, and the critical current density for the occurrence of interfacial fracture decreases with increasing test temperatures.

Numerical and Experimental Investigations of the Thermal Fatigue Lifetime of CBGA Packages

A thermal fatigue lifetime prediction model of ceramic ball grid array (CBGA) packages is proposed based on the Darveaux model. A finite element model of the CBGA packages is established, and the Anand model is used to describe the viscoplasticity of the CBGA solder. The average viscoplastic strain energy density increment ΔWave of the CBGA packages is obtained using a finite element simulation, and the influence of different structural parameters on the ΔWave is analyzed. A simplified analytical model of the ΔWave is established using the simulation data. The thermal fatigue lifetime of CBGA packages is obtained from a thermal cycling test. The Darveaux lifetime prediction model is modified based on the thermal fatigue lifetime obtained from the experiment and the corresponding ΔWave. A validation test is conducted to verify the accuracy of the thermal fatigue lifetime prediction model of the CBGA packages. This proposed model can be used in engineering to evaluate the lifetime of CBGA packages.

Millimeter-Wave Active Integrated Semielliptic CPW Slot Antenna With Ultrawideband Compensation of Ball Grid Array Interconnection

Millimeter-Wave Active Integrated Semielliptic CPW Slot Antenna With Ultrawideband Compensation of Ball Grid Array Interconnection

Mixed Assembly of Lead-free Solder Joint: A Short Review

The transition from lead (Pb) to Pb-free solder has arisen the need for the development of the reliability of mixed assemblies solder joint research. Mixed assemblies are defined as solder joints that joint together with different compositions or solder forms for example Ball Grid Array (BGA) and solder paste. During the transition period of solder materials, mixed assemblies are still used in electronic packaging. In addition, Pb-free manufacturing has been forced to release some of the product categories since legislation banning the use of lead solder in electronic assemblies. This phenomenon causes health and environmental concern of the Pb solder used in electronic assembly. Hence, some electronic assemblies will continue to use traditional eutectic Sn–Pb solder paste while others will use Pb-free solder paste. This situation indicates that the use of mixed assemblies in electronics manufacturing is still inevitable. This paper presents a projection of the reliability of mixed assembly’s Pb-free solder joint.

Thermal cycling effect on the crack formation of solder joint in ball grid array package

Ball grid array (BGA) technology is one of the technologies used in surface mount technology (SMT). It provides many interconnection points via the solder ball and thus give advantages such as good heat dissipation, improved the PCB design, BGA package become robust and reliable. In electronic industry, the reliability of BGA package is being concerned. Thermal cycling test (TCT)is one of typical reliability test used to investigate the reliability of the BGA package. This study investigates on the thermal cycling effect on the crack formation of solder joint in ball grid array package. The BGA package was subjected to thermal cycle test with temperature cyclic of -40°C and 85°C for 500, 750 and 1000 cycles. The finding shows that the cracks were observed in solder joint in 750 and 1000 cycles. This shows that the BGA package is sensitive to the thermal cycling and effect its reliability. The package was modified with adding underfill materials and tested through the same cycles. Cross sectional and Dye and pry test show no crack formation and dye penetration for all thermal cycles in the BGA package with underfill.

A Binarized Neural Network Approach to Accelerate in-Vehicle Network Intrusion Detection

Controller Area Network (CAN) is the de facto standard for in-vehicle networks. However, it is inherently vulnerable to various attacks due to the lack of security features. Intrusion detection systems (IDSs) are considered effective approaches to protect in-vehicle networks. IDSs based on advanced deep learning algorithms have been proposed to achieve higher detection accuracy. However, those systems generally involve high latency, require considerable memory space, and often result in high energy consumption. To accelerate intrusion detection and also reduce memory and energy costs, we propose a new IDS system using Binarized Neural Network (BNN). Compared to full-precision counterparts, BNNs can offer faster detection, smaller memory cost, and lower energy consumption. Moreover, BNNs can be further accelerated by leveraging Field-Programmable Grid Arrays (FPGAs) since BNNs cut down the hardware consumption. The proposed IDS is based on a BNN model that suits CAN traffic messages and takes advantage of sequential features of messages rather than each individual message. We also explore various design choices of BNN, including increasing network width and depth, to improve accuracy as BNNs typically sacrifice accuracy. The performance of our IDS is evaluated with four different real vehicle datasets. Experimental results show that the proposed IDS reduces the detection latency (3 times faster) on the same CPU platform while maintaining acceptable detection rates compared with full-precision models. We also examine the proposed IDS on multiple platforms, and our results show that using FPGA hardware reduces the detection latency dramatically (128 times faster) with lower power consumption compared to an embedded CPU device. Furthermore, we evaluate BNNs with different designs. Our experimental results demonstrate that wider or deeper models definitely improve accuracy at the cost of increased latency and model sizes to varying degrees. Applications are recommended to choose the appropriate model design they need depending on available resources they have.

The study of dynamic dispensing pattern effects on capillary driven underfill process

In the present days where technology has become one of the must have items by our community, the needs of reliable electronic packaging has become crucial. This work presents the effect of different dispensing patterns on capillary driven underfill process namely I, L and U pattern in flip chip packaging. In this study, the real dynamic dispensing system that had been applied in underfilling process was simulated with a three-dimensional flip chip model that was constructed using SolidWorks and modelled using ANSYS FLUENT. As modelled, underfill material of 0.3 Pa.s viscosity was injected into a 1 mm gap of a 30x30 mm flip chip with full ball grid array package. The injection time was fixed at 3 s for all three dispensing patterns. The result obtained showed that the U pattern filled the gap the fastest followed by L pattern and I pattern but L pattern is the best due to its relatively low filling time and less void formation.

Microstructure Study of Mix Assembly Lead-free Sn-Ag-Cu Ball Grid Array and Sn-10Cu Solder Paste

In recent years, electronic technologies have been striving to minimize the use of lead in their manufacturing and production. As a result, the electronic packaging industry is slowly transitioning from lead solder to lead-free solder. Though environmentally lead-free solders are advantageous, there are still needs some work in meeting current technological demand and requirements. In this study, the microstructure analysis on lead-free Sn-Ag-Cu Ball Grid Array (BGA) and Sn10Cu solder paste was done. The main aim of this study is to investigate the effect of isothermal aging on the microstructure of the solder paste joint and evaluate the intermetallic compound (IMC) thickness on the solder joint reliability. Optical Microscope (OM) and ImageJ software have been utilized to study the bulk solder microstructure. The results show that the bulk microstructure consists of β-Sn and Cu6Sn5 / β-Sn eutectic phases. The IMC layer has undergone rapid growth with increasing aging temperature and time. The two main IMC layers (Cu3Sn and Cu6Sn5) grew thicker due to high temperature. The growth kinetic of Sn10Cu resulted in 16.70 kJ/mol activation level. Therefore, the significance of the findings from this study might provide a potential answer for future development for highly reliable solder joint applications.

Reliability Characterization of Solder Joints in Electronic Systems Through a Neural Network Aided Approach

Rapid and precise reliability evaluation of electronic circuits plays a key role in the design stage of the electronic systems. The task becomes even more difficult when several major parameters contribute into the reliability evaluation. This paper proposes a neural network aided approach as a prediction tool for estimating the useful lifetime of the ball shaped solder joint as the most resistless part under accidental drops in the electronic devices. Several contributory factors including ball grid array (BGA) chip location, printed circuit board (PCB) thickness, solder alloy composition and solder ball volume are considered in our proposed rapid prediction model and their effects are investigated. 480 finite element simulations as well as 20 experimental tests are performed to obtain an enriched database for our neural network based prediction model. The accuracy of the proposed model is calculated as 97.55% in comparison with the finite element and the experimental results. Ability of considering multi contributory factors in the reliability evaluation of the BGA chip makes our proposed approach be a suitable candidate in design for reliability of the electronic systems.

A New Approach for Assessing the Reliability of Electronic Assemblies Using Fuzzy Logic for Multi-criteria Optimization

Abstract The reliability of electronic assemblies is a vital criterion used to assure product quality over its lifetime. Weibull distribution is the most common distribution utilized to describe the reliability data. Most of the studies use the Weibull scale parameter, or characteristic life, to compare alternatives and make a selective decision. This may not lead to achieving the optimal parameters which can be problematic because this method doesn’t consider the variability behavior of the fatigue life. In this study, a new approach for process parameters selection is proposed to find the optimal parameter values that improve the micro-optimality selection process based on reliability data. In this study, a new approach is proposed based on examining the solder joint reliability by using a multi criteria analysis. The fuzzy logic is utilized as a tool to solve the multi criteria problem that is presented from the proposed approach. The reliability of microelectronic connections in thermal cycling operating conditions is used as a validation case study. In the validation case study, the optimal process parameters are found for ball grid array electronic components. Two levels of the solder sphere materials, three levels of the surface finish, and 10 levels of solder paste alloys are studied as process parameters. Using the proposed approach, four quality responses are employed to assess the reliability data, including the scale parameter, the B10 (life at 10% of the population failure), mean-standard deviation response, and the signal to noise ratio (SNR). The fuzzy logic is applied to solve the multiresponse problem. An optimal process parameter setting that considers different quality characteristics was found for the validation case study. ENIG surface finish, SAC305 solder sphere, and material six were the optimal factor levels that are obtained for the aged CABGA208 component using the proposed approach.

Backplate-reinforced structures for enhancing solder joint reliability of server CPU assembly under thermal cycling

ABSTRACT To meet the requirement of the high I/O and fine-pitch interconnects, the conventional insertion-mount socket for central processing unit (CPU) has been changed to surface-mount one with ball grid array. The solder ball joint reliability of the socket used in the CPU assembly becomes very important. In this study, the socket's solder joint reliability of the backplate-reinforced CPU assembly and its related mechanics under mechanical and thermal loadings are investigated experimentally using strain gauge and shadow moiré, and numerically by a finite element method (FEM). The validated FEM results have suggested that maximum stress of solder balls increases almost linearly with decreasing the backplate thickness under mechanical loading during the CPU assembly, but is insensitive to the backplate thickness under thermal loading during the thermal cycling. It is also found that the residual (bending) strain on the PCB proportional to the maximum von Mises stresses of solder joints (or balls) can be used as a key parameter to correlate with the solder joint failures or cracks during the thermal cycling. Overall, experimental and FEM results in this study reveal that solder joint reliability in the CPU assembly during thermal cycling can be improved by adopting the thicker reinforced backplate.