GHz Transmitter Research Articles

An 80 GHz Low-Noise Amplifier Resilient to the TX Spillover in Phase-Modulated Continuous-Wave Radars

An 80 GHz transmitter leakage cancellation circuit is implemented and integrated together with a low-noise amplifier (LNA) as part of a receiver front-end for a phase-modulated continuous-wave radar. The cancellation is achieved by subtracting a copy of the leakage signal from the received one at the output of the LNA. The system incorporates an analog feedback loop to adjust the amplitude of the leakage copy, as well as a vector modulator to adjust its phase. The proposed 80 GHz LNA with transmitter leakage cancellation is implemented in 28 nm CMOS technology and achieves a gain of 15.2 dB, NF of 5.5 dB, and IP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">1dB</sub> of -15.5 dBm while attenuating the transmitter leakage by 27.5 dB.

A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop

A high-power 320 GHz transmitter using 130 nm SiGe BiCMOS technology ( $f_{T}/f_{\max} =$ 220/280 GHz) is reported. This transmitter consists of a 4 × 4 array of radiators based on coupled harmonic oscillators. By incorporating a signal filter structure called return-path gap coupler into a differential self-feeding oscillator, the proposed 320 GHz radiator simultaneously maximizes the fundamental oscillation power, harmonic generation, as well as on-chip radiation. To facilitate the TX-RX synchronization of a future terahertz (THz) heterodyne imaging chipset, a fully-integrated phase-locked loop (PLL) is also implemented in the transmitter. Such on-chip phase-locking capability is the first demonstration for all THz radiators in silicon. In the far-field measurement, the total radiated power and EIRP of the chip is 3.3 mW and 22.5 dBm, respectively. The transmitter consumes 610 mW DC power, which leads to a DC-to-THz radiation efficiency of 0.54%. To the authors' best knowledge, this work presents the highest radiated power and DC-to-THz radiation efficiency in silicon-based THz radiating sources.

A Single-Chip Full-Duplex High Speed Transceiver for Multi-Site Stimulating and Recording Neural Implants.

We present a novel, fully-integrated, low-power full-duplex transceiver (FDT) to support high-density and bidirectional neural interfacing applications (high-channel count stimulating and recording) with asymmetric data rates: higher rates are required for recording (uplink signals) than stimulation (downlink signals). The transmitter (TX) and receiver (RX) share a single antenna to reduce implant size and complexity. The TX uses impulse radio ultra-wide band (IR-UWB) based on an edge combining approach, and the RX uses a novel 2.4-GHz on-off keying (OOK) receiver. Proper isolation (>20 dB) between the TX and RX path is implemented 1) by shaping the transmitted pulses to fall within the unregulated UWB spectrum (3.1-7 GHz), and 2) by space-efficient filtering (avoiding a circulator or diplexer) of the downlink OOK spectrum in the RX low-noise amplifier. The UWB 3.1-7 GHz transmitter can use either OOK or binary phase shift keying (BPSK) modulation schemes. The proposed FDT provides dual band 500-Mbps TX uplink data rate and 100 Mbps RX downlink data rate, and it is fully integrated into standard TSMC 0.18- μm CMOS within a total size of 0.8 mm(2). The total measured power consumption is 10.4 mW in full duplex mode (5 mW at 100 Mbps for RX, and 5.4 mW at 500 Mbps or 10.8 pJ/bit for TX). Additionally, a 3-coil inductive link along with on-chip power management circuits allows to powering up the implantable transceiver wirelessly by delivering 25 mW extracted from a 13.56-MHz carrier signal, at a total efficiency of 41.6%.

A High Performance and Fully Differential V-Band CMOS Transmitter

This work presents the design of high performance components and their integration into a fully differential 60 GHz transmitter on 90 nm CMOS technology. The design is optimized to cover all four channels of the IEEE 802.11ad standard. Further, the effects of fully differential topology and transformer based design on different aspects of the transmitter performance are discussed. The measured results of the transmitter show average values of around 25 dB conversion gain, 15 dBm saturated output power, 13 dBm output power at 1dB compression point and -92 dBc/Hz phase noise at 1 MHz offset for all channels with a total chip size of 3.8 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

A mm-Precise 60 GHz Transmitter in 40 nm CMOS for Discrete-Carrier Indoor Localization

This paper presents a multicarrier 60 GHz transmitter for distance measurement (ranging) in an indoor wireless localization system, achieving mm-precision with high update rate. The architecture comprises a baseband subcarrier generator, an upconverter, and a power amplifier. There are three key innovations, all stemming from careful hardware-algorithm co-design: 1) efficient frequency planning of the 6 GHz-wide band; 2) power-efficient multicarrier signal generation by means of digital frequency divisions exploiting the phase-based time-of-arrival ranging algorithm; and 3) PAPR reduction to enable efficient operation of the power amplifier. By implementing these key techniques, 0.7-2.7 mm precision is achieved over 5 m measured distance with 5.4 μs symbol duration. During operation, the core digital subcarrier generator generates 16 non-equidistant subcarriers from a 3 GHz input clock, while consuming an average power of 1.8 mW out of 0.9V supply. The upconverter and the power amplifier altogether consume around 127 mW. The total area of the transmitter is 1.1 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> . The chip is fabricated in a 40nm general purpose CMOS process.

Low-cost planar microwave imaging system

In this paper, the design, construction and measurements of a low-cost novel microwave imaging system, a microwave camera, is presented. The design is based on a 10 GHz transmitter using a horn antenna, an array of microstrip receive antennas and a switching network. The received data is followed by a fast down converter to baseband and a custom-designed data acquisition system and graphical interface. The system offers novelty in terms of distinguishing materials of different dielectric constants, the operating frequency band and receiver antenna design (retina). The scanning and switching stages presented in this work are also new. A prototype of the proposed system was built and used to image objects of different materials and dielectric characteristics. Using the obtained results, the performance of the system was then analysed with very encouraging results.

A Silicon Micromachined Eight-Pixel Transceiver Array for Submillimeter-Wave Radar

An eight-pixel transceiver array for operation in a 340 GHz imaging radar is presented. Silicon micromachining is applied to fabricate the submillimeter-wave front-end components to increase the density and uniformity of the array while lowering the cost compared to metal machining. Performance comparable with discrete metal machined housings was achieved with the 340 GHz transmitter nominally producing 0.5 mW and the mixers having a DSB noise temperature of 2000 K with a conversion loss of 8 dB. Radar performance is primarily limited by the isolation of the hybrid coupler, which is typically 28 dB, but excellent imaging performance is still achieved and improvements in penetration compared to higher frequency imaging radars is demonstrated.

A 60 GHz low power direct‐conversion quadrature‐phase transmitter in 130 nm CMOS with low profile cavity backed antenna

ABSTRACTThis article presents the analysis, design, and implementation of a 60 GHz transmitter in 130 nm bulk CMOS, focusing on low power and high performance applications. The low power transmitter lineup consists of two double‐balanced Gilbert‐cells with dynamic current injection, on chip FGCPW meandering ring‐hybrid balun, Lange coupler, combiner, preamplifier, and low power transformer coupled power amplifier. A planar antenna with above 6 dB gain is also implemented. The measured output −1 dB compression point of the power amplifier is 9.6 dBm with 8.6 dB gain, and the 3 dB bandwidth is from 47 to 67 GHz (power amplifier) while drawing 90 mA from a 1.2 V supply. The mixer, preamplifer, and drive amplifier consume 12, 26, and 68 mA, respectively. The transmitter up‐converting an IF of 200 MHz to RF at 60.2 GHz achieve a total gain of 17.17 dB (simulated 21.09 dB) and saturation power higher than 9.53 dBm. © 2015 Wiley Periodicals, Inc. Microwave Opt Technol Lett 57:785–789, 2015

Intelligent Surveillance Robot with Obstacle Avoidance Capabilities Using Neural Network.

For specific purpose, vision-based surveillance robot that can be run autonomously and able to acquire images from its dynamic environment is very important, for example, in rescuing disaster victims in Indonesia. In this paper, we propose architecture for intelligent surveillance robot that is able to avoid obstacles using 3 ultrasonic distance sensors based on backpropagation neural network and a camera for face recognition. 2.4 GHz transmitter for transmitting video is used by the operator/user to direct the robot to the desired area. Results show the effectiveness of our method and we evaluate the performance of the system.

Integrated D-band transmitter and receiver for wireless data communication in 65 nm CMOS

A 140 GHz transmitter (Tx) and receiver (Rx) chip set has been developed in 65 nm CMOS by using on---off keying non-coherent modulation to support high speed proximity data communication. To the author's best knowledge, it enables the first integrated multi-Gbps data link in D-band by saving power hungry frequency synthesizer, high speed data convertors and complicated digital signal processor. The Tx and Rx occupy 0.03 and 0.12 mm2 chip areas, respectively. To validate the communication at 140 GHz carrier frequency, a data link has been built to demonstrate up to 2.5 Gbps data rate with power consumption of 115/120 mW for Tx/Rx respectively.

Tunable 245 GHz transmitter and receiver in SiGe technology for gas spectroscopy

A 245 GHz sensor system for gas spectroscopy is presented, which includes an integrated SiGe transmitter (TX) and receiver (RX), and a 0.6 m-long gas absorption cell between the TX and RX modules. The integrated local oscillators (LOs) of TX and RX chips are controlled by two external phase-locked loops (PLLs), whose reference frequencies are swept with constant frequency offset for a low intermediate frequency of the RX. The RX consists of a differential low-noise amplifier, an integrated 122 GHz LO with a 1/64 divider, a 90° differential hybrid and an active subharmonic mixer. The TX consists of an integrated 122 GHz LO with a 1/64 divider, and a frequency doubler. The TX and RX chips are fabricated in 0.13 µm SiGe BiCMOS technology with f T/f max of 300 GHz/500 GHz. Using external dielectric lenses for the TX and RX modules, the gas absorption spectra were measured for acetonitrile and methanol.

Single-Chip Fully Integrated Direct-Modulation CMOS RF Transmitters for Short-Range Wireless Applications

Ultra-low power radio frequency (RF) transceivers used in short-range application such as wireless sensor networks (WSNs) require efficient, reliable and fully integrated transmitter architectures with minimal building blocks. This paper presents the design, implementation and performance evaluation of single-chip, fully integrated 2.4 GHz and 433 MHz RF transmitters using direct-modulation power voltage-controlled oscillators (PVCOs) in addition to a 2.0 GHz phase-locked loop (PLL) based transmitter. All three RF transmitters have been fabricated in a standard mixed-signal CMOS 0.18 μm technology. Measurement results of the 2.4 GHz transmitter show an improvement in drain efficiency from 27% to 36%. The 2.4 GHz and 433 MHz transmitters deliver an output power of 8 dBm with a phase noise of −122 dBc/Hz at 1 MHz offset, while drawing 15.4 mA of current and an output power of 6.5 dBm with a phase noise of −120 dBc/Hz at 1 MHz offset, while drawing 20.8 mA of current from 1.5 V power supplies, respectively. The PLL transmitter delivers an output power of 9 mW with a locking range of 128 MHz and consumes 26 mA from 1.8 V power supply. The experimental results demonstrate that the RF transmitters can be efficiently used in low power WSN applications.

A 210–227 GHz Transmitter With Integrated On-Chip Antenna in 90 nm CMOS Technology

This paper presents a transmitter operating in the 210-227 GHz in 90 nm CMOS, based on a Colpitts VCO. The third harmonic of the generated VCO fundamental signal is coupled to an on-chip dipole antenna. A simplified model is presented for the operation and the design of the circuit, which compares well with simulated and measured results. The transmitter achieves an EIRP of +1.8 dBm at 217 GHz and directivity of about +10 dBi. The circuit consumes 128 mW of DC power and an area of 0.53 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

A 24/77‐GHz SiGe BiCMOS transmitter chipset for automotive radar

AbstractThis article presents a 24/77‐GHz transmitter chipset for automotive radar sensors implemented in a 160/175‐GHz fT/fmax SiGe BiCMOS technology. The chipset adopts a dual‐band architecture consisting of a 24‐GHz section for ultra‐wideband short‐range radar operation, which is also exploited to drive the 77‐GHz long‐range radar transmitter front‐end. The proposed design adopts a single 24‐GHz frequency synthesizer to implement both radar operation modes. The transmitter chipset is able to deliver a maximum output power of 3 dBm and 12 dBm at 24 GHz and 77 GHz, respectively. The 24‐GHz transmitter demonstrates to operate with pulse widths of 0.5 ns and 1 ns in compliance with the transmission mask designed by ETSI. The 77‐GHz transmitter exhibits a power gain of 20 dB, an output power of 12 dBm, and an output referred 1‐dB compression point of 9.5 dBm, while drawing 155 mA from a 2.5‐V supply voltage. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 55:782–786, 2013; View this article online at wileyonlinelibrary.com. DOI: 10.1002/mop.27425

DESIGN AND IMPLEMENTATION OF SMART SENSING PLATFORM FOR ROVER-BACK CANSAT USING CORTEX-M3

In this study, a CanSat with capability of returning back to target is designed amd implemented. The CanSat is controlled by a state-of-the-art MBED 32-bit microcontroller. A Zigbee Based Smart Sensing Platform for Monitoring Environmental Parameters has been designed and developed. The smart weather station consists cortext-M3 based measuring units which collect the value of the temperature, relative humidity, pressure and sunlight. These units send their data wireless to a central station, which collects the data, stores and displays them into a database. The facility of adding a few more sensors and a few more stations has been provided. The main components are the pressure, ultrasonic, gps sensors and the 2.4 GHZ transmitter. The mission is planned for two stages which are flight back to the target by a paraglider and rovering on the ground on wheels. The process will be monitored on the ground sation via the GoogleEarth software. The electronics&amp;hardware design and the control algorithm is discussed in depth in this paper.

Transmitter front-end with a new wideband active balun in 65-nm CMOS technology

A 2.4 GHz transmitter front-end with a wideband active balun is proposed.The wideband active balun is able to work ideally by adopting a resistive compensation technique, which balances the gain of the differential input. In addition, a variable-gain preamplifier driver with a dynamic range of 18 dB is utilized for the autogain loop control feature. The proposed wideband active balun only occupies 15 × 27 μm2, which is profoundly small compared with conventional baluns and is promising in the differential to single signal conversion in wideband applications. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2868–2871, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27190

A dual-mode 6–9 GHz transmitter for OFDM-UWB

This paper presents a fully integrated dual-mode 6 to 9 GHz transmitter for both WiMedia and China MB-OFDM UWB applications. The proposed transmitter consists of a dual-mode I/QLPF, an up-conversion mixer, a two-stage power driver amplifier and a broadband high-speed frequency divider with LO buffers for I/Q LO carrier generation. The measurement results show that the gain ripple of the transmitter is within ±1.5/±2.8 dB from 6 to 8.7/9 GHz. The output IP3 is about +13.2 dBm, the output 1dBCP is around +2.8 dBm, and the LO leakage/sideband rejection ratio is about −35/−38 dBc. The ESD protected chip is fabricated with a TSMC 0.13 μm RFCMOS process with a die size of 1.6 × 1.3 mm2 and the core circuit consumes only 46 mA under a 1.2 V supply.

A K-BAND TRANSMITTER FRONT-END BASED ON DIFFERENTIAL SWITCHES IN 0.13-µm CMOS TECHNOLOGY

This paper presents the design and test results of a 20- GHz transmitter front-end implemented in the TSMC 0.13-m CMOS process. The chip consists of a voltage-controlled oscillator (VCO), an RC phase splitter, and two difierential switches. To realize the K-band transmitter function, the two difierent switches are designed to serve the purpose of frequency doubler and phase modulator, respectively. These two features are verifled in the implemented chip and, as a result, the chip can serve as a transmitter front-end. The measured total current consumption of the chip core circuit is 26mA under a DC supply voltage of 1.2V. The chip size is 1:03 £ 0:93mm 2 .

A 3.1–4.8 GHz transmitter with a high frequency divider in 0.18 μm CMOS for OFDM-UWB

A fully integrated low power RF transmitter for a WiMedia 3.1–4.8 GHz multiband orthogonal frequency division multiplexing ultra-wideband system is presented. With a separate transconductance stage, the quadrature up-conversion modulator achieves high linearity with low supply voltage. The co-design of different resonant frequencies of the modulator and the differential to single (D2S) converter ensures in-band gain flatness. By means of a series inductor peaking technique, the D2S converter obtains 9 dB more gain without extra power consumption. A divided-by-2 divider is used for carrier signal generation. The measurement results show an output power between −10.7 and −3.1 dBm with 7.6 dB control range, an OIP3 up to 12 dBm, a sideband rejection of 35 dBc and a carrier rejection of 30 dBc. The ESD protected chip is fabricated in the Jazz 0.18 μm RF CMOS process with an area of 1.74 mm2 and only consumes 32 mA current (at 1.8 V) including the test associated parts.

Implementation of a Power Combining Network for a 2.45 GHz Transmitter Combining LINC and EER

A power combining network with 180N hybrid for a 2.45 GHz Transmitter Combining LINC and EER has been analyzed, built and measured. The network feeds the wasted outphasing power partly back to the power supply and therefore improves the overall power efficiency. The recycling circuit was designed and simulated with ADS. A measured peak recycling efficiency of 60% was achieved with commercial Schottky diodes at 2.45 GHz at an input power of 36 dBm.