Gate Voltage Region Research Articles

Unusual resonance property of graphene/h-BN stacked mechanical resonators

We fabricate the graphene/h-BN stacked mechanical resonator and investigate the gate voltage dependence of the resonance property of the graphene/h-BN mechanical resonator. The mode splitting on the resonance of the stacked resonator is found at a specific gate voltage region, where the frequency difference of two peaks corresponding to two modes showed the square of gate voltage dependence. This implies that the mode splitting observed is that the electrostatic attraction on the graphene layer influences the interlayer interaction of graphene and h-BN. The energy transfer between the two resonance states was also observed.

Highly Sensitive Hybrid Oxide Phototransistors with Photoresponsive Zeolitic‐Imidazolate‐Frameworks for Real‐Time Light Detection

AbstractConventional oxide‐based thin‐film phototransistors (Ph‐TRs) with a hybrid structure with additional photoabsorbers show limitations in real‐time on/off operations without additional input bias. Here, hybrid InGaZnO (IGZO) Ph‐TRs utilizing zeolitic‐imidazolate‐framework‐67 (ZIF‐67), an electrically insulating material with a unique metal‐to‐metal charge transfer (MMCT) pathway enabling charge migration, are presented. A wide photodetection range and fast response/recovery speed without additional gate bias are achieved. In particular, ZIF‐67 used as a photoabsorber exhibits absorption of visible light over a wide range of wavelengths. Photoexcited electrons migrate through the MMCT pathway between Co ions and migrate to the IGZO conduction band, causing a significant change in the photocurrent (Iph) of the hybrid ZIF‐67/IGZO Ph‐TR. In the dark, ZIF‐67 immediately returns to the insulating state, resulting in a fast rise/fall time under dynamic photo‐stimulus. In addition, it exhibits repeatable photo‐sensing performance without persistent photocurrent behavior under pulsed light‐on/off cycles. A high photosensitivity of 108 for red light (592 nm, 0.1 mW cm–2) is obtained as it suppresses the dark current and amplifies photocurrent generation in the subthreshold gate voltage region. This combination of fast response time, high photosensitivity, and high stability is promising for ideal Ph‐TRs, enabling real‐time detection even for high‐frequency operations.

A new normalized direct conductance method for observation of Poole-Frenkel current

This article presents a method to distinguish between the various conduction mechanisms through insulators in MOS structures whose expressions are exponential functions of voltage. This method accounts for the voltage drop (ΔV) across the parasitic resistance that could be significantly present in series with the MOS structure. This graphical method is based on a new Normalized Direct Conductance function to extract the value ΔV. The validity of the proposed method has been ascertained by using Silvaco TCAD simulations and measurements of the gate leakage current of an experimental n-channel MOSFET. The band diagram with the corresponding numerical values also verifies the extracted value of ΔV. It is concluded that the dominant conduction mechanism is Poole-Frenkel for the middle gate voltage region while Hot Electron Injection dominates for low- and high-voltage regions.

Full parity phase diagram of a proximitized nanowire island

We measure the charge periodicity of Coulomb blockade conductance oscillations of a hybrid InSb-Al island as a function of gate voltage and parallel magnetic field. The periodicity changes from $2e$ to $1e$ at a gate-dependent value of the magnetic field, $B^*$, decreasing from a high to a low limit upon increasing the gate voltage. In the gate voltage region between the two limits, which our numerical simulations indicate to be the most promising for locating Majorana zero modes, we observe correlated oscillations of peak spacings and heights. For positive gate voltages, the $2e$-$1e$ transition with low $B^*$ is due to the presence of non-topological states whose energy quickly disperses below the charging energy due to the orbital effect of the magnetic field. Our measurements demonstrate the importance of a careful exploration of the entire available phase space of a proximitized nanowire as a prerequisite to define future topological qubits.

(Invited) Heterojunction Channel Engineering for in-Ga-Zn-O Thin-Film Transistors

Heterojunction channel engineering approach is presented as a means of enhancing the performance and reliability of In–Ga–Zn–O thin-film transistors (IGZO TFTs). A bottom-gate IGZO TFT with the heterojunction channel was formed by depositing an In-rich IGZO on a typical composition of IGZO111. A potential well of 0.4 eV was expected to form for electrons at the heterojunction interface. Field effect mobilities (μFE) of the TFTs were 12 cm2/Vs and 23 cm2/Vs for homogeneous IGZO111 and high-In IGZO channels, respectively. In addition, threshold voltage stability (ΔVth) of the TFTs showed big a difference between homogeneous IGZO111 and high-In IGZO channels under positive bias and temperature stress (PBTS). The IGZO111 TFT exhibited good Vth stability (ΔVth of +0.4 V) after the PBTS of +20 V for 104 sec at 60 °C. In contrast, although the homogeneous high-In IGZO TFT exhibited a higher μFE than the IGZO111 TFT, the PBTS stability noticeably degraded (ΔVth of +7.0 V) from the IGZO111 TFT.For the heterojunction channel TFTs, when the high-In IGZO layer was deposited on the IGZO layer, μFE increased from the IGZO111 TFT especially in low gate voltage (VGS) region. In addition, the PBTS stability of the heterojunction channel TFT was clearly improved from the high-In IGZO TFT by inserting IGZO111 layer at the interface between HI-IGZO and the GI. A maximum μFE of 24.7 cm2/Vs and improved PBTS stability (ΔVth of +0.3 V) were achieved by the heterojunction channel TFT with a high-In IGZO/IGZO111 thicknesses of 10/5 nm.Device simulation results revealed that quantum confinement effect in the heterojunction channel played an important role in determining carrier transport properties in the TFT, result in improving μFE and PBTS stability. A channel engineering approach will provide a method of overcoming the trade-off between μFE and the PBTS stability of oxide TFTs.

Low Gate Lag Normally-Off p-GaN/AlGaN/GaN High Electron Mobility Transistor with Zirconium Gate Metal

The impact of gate metal on the leakage current and breakdown voltage of normally-off p-GaN gate high-electron-mobility-transistor (HEMT) with nickel (Ni) and zirconium (Zr) metals were studied and investigated. In this study, a Zr metal as a gate contact to p-GaN/AlGaN/GaN high mobility transistor (HEMT) was first applied to improve the hole accumulation at the high gate voltage region. In addition, the ZrN interface is also beneficial for improving the Schottky barrier with low nitrogen vacancy induced traps. The features of Zr are low work function (4.05 eV) and high melting point, which are two key parameters with p-GaN Schottky contact at reversed voltage. Therefore, Zr/p-GaN interface exhibits highly potential for GaN-based switching power device applications.

Investigations of the gate instability characteristics in Schottky/ohmic type p-GaN gate normally-off AlGaN/GaN HEMTs

In this work, the impacts of Schottky- and ohmic-type gate contacts on devices stability of p-GaN gate AlGaN/GaN high electron mobility transistors were experimentally investigated. In the Schottky-gate devices, drastic gate instability were observed under positive gate bias and elevated temperatures, featuring evident negative threshold voltage shift especially at low gate voltage region. By contrast, ohmic-gate devices exhibit superior gate stability with near-zero threshold voltage shift. Correspondingly, a physics picture of hole injection/emission processes in the p-GaN layer was established for the understanding of the distinct gate stability behaviors with different gate contact types.

(Invited) Characteristics of Si Single-Electron Transistor under Illumination

Current of single-electron transistors (SETs) flows by means of one-by-one electron transfer. In a SET, the number of charges in the SET dot is determined by the gate voltage and capacitance between the gate and the dot. If the SETs are made of a semiconductor, the dot accumulates electrons and holes according to the positive and negative gate voltages, respectively. However, since the source and drain electrodes of SETs are made of n-type semiconductor, holes cannot be injected to the dot. A single-hole transistor (SHT) usually needs a p-type semiconductor for source and drain [1]. Here, we measured the SHT characteristics by the use of SET structure device under illumination. Holes excited in the semiconductor is thought to flow through the SET island according to the negative gate voltages. We made silicon SETs, which have n-type source and drain electrodes on thin SOI (silicon on insulator) wafer, by the use of pattern dependent oxidation (PADOX) method [2]. Clear current oscillations and Coulomb diamonds as a function of positive gate voltage were achieved. When the gate voltage was scanned to negative direction, almost no current was observed in the dark or under week photo-excitation. However, current oscillations were observed under the strong photo- excitation of 330 μW/cm2 from a halogen-lamp, though the peak current was limited by the photo-excited currents. Coulomb diamonds were also detected at negative gate voltage region. Photo-excited carriers in Si quantum dots also show another interesting features such as single-electron CCD [3] where electrons and holes exist in the same dot at the same time. In a SET, when a few holes generated by photo-excitation are trapped in the one side of the SET island under the vertical electric field, the number of trapped holes is detected by the electron current flowing through the other side of the island [4]. In the few electron regime, not only the number of net charges but also the each number of electrons and holes plays an important role to decide the electrical characteristics of SETs. However, these characteristics appeared only when the electrons and holes are divided by strong electric field. In this report, we show the characteristics of photo-excited SETs without strong vertical electric fields. When the gate voltage (V g) of a SET was scanned from low to high, drain current (I d) shows interesting features depending on the photo-excited conditions. Figure 1 shows I d-V g characteristics under three different conditions. In any conditions, Coulomb oscillations were observed. The characteristics measured in the dark are fundamental ones, in which the first peak corresponds to the first electron transferred to the SET island. When the SET was continuously irradiated, a new current peak emerges at the lower V g region, which is thought to be an effect of a positive charge (a hole) generated by photo excitation. The facts that the new current peak suddenly dropped and recovered again can be understood that the generated hole recombined with electron flowing through the SET island and another hole was generated again. In the one-shot excitation condition, the SET was illuminated only once at the starting V g, but scan was performed in the dark. Although the new peak was detected first, the current characteristics return to those of in the dark after the sudden current drop. These phenomena were thought to be caused by a photo-excited hole trapped in SiO2 near the SET island. Acknowledgement This work is supported by JSPS KAKENHI (15H01706, 16H0433906 and 16K18073) and by the Cooperative Research Project of the Research Center for Biomedical Engineering with Research Institute of Electronics, Shizuoka University.

Demonstration and analysis of channel mobility, trapped electron density and Hall effect at SiO2/SiC (03) interfaces

Low interface state density (Dit) and high field-effect mobility (μfe) at SiO2/4H-SiC (03) Metal-oxide-semiconductor (MOS) interfaces are known. In order to understand the behavior and the scattering mechanisms induced electrons in more detail, we fabricated the Hall-bar lateral MOSFETs on the 4H-SiC (03) substrate with various channel doping concentrations and evaluated the trapped electron densities and the Hall mobilities by split capacitance–voltage and Hall-effect measurements. Our results demonstrated that more than 80% of the induced electrons at the SiO2/4H-SiC MOS (03) interfaces contribute to the current conduction as the free electrons. The majority of the electron traps seemed to be located mainly at the edge of the conduction band because the trapped electron density increased around the threshold voltage and was saturated in the high gate voltage region.

Gate Conduction Mechanisms and Lifetime Modeling of p-Gate AlGaN/GaN High-Electron-Mobility Transistors

The gate conduction mechanisms in p-gallium nitride (GaN)/AlGaN/GaN enhancement mode transistors are investigated using temperature-dependent dc gate current measurements. In each of the different gate voltage regions, a physical model is proposed and compared to experiment. At negative gate bias, Poole–Frenkel emission (PFE) occurs within the passivation dielectric from gate to source. At positive gate bias, the p-GaN/AlGaN/GaN “p-i-n” diode is in forward operation mode, and the gate current is limited by hole supply at the Schottky contact. At low gate voltages, the current is governed by thermionic emission with Schottky barrier lowering in dislocation lines. Increasing the gate voltage and temperature results in thermally assisted tunneling (TAT) across the same barrier. An improved gate process reduces the gate current in the positive gate bias region and eliminates the onset of TAT. However, at high positive gate bias, a sharp increase in current is observed originating from PFE at the metal/ p-GaN interface. Using the extracted conduction mechanisms for both devices, accurate lifetime models are constructed. The device fabricated with the novel gate process exhibits a maximum gate voltage of 7.2 V at ${t}_{\textsf {1}\%}=\textsf {10}$ years.

Electric-field Control of Electronic States in WS2 Nanodevices by Electrolyte Gating.

A method of carrier number control by electrolyte gating is demonstrated. We have obtained WS2 thin flakes with atomically flat surface via scotch tape method or individual WS2 nanotubes by dispersing the suspension of WS2 nanotubes. The selected samples have been fabricated into devices by the use of the electron beam lithography and electrolyte is put on the devices. We have characterized the electronic properties of the devices under applying the gate voltage. In the small gate voltage region, ions in the electrolyte are accumulated on the surface of the samples which leads to the large electric potential drop and resultant electrostatic carrier doping at the interface. Ambipolar transfer curve has been observed in this electrostatic doping region. When the gate voltage is further increased, we met another drastic increase of source-drain current which implies that ions are intercalated into layers of WS2 and electrochemical carrier doping is realized. In such electrochemical doping region, superconductivity has been observed. The focused technique provides a powerful strategy for achieving the electric-filed-induced quantum phase transition.

Nitrogen plasma-treated multilayer graphene-based field effect transistor fabrication and electronic characteristics

Chemical doping with hetero-atoms is an effective method used to change the characteristics of materials. Nitrogen doping technology plays a critical role in regulating the electronic properties of graphene. Nitrogen plasma treatment was used in this work to dope nitrogen atoms to modulate multilayer graphene electrical properties. The measured I-V multilayer graphene-base field-effect transistor characteristics (GFETs) showed a V-shaped transfer curve with the hole and electron region separated from the measured current-voltage (I-V) minimum. GFETs fabricated with multilayer graphene from chemical vapor deposition (CVD) exhibited p-type behavior because of oxygen adsorption. After using different nitrogen plasma treatment times, the minimum in I-V characteristic shifted into the negative gate voltage region with increased nitrogen concentration and the GFET channel became an n-type semiconductor. GFETs could be easily fabricated using this method with potential for various applications. The GFET transfer characteristics could be tuned precisely by adjusting the nitrogen plasma treatment time.

Controlled Doping in Graphene Monolayers by Trapping Organic Molecules at the Graphene-Substrate Interface.

We report controlled doping in graphene monolayers through charge-transfer interaction by trapping selected organic molecules between graphene and underneath substrates. Controllability has been demonstrated in terms of shifts in Raman peaks and Dirac points in graphene monolayers. Under field effect transistor geometry, a shift in the Dirac point to the negative (positive) gate voltage region gives an inherent signature of n- (p-)type doping as a consequence of charge-transfer interaction between organic molecules and graphene. The proximity of organic molecules near the graphene surface as a result of trapping is evidenced by Raman and infrared spectroscopies. Density functional theory calculations corroborate the experimental results and also indicate charge-transfer interaction between certain organic molecules and graphene sheets resulting p- (n-)type doping and reveals the donor and acceptor nature of molecules. Interaction between molecules and graphene has been discussed in terms of calculated Mulliken charge-transfer and binding energy as a function of optimized distance.

Characterization of Graphene-based FET Fabricated using a Shadow Mask.

To pattern electrical metal contacts, electron beam lithography or photolithography are commonly utilized, and these processes require polymer resists with solvents. During the patterning process the graphene surface is exposed to chemicals, and the residue on the graphene surface was unable to be completely removed by any method, causing the graphene layer to be contaminated. A lithography free method can overcome these residue problems. In this study, we use a micro-grid as a shadow mask to fabricate a graphene based field-effect-transistor (FET). Electrical measurements of the graphene based FET samples are carried out in air and vacuum. It is found that the Dirac peaks of the graphene devices on SiO2 or on hexagonal boron nitride (hBN) shift from a positive gate voltage region to a negative region as air pressure decreases. In particular, the Dirac peaks shift very rapidly when the pressure decreases from ~2 × 10−3 Torr to ~5 × 10−5 Torr within 5 minutes. These Dirac peak shifts are known as adsorption and desorption of environmental gases, but the shift amounts are considerably different depending on the fabrication process. The high gas sensitivity of the device fabricated by shadow mask is attributed to adsorption on the clean graphene surface.

Temperature Effects on Charge Storage and Transfer of Nanocrystalline CdSe Embedded Zr-Doped HfO2 MOS Memory Device

The influence of temperature on the charge storage and transfer characteristics of the nanocrystalline CdSe embedded Zr-doped HfO2 high-k dielectric on the p-type Si wafer has been studied. With the increase of temperature, the hole-trapping capacity is increased but the electron-trapping follows the opposite trend, which results in a small reduction of the memory window. From the frequency dispersion measurement result, at high temperatures, holes are loosely trapped at the nanocrystal/high-k interface and electrons are mainly trapped in the bulk nanocrystal. The high temperature induces a larger leakage current because it enhances the charge supply and transfer in the high-k stack. At the low applied voltage, the charge transfer follows the Schottky emission mechanism. In the high, positive gate voltage region, charges are transferred following the Poole-Frenkel mechanism at the low temperature and the Fowler-Nordheim mechanism at the high temperature. The temperature has little effect on the sample's leakage current-gate voltage hysteresis due to the large charge trapping capability. In summary, temperature is an important factor in the operation of the nanocrystals embedded high-k memory device because it affects the charge storage and transfer mechanisms.

Local doping of graphene devices by selective hydrogen adsorption

N-type graphene fabricated by exposure to hydrogen gas has been previously studied. Based on this property of graphene, herein, we demonstrate local doping in single-layer graphene using selective adsorption of dissociative hydrogen at 350 K. A graphene field effect transistor was produced covered with PMMA on half of the graphene region. The charge neutrality point of the PMMA-window region shifted to a negative gate voltage (VG) region prominently compared with that of the PMMA-covered region. Consequently, a single graphene p-n junction was obtained by measuring the VG-dependent resistance of the whole graphene region. This method presents opportunities for developing and controlling the electronic structure of graphene and device applications.

Effects of Nitrogen Incorporation in HfO2 Grown on InP by Atomic Layer Deposition: An Evolution in Structural, Chemical, and Electrical Characteristics

We investigated the effects of postnitridation on the structural characteristics and interfacial reactions of HfO2 thin films grown on InP by atomic layer deposition (ALD) as a function of film thickness. By postdeposition annealing under NH3 vapor (PDN) at 600 °C, an InN layer formed at the HfO2/InP interface, and ionized NHx was incorporated in the HfO2 film. We demonstrate that structural changes resulting from nitridation of HfO2/InP depend on the film thickness (i.e., a single-crystal interfacial layer of h-InN formed at thin (2 nm) HfO2/InP interfaces, whereas an amorphous InN layer formed at thick (>6 nm) HfO2/InP interfaces). Consequently, the tetragonal structure of HfO2 transformed into a mixture structure of tetragonal and monoclinic because the interfacial InN layer relieved interfacial strain between HfO2 and InP. During postdeposition annealing (PDA) in HfO2/InP at 600 °C, large numbers of oxidation states were generated as a result of interfacial reactions between interdiffused oxygen impurities and out-diffused InP substrate elements. However, in the case of the PDN of HfO2/InP structures at 600 °C, nitrogen incorporation in the HfO2 film effectively blocked the out-diffusion of atomic In and P, thus suppressing the formation of oxidation states. Accordingly, the number of interfacial defect states (Dit) within the band gap of InP was significantly reduced, which was also supported by DFT calculations. Interfacial InN in HfO2/InP increased the electron-barrier height to ∼0.6 eV, which led to low-leakage-current density in the gate voltage region over 2 V.

Transport behaviors and mechanisms in cuspidal blockade region for silicon single-hole transistor

The Si single-hole transistor displays the anomalously-extended cuspidal blockade region, which is elongated toward the 45°-tilted direction normal to gate vs. drain bias voltage regions in the Coulomb blockade diagram. This is attributed to the formation of an ultra small Si quantum dot (QD) into the gate-all-around (GAA) stack. Namely, the large one-electron-addition energy (= 447 meV) from the 2-nm-size Si QD enables the clear Coulomb-blockade events at room temperature, and the large voltage gain from the GAA stack allows the cuspidal extension of the blockade region through the renormalization of Coulomb-blockade energies at the adjacent bias points near the initial Coulomb-blockade state.

Anomalous Zero-Bias Conductance Peak in a Nb–InSb Nanowire–Nb Hybrid Device

Semiconductor InSb nanowires are expected to provide an excellent material platform for the study of Majorana fermions in solid state systems. Here, we report on the realization of a Nb-InSb nanowire-Nb hybrid quantum device and the observation of a zero-bias conductance peak structure in the device. An InSb nanowire quantum dot is formed in the device between the two Nb contacts. Due to the proximity effect, the InSb nanowire segments covered by the superconductor Nb contacts turn to superconductors with a superconducting energy gap Δ(InSb) ∼ 0.25 meV. A tunable critical supercurrent is observed in the device in high back gate voltage regions in which the Fermi level in the InSb nanowire is located above the tunneling barriers of the quantum dot and the device is open to conduction. When a perpendicular magnetic field is applied to the devices, the critical supercurrent is seen to decrease as the magnetic field increases. However, at sufficiently low back gate voltages, the device shows the quasi-particle Coulomb blockade characteristics and the supercurrent is strongly suppressed even at zero magnetic field. This transport characteristic changes when a perpendicular magnetic field stronger than a critical value, at which the Zeeman energy in the InSb nanowire is E(z) ∼ Δ(InSb), is applied to the device. In this case, the transport measurements show a conductance peak at the zero bias voltage and the entire InSb nanowire in the device behaves as in a topological superconductor phase. We also show that this zero-bias conductance peak structure can persist over a large range of applied magnetic fields and could be interpreted as a transport signature of Majorana fermions in the InSb nanowire.

N-type graphene induced by dissociative H2 adsorption at room temperature

Studies of the interaction between hydrogen and graphene have been increasingly required due to the indispensable modulation of the electronic structure of graphene for device applications and the possibility of using graphene as a hydrogen storage material. Here, we report on the behaviour of molecular hydrogen on graphene using the gate voltage-dependent resistance of single-, bi-, and multi-layer graphene sheets as a function of H2 gas pressure up to 24 bar from 300 K to 345 K. Upon H2 exposure, the charge neutrality point shifts toward the negative gate voltage region, indicating n-type doping, and distinct Raman signature changes, increases in the interlayer distance of multi-layer graphene, and a decrease in the d-spacing occur, as determined by TEM. These results demonstrate the occurrence of dissociative H2 adsorption due to the existence of vacancy defects on graphene.