Fowler-Nordheim Tunneling Current Research Articles

Characterization of the Si/SiO2 interface morphology from quantum oscillations in Fowler–Nordheim tunneling currents

As design rules shrink to conform with ultra-large-scale integration device dimensions, gate dielectrics for metal–oxide–semiconductor field effect transistor structures are required to be scaled to below ∼60 Å, where some properties of the device, such as interface roughness, that are negligible for thicker films become critical. Microroughness at the interface of ultrathin MOS capacitors has been shown to degrade these devices. The present study focuses on the interfacial region of ∼50 Å SiO2 on Si, using the quantum oscillations in Fowler–Nordheim tunneling currents as a probe. The oscillations are sensitive to the electron potential and abruptness of the film and interfaces. In particular, inelastic scattering of the electrons will reduce the amplitude of the oscillations. The amplitude of the oscillations is used to examine the degree of microroughness at the interface that results from a preoxidation high temperature anneal in an inert ambient containing various amounts of H2O. Atomic force microscopy imaging has shown correlations supporting a microroughness induced change in the quantum oscillation amplitudes.

Characterization of the Si/SiO2 interface morphology from quantum oscillations in Fowler–Nordheim tunneling currents

Characterization of the Si/SiO2 interface morphology from quantum oscillations in Fowler–Nordheim tunneling currents

Electrical Characteristics of Ultra-Thin Multi-Layers of Poly-Si and Silicon Dioxide

ABSTRACTRough-surface polycrystalline silicon films have been used for fabrication of electrically erasable-programmable read-only-memories (EEPROM). Silicon-Rich Oxides (SRO), also known as semi-insulating polycrystalline silicon (SIPOS), have been recommended for use as electron injectors. The advantage of SRO as injectors is that both the bottom and top surfaces of the film can be used to obtain high field enhancement. An ultra-thin multi-layer structure of silicon and silicon dioxide has been fabricated by low pressure chemical vapor deposition (LPCVD). High resolution TEM shows alternating layers of 50 A thick SiO2 and polycrystalline Si (grain size ∼ 80 A) films were deposited and MOS capacitors using this multilayer dielectric were studied to understand their electrical characteristics. Both I-V and C-V measurements show that the Fowler-Nordheim tunneling current is proportional to the number of polycrystalline layers. The “turn-on” voltage of the tunneling current is determined by the thickness of first SiO2 layer, and the effective dielectric constant varies from 3.9 to 9.1, proportional to the number of poly-Si layers within the multi-layer structure (MLS). For a 350 Å stack (7 layers), the interface trap density, Dit, was 3×1010 traps/cm2, and the effective dielectric constant was roughly 9.

Microroughness at the Si/SiO2 Interface from Pre-Oxidation Annealing, Measured Using Quantum Oscillations in Fowler-Nordheim Tunneling Currents

ABSTRACTAs design rules shrink to conform with ULSI device dimensions, gate dielectrics for MOSFET structures are required to be scaled to even thinner proportions. Upon scaling the gate oxides below ∼60Å some properties of the device, such as interface roughness, that are negligible for thicker films become critical and must be evaluated. Microroughness at the interface of ultrathin MOS capacitors has been shown to degrade these devices.We are studying the interfacial region of ∼50Å SiO2 on Si using the quantum oscillations in Fowler-Nordheim tunneling currents. The oscillations are sensitive to the electron potential and abruptness of the film and its interfaces. In particular, inelastic scattering and/or thickness inhomogeneities in the film will reduce the amplitude of the oscillations. We are using the amplitude of the oscillations to examine the degree of microroughness at the interface that results from a pre-oxidation high temperature anneal in an inert ambient containing various amounts of H2O. Preliminary AFM imaging has shown correlations supporting our microroughness interpretation of the quantum oscillation amplitudes.

Pre-Oxidation Anneal Kinetics: Interface Degradation of Thin SIO2 Films on Silicon

ABSTRACTThe high temperature anneal of hydrogen terminated silicon has been shown to etch and roughen its surface. We attempt to describe the degree of this roughness and the time scale on which it occurs using several electrical measurements: excess direct tunneling currents, dielectric breakdown and the oscillations in the Fowler-Nordheim tunneling currents. From these results we draw conclusions on the time and water content dependence of pre-oxidation annealing on the microroughness of the Si/SiO2 interface.

Measurement of very low tunneling current density in SiO/sub 2/ using the floating-gate technique

The floating-gate technique for measuring extremely low gate currents has been adapted to the measurement of Fowler-Nordheim tunneling currents in metal-oxide-semiconductor (MOS) capacitors. Using a special structure consisting of an MOS capacitor and a monitor transistor sharing a common-gate electrode, it has proved possible to measure tunneling current densities as low as 2*10/sup -13/ A/cm/sup 2/. The Fowler-Nordheim tunneling relationship was found to be obeyed over the entire measurable range of current density. >

Uniaxial stress dependence of the current-voltage characteristics of n-type AlAs/GaAs/AlAs tunnel diodes at 77 K

Longitudinal uniaxial stress along 〈100〉 has been applied in AlAs-GaAs-AlAs resonant tunneling heterostructures grown on (100) substrates to study the current-voltage characteristics as a function of stress. We find that the nonresonant current is due to Fowler–Nordheim tunneling currents by both longitudinal and transverse X valleys (X1 and Xt). This current decreases with low stress (<1 kbar), increases with intermediate stress and decreases with high stress (>9 kbar) again. This is due to the increase of the Xt barrier at low stress, the decrease of the X1 barrier at intermediate stress, and the formation and the increase of X1 potential well depth at high stress. We also find a large unexplained monotonic decrease of the resonant current through the Γ valley.

Electrical conduction mechanism and breakdown property in sputter-deposited silicon dioxide films on polycrystalline silicon

Silicon dioxide films are sputter deposited on polycrystalline silicon (polysilicon) in an oxygen-argon atmosphere at 200 °C. Electrical conduction and breakdown are measured at various gate fields and temperatures. In addition to the Fowler–Nordheim tunneling current reported for thermal oxide, the sputter-deposited films have another, newly identified high-activation-energy current as electrical conduction mechanisms. The high-activation-energy current contribution to the total current is considerably reduced by increasing the oxygen mixing ratio and/or by decreasing the sputtering gas pressure, resulting in a considerable total current reduction. High-activation-energy current contributes little to the triggering of breakdown, unlike Fowler–Nordheim tunneling injections. In contrast to polysilicon thermal oxide, sputter-deposited films on polysilicon have no observable field enhancement in Fowler–Nordheim tunneling current, which indicates smooth surfaces. Thus, electrical properties in oxygen-argon sputter-deposited films on polysilicon are explained by high-activation-energy current and Fowler–Nordheim tunneling current.

Measurement of Fowler-Nordheim tunneling currents in MOS structures under charge trapping conditions

The Fowler-Nordheim (FN) tunneling of electrons into thermal SiO 2 at high levels of injection has been studied. A modified I–V measurement technique has been developed to correct for charge trapping phenomena, which are unavoidable under the high field and current conditions. It is shown that the results fit a universal FN type current-field dependence which is insensitive to oxide thickness and free of the commonly observed hysteresis phenomena.

The effect of Fowler–Nordheim tunneling current on thin SiO2 metal-oxide-semiconductor capacitors

p-type metal-oxide-semiconductor (MOS) capacitors with various oxide thickness (less than 200 Å) are stressed by Fowler–Nordheim (F–N) tunneling constant current with negative gate bias, and high frequency and low frequency capacitance-voltage (C-V) characteristics have been used to investigate the charge trapping phenomenon in thermally grown thin SiO2 films. Under constant current stress, high frequency C-V curve shifts negatively, and flatband votage shifts ΔVFB don’t saturate even at large injected charge F. In order to explain this behavior, we propose the expression, ΔVFB =A[1− exp(−σF)]+KF. The first term indicates hole trapping by the preexisting traps and the second term means the generation factor due to traps generated under stress. A fitting parameter A is nearly in proportion to the square of SiO2 thickness. This can be interpreted with the uniform distribution of bulk hole traps throughout the SiO2. Both capture cross section σ and generation factor K rapidly decrease with decreasing SiO2 thickness. From the results of low frequency C-V characteristics, the interface states with very high density of the order of 1013/cm2 eV are generated over a wide range of band gap.

On the establishment of an inversion layer in p- and n-type silicon substrates under conditions of high oxide fields

It has been observed that an inversion layer cannot form in a p-type silicon substrate when the Fowler-Nordheim tunneling current into the oxide exceeds the minority generation current in the depletion layer. On the other hand, for n-type substrates, the formation of the inversion layer is unaffected by the oxide current.