Flip Chip On Board Assembly Research Articles

Finite element analysis of flip – chip on board (FCOB) assembly during reflow soldering process

PurposeOut‐of‐plane displacement (warpage) is one of the major thermomechanical reliability concerns for board‐level electronic packaging. The warpage and residual stresses can cause unreliability in the performance of electronic chip. An accurate estimation of the distortion and the residual stresses will help in selecting right combination of material for soldering and to determine the better assembly procedure of the chip. The purpose of this paper is to create a 3D nonlinear finite element model to predict the warpage, bending stresses, shear and peel stresses in a flip‐chip on board (FCOB).Design/methodology/approachA 3D finite element procedure has been developed considering the material nonlinearity during solidification for a FCOB assembly. Finite element results have been compared with the experimental values.FindingsThe present finite element method gives better approximation of residual warpage and stresses compared to analytical models available in the literature.Originality/valueThe 3D finite element approach considering the elasto‐plastic and temperature‐dependent material properties has not been attempted by any authors. Experiments have been conducted for the comparison of finite element values. The finite element results compare better than the methods available in the literature. Hence a better method for estimating the deformation and residual stresses in flip‐chip assembly has been suggested.

Demonstration of fine pitch FCOB (Flip Chip on Board) assembly based on solder bumps at Fermilab

Bump bonding is a superior assembly alternative compared to conventional wire bond techniques. It offers a highly reliable connection with greatly reduced parasitic properties. The Flip Chip on Board (FCOB) procedure is an especially attractive packaging method for applications requiring a large number of connections at moderate pitch. This paper reports on the successful demonstration of FCOB assembly based on solder bumps down to 250 μm pitch using a SUSS MA8 mask aligner at Fermilab. The assembly procedure will be described, microscopic cross sections of the connections are shown, and first measurements on the contact resistance are presented.

Effects of the Functional Groups of Nonconductive Films (NCFs) on Material Properties and Reliability of NCF Flip-Chip-On-Organic Boards

Nonconductive films (NCFs) are one of the polymer interconnect materials for flip-chip interconnection. NCFs containing no conductive particles play several roles such as adhesion, insulation, and underfilling at the same time. The most important issue of NCF flip-chip-on-board (FCOB) assemblies is thermal cycling reliability. Thermomechanical properties of cured NCFs, such as glass transition temperature (T <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">g</sub> ), storage modulus (E'), and coefficient of thermal expansion (CTE), significantly affect the thermal cycling reliability of NCF FCOB assemblies. In this paper, the improvement of thermomechanical properties of NCFs was investigated by controlling the number of functional groups of NCF resins. To compare the reliability of conventional and modified NCF FCOB assemblies after thermal cycling test, electrical analysis and scanning acoustic microscopy investigation were performed. Thermal deformations of NCF FCOB assemblies under thermal cycling environment were also investigated, and quantitatively compared using high sensitivity Twyman-Green interferometry and portable engineering Moire interferometry. According to these results, the functional groups of NCFs have significant effects on thermomechanical properties of cured NCFs, thermal deformation, and thermal cycling reliability of NCF-bonded FCOB assemblies. As a result, the functionality modified NCF FCOB assemblies showed significantly enhanced reliability compared conventional NCFs in thermal cycling test.

Failures of flip chip assemblies under thermal shock

Flip chip on board (FCOB) solder joint reliability under thermal shock stress was investigated. With underfill materials, the solder joint lifetime was increased from 37 to 1,300/2,480 cycles depending on the particular underfill material used. Through the use of CSAM, SEM, dye penetration tests and cross sectioning, the reliability of a FCOB assembly under thermal shock stress was evaluated. Both dye penetration and SEM fracture analysis can be used to measure quantitatively the extent of crack propagation for assemblies without underfill. A new failure mechanism, PCB cracking was also observed and discussed.

Application assessment of high throughput flip chip assembly for a high lead-eutectic solder cap interconnect system using no-flow underfill materials

Flip chip on board (FCOB) is one of the most quickly growing segments in advanced electronic packaging. In many cases, assembly processes are not capable of providing the high throughputs needed for integrated surface mount technology (SMT) processing (Tummala et al, 1997). A new high throughput process using no-flow underfill materials has been developed that has the potential to significantly increase flip chip assembly throughput. Previous research has demonstrated the feasibility and reliability of the high throughput process required for FCOB assemblies. The goal of this research was to integrate the high throughput flip chip process on commercial flip chip packages that consisted of high lead solder balls on a polyimide passivated silicon die bonded with eutectic solder bumped pads on the laminate substrate interface (Qi, 1999). This involved extensive parametric experimentation that focused on the following elements: no-flow process evaluation and implementation on the commercial packages, reflow profile parameter effects on eutectic solder wetting of high lead solder bumps, interactions between the no-flow underfill materials and the package solder interconnect and tented via features, void capture and void formation during processing, and material set compatibility and the effects on long term reliability performance.

Reliability of FCOB with and without encapsulation

Flip chips were assembled on to ceramic boards using eutectic tin‐lead solder with underfill and with/without encapsulation for temperature cycling and high‐temperature‐high‐humidity tests. After 1.5 years of testing, the reliability performance of the flip chip on board (FCOB) assemblies was compared. All of the FCOB assemblies with underfill, but without encapsulation, survived 5,778 cycles of the temperature cycling test following 5,005 hours of the high‐temperature and high‐humidity test. The results show that encapsulation may not necessarily enhance the reliability of flip chip assemblies and might therefore be omitted.

Field reworkable underfill materials for flip chip on board assemblies

Studies have shown that underfill encapsulation dramatically improves the solder joint fatigue reliability of flip chip on board (FCOB) assemblies. The lack of reworkability of the underfill after the product is in the field has limited the integration of FCOB into cost sensitive electronic products and the continued proliferation of the FCOB technology will depend on the development of reworkable underfill materials systems. This paper presents data that correlates reliability performance to mechanical properties for twelve field reworkable underfill materials from three different suppliers. Their respective properties, processing parameters, and reliability performances are compared to the qualified, commercially available high performance underfills. Techniques were developed to redress the printed wiring board (PWB) site to enhance the reworked FCOB assembly yield. In addition, reliability performance results and failure analysis observations were compared to the first time nonreworked assemblies.

The impact of underfill properties on the thermomechanical reliability of FCOB assembly

The impact of underfill properties on the thermomechanical reliability of flip chip on board (FCOB) assembly is addressed in this paper. FCOB assemblies using three underfill encapsulants were subjected to a thermal cycling test. The performance of the underfill encapsulants was assessed by a statistical analysis of the failure distribution of the FCOB assemblies. The failure modes in the thermal cycling test were found to be solder joint cracks, delamination at underfill/chip passivation interface, and underfill internal cracks. An attempt was made to correlate these failures with underfill properties such as the coefficient of thermal expansion (CTE), modulus, glass transition temperature (Tg), and adhesive strength to the chip. Additionally, nonlinear finite element analysis (FEA) was conducted to verify the experimental results.

Guidelines to select underfills for flip chip on board assemblies and compliant interposers for chip scale package assemblies

The effect of thermomechanical properties of underfill and compliant interposer materials, such as coefficient of thermal expansion (CTE) and stiffness (Young's modulus) on reliability of flip chip on board (FCOB) and chip scale packages (CSPs) under thermal cycling stresses is investigated in this study. Quasi-three-dimensional viscoplastic stress analysis using finite element modeling (FEM) is combined with an energy partitioning (EP) model for creep-fatigue damage accumulation to predict the fatigue durability for a given thermal cycle. Parametric FEM simulations are performed for five different CTEs and five different stiffnesses of the underfill and compliant interposer materials. The creep work dissipation due to thermal cycling is estimated with quasi 3-D model, while 3-D model is used to estimate the hydrostatic stresses. To minimize the computational effort, the 3-D analysis is conducted only for the extreme values of the two parameters (CTE and stiffness) and the results are interpolated for intermediate values. The results show that the stiffness of the underfill material as well as the CTE play important role in influencing the fatigue life of FCOB assemblies. The fatigue durability increases as underfill stiffness and CTE increase. In the case of compliant interposers, the reverse is true and durability increases as interposer stiffness decreases. Furthermore, the interposer CTE affects the fatigue durability more significantly than underfill CTE, with durability increasing as CTE decreases. The eventual goal is to define the optimum design parameters of the FCOB underfill and CSP interposer, in order to maximize the fatigue endurance of the solder joints under cyclic thermal loading environments.

Thermomechanical Durability Analysis of Flip Chip Solder Interconnects: Part 2—With Underfill

The effect of underfill material on reliability of flip chip on board (FCOB) assemblies is investigated in this study by using two-dimensional and three-dimensional finite element simulations under thermal cycling stresses from −55°C to 80°C. Accelerated testing of FCOB conducted by the authors reveals that the presence of underfill can increase the fatigue durability of solder interconnects by two orders of magnitude. Similar data has been extensively reported in the literature. It is the intent of this paper to develop a generic and fundamental predictive model that explains this trend. While empirical models have been reported by other investigators based on experimental data, the main drawback is that many of these empirical models are not truly predictive, and can not be applied to different flip chip architectures using different underfills. In the proposed model, the energy-partitioning (EP) damage model is enhanced in order to capture the underlying mechanisms so that a predictive capability can be developed. A two-dimensional finite element model is developed for stress analysis. This model accounts for underfill over regions of solder in an approximate manner by using overlay elements, and is calibrated using a three-dimensional finite element model. The model constant for the enhanced EP model is derived by fitting model predictions (combination of two-dimensional and three-dimensional model results) to experimental results for a given temperature history. The accuracy of the enhanced EP model is then verified for a different loading profile. The modeling not only reveals the influence of underfill material on solder joint durability, but also provides the acceleration factor to assess durability under life cycle environment, from accelerated test results. Experimental results are used to validate the trends predicted by the analytical model. The final goal is to define the optimum design and process parameters of the underfill material in FCOB assemblies in order to extend the fatigue endurance of the solder joints under cyclic thermal loading environments.

ANALYSIS OF UNDERFILL ENCAPSULATION CURING DEFORMATIONS ON FLIP CHIP ON BOARD (FCOB) PACKAGE RELIABILITY

Finite element stress analysis was carried out to study the residual bending stresses in a Flip Chip On Board (FCOB) package assembly during the underfill encapsulation curing process. Out-of-plane warpage is generated in the package resulting from mismatches in the coefficients of thermal expansion (CTE) of the various materials in the assembly. In this paper, finite element analyses were conducted on 2-D plane-strain and 3-D models of the FCOB assembly to investigate the development of curing-induced bending stresses in the silicon die for a FCOB package. The FEA results for the die bending stresses were correlated to simple beam and plate bending theory with reasonable accuracy. Further FEA studies were conducted on the effect of underfill encapsulant material properties on the solder joint shear stresses. Elasto-plastic and creep analysis of the solder joints in the FCOB package subjected to a liquid-to-liquid thermal shock test condition provided useful data on the solder joint stress and strain response.

The development of reflowable materials systems to integrate the reflow and underfill dispensing processes for DCA/FCOB assembly

Unique materials systems with sufficient fluxing activities to remove the metal oxides on the die and/or substrate bumps and assist in the formation of metallurgical interconnects were developed for the assembly of flip chip on board (FCOB). This materials system is referred to as a reflowable underfill. The experimental process flow was as follows: a finite volume of reflowable underfill was dispensed on the printed circuit board (PCB) at the die site, the die was aligned over the bond pads, and the die was placed into the material. Next, the FCOB assembly was transferred to a reflow furnace and subjected to a standard surface mount technology (SMT) eutectic Pb/Sn reflow profile, the solder was reflowed, interconnects were formed between the die and PCB, and the reflowable underfill was partially cured. The built FCOB assemblies were placed in liquid to liquid thermal shock and air to air temperature cycling. The assembly yields varied and continued development of systems with increased flux activity are warranted for the acceptance of this FCOB assembling technology. Promising accelerated life testing (ALT) results were obtained warranting further evaluation of the reflowable materials systems and process.

FCOB reliability evaluation simulating multiple rework/reflow processes

Flip-chip assembly [direct chip attach (DCA) or flip-chip on board (FCOB)] on printed wiring boards (PWBs), in conjunction with conventional leaded device surface mount technology, is beginning to proliferate in compact and portable systems. DCA with conventional controlled collapse chip connection (C4) bumps requires solder coated bond pads to allow joining in typical surface mount technology (SMT) reflow cycles. A flip-chip device on a typical FCOB/SMT board will usually experience no high temperature excursions after the die joining and underfill encapsulant cure unless the board undergoes a rework cycle. FCOB single chip packages and multichip modules are now in development with standard C4 bumps, and a new Motorola E-3 bump which requires no solder on bond pads. These solder interconnects must be stable through multiple heat treatments expected in subsequent system level assembly and repair operations. Flip-chip plastic ball grid arrays (FC-PBGAs) will typically undergo three solder reflow, or reheat, cycles to /spl sim/220/spl deg/C subsequent to initial flip-chip reflow assembly. The multiple reheats are for BGA ball attach, board level BGA SMT assembly, second side BGA SMT assembly, and possible rework operations. In this paper, the effect of multiple reheats on the solder connection microstructure and strength (before, and after, underfill encapsulation), and the integrity of the underfill encapsulant adhesive and cohesive strength is reported, using both FCOB single chip packages and multiple chip modules. The effect of multiple reheats on electrical resistance of daisy chain nets, and die stress (radius of curvature), is also reported. Hot air gun rework (before underfill) is simulated and standard belt furnace reflows are utilized. Cross sections of bump connections and underfill interfaces were studied to assess changes induced by the temperature exposures. The reliability of the FCOB assemblies was assessed via temperature cycle, thermal shock, and autoclave tests.

The importance of material selection for flip chip on board assemblies

Flip Chip On Board (FCOB) technology, where the unpackaged silicon chip is assembled directly to an organic substrate, provides an unique interconnect structure that significantly reduces the substrate area required by traditional through hole or surface mount integrated circuit packages. Without the protection for the chip that a package body affords however, reduced mechanical robustness and a decrease in reliability performance are potential concerns. In addition, the inherent thermal mismatch between the chip and substrate, particularly with an organic printed circuit board, will produce an accumulation of stress in the solder joints under normal operating conditions that can result in relatively premature failures due to solder fatigue. Coupling the chip and substrate together with an encapsulation material under the chip face has successfully overcome these mechanical and reliability issues. However, the success of the encapsulation is dependent on many factors. Among these are the encapsulant's material properties, and the compatibility with the chip and substrate surfaces. Thus, the selection of the basic materials to be used in the FCOB assembly are interrelated and critical to achieving the desired performance from the completed assembly. This paper highlights the key considerations involved in the identification of suitable materials for each of the basic constituent elements: printed circuit board (PCB), silicon chip and encapsulation material.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>