Ferroelectric HfZrO Research Articles

High-Temperature Retention Stability of Multibit Ferroelectric HfZrO₂ FinFET With SiGe/Si Superlattice Channel for Enhanced Speed and Memory Window

High-Temperature Retention Stability of Multibit Ferroelectric HfZrO₂ FinFET With SiGe/Si Superlattice Channel for Enhanced Speed and Memory Window

Ferroelectric 2D SnS2 Analog Synaptic FET.

In this study, the development and characterization of 2D ferroelectric field-effect transistor (2D FeFET) devices are presented, utilizing nanoscale ferroelectric HfZrO2 (HZO) and 2D semiconductors. The fabricated device demonstrated multi-level data storage capabilities. It successfully emulated essential biological characteristics, including excitatory/inhibitory postsynaptic currents (EPSC/IPSC), Pair-Pulse Facilitation (PPF), and Spike-Timing Dependent Plasticity (STDP). Extensive endurance tests ensured robust stability (107 switching cycles, 105 s (extrapolated to 10 years)), excellent linearity, and high Gmax /Gmin ratio (>105 ), all of which are essential for realizing multi-level data states (>7-bit operation). Beyond mimicking synaptic functionalities, the device achieved a pattern recognition accuracy of ≈94% on the Modified National Institute of Standards and Technology (MNIST) handwritten dataset when incorporated into a neural network, demonstrating its potential as an effective component in neuromorphic systems. The successful implementation of the 2D FeFET device paves the way for the development of high-efficiency, ultralow-power neuromorphic hardware which is in sub-femtojoule (48 aJ/spike) and fast response (1 µs), which is 104 folds faster than human synapse (≈10ms). The results of the research underline the potential of nanoscale ferroelectric and 2D materials in building the next generation of artificial intelligence technologies.

Effectively Suppressed Short-Channel Effects in Small-Size MoS2 Transistors by Introducing Negative-Capacitance Effect Resulted From Ferroelectric HfZrO2 Film

Effectively Suppressed Short-Channel Effects in Small-Size MoS₂ Transistors by Introducing Negative-Capacitance Effect Resulted From Ferroelectric HfZrO₂ Film

Performance Optimization for Ferroelectric HfZrOx on a Ge Substrate by Modifying the Deposition Temperature

Performance Optimization for Ferroelectric HfZrO_x on a Ge Substrate by Modifying the Deposition Temperature

New Materials for Memory Applications by Atomic Layer Deposition

The architectures of integrated logic and memory devices have shifted from 2D to 3D layouts, enabling a continued scaling of device densities. Atomic layer deposition (ALD) allows the conformal deposition of thin films with sub-nm thickness control on high aspect ratio 3D structures. ALD has become the technique of choice for the synthesis of an increasing number of materials in advanced logic and memory devices. In the first part of this presentation, we briefly review some of the key ALD processes which enable the fabrication of state-of-the-art 3D-NAND and 2D-DRAM. Next, we present the ALD of emerging ferroelectric HfZrO developed at ASM in industrial scale ALD reactors. HfO2 has been established as the preferred gate oxide material for logic devices for almost two decades. The recent discovery of ferroelectricity in HfO2 has opened new applications for HfO2-based materials as active memory elements in DRAM and 3D-NAND. We show that ALD La:HfZrO can achieve high polarization field (2Pr > 60 uC/cm2) and high endurance (> 107 cycle) by applying interface engineering schemes and optimizing deposition processes and film composition (i.e. Hf/Zr ratio, dopant concentration).

Ferroelectricity and Oxide Reliability of Stacked Hafnium-Zirconium Oxide Devices.

In this work, we investigate the ferroelectricity of stacked zirconium oxide and hafnium oxide (stacked HfZrO) with different thickness ratios under metal gate stress and simultaneously evaluate the electrical reliability of stacked ferroelectric films. Based on experimental results, we find that the stacked HfZrO films not only exhibited excellent ferroelectricity but also demonstrated a high performance on reliability. The optimized condition of the 45% Zr proportion exhibited a robust ferroelectric polarization value of 32.57 μC/cm2, and a polarization current with a peak value of 159.98 μA. Besides this, the ferroelectric stacked HfZrO also demonstrated good reliability with a ten-year lifetime under >-2 V constant voltage stress. Therefore, the appropriate modulation of zirconium proportion in stacked HfZrO showed great promise for integrating in high-performance ferroelectric memory.

THz Thin Film Varactor Based on Integrated Ferroelectric HfZrO2.

In this paper, we present a broadband microwave characterization of ferroelectric hafnium zirconium oxide (Hf0.5Zr0.5O2) metal-ferroelectric-metal (MFM) thin film varactor from 1 kHz up to 0.11 THz. The varactor is integrated into the back-end-of-line (BEoL) of 180 nm CMOS technology as a shunting capacitor for the coplanar waveguide (CPW) transmission line. At low frequencies, the varactor shows a slight imprint behavior, with a maximum tunability of 15% after the wake-up. In the radio- and mmWave frequency range, the varactor's maximum tunability decreases slightly from 13% at 30 MHz to 10% at 110 GHz. Ferroelectric varactors were known for their frequency-independent, linear tunability as well as low loss. However, this potential was never fully realized due to limitations in integration. Here, we show that ferroelectric HfO2 thin films with good back-end-of-line compatibility support very large scale integration. This opens up a broad range of possible applications in the mmWave and THz frequency range such as 6G communications, imaging radar, or THz imaging.

Mechanisms of instability retention for ferroelectric field effect transistors with HfZrO2 gate stack scaling down

Instability threshold voltage (VT) with retention loss of read-after-write is a critical issue with fundamental physics for ferroelectric field effect transistors (FeFETs) scaling down under high-speed operation. The mechanisms including charge trapping and depolarization field (Edep) are discovered and related to surface potential and coercive field (EC). The trapped charge can be effectively detrapped by opposite polarity stimulation and validated by technology computer-aided design modeling. In addition, the Edep is revealed to be serious with ferroelectric HfZrO2 (FE-HZO) thin-down due to the unstable low-VT state at a gate voltage (VG) of 0 V. The tunable base voltage (Vbase) compensates the Edep-based polarization degradation. A stable low-VT read-after-write for a 5-nm-thick HZO FeFET is experimentally demonstrated by the opposite polarity detrapping scheme hybrid with a Vbase optimization simultaneously for a wide range of delay times from 10−7 to 102 s. This result provides the feasibility for scaling down FeFETs for nonvolatile memory applications in the future.

Theoretical Evaluation of Two-Dimensional Ferroelectric Material CuInP2S6 for Ferroelectric Tunnel Junction Device

Ferroelectric tunnel junction (FTJ) exploiting the switchable polarization of ferroelectric material holds great potential for the low-power non-volatile memory. Recently, two-dimensional (2D) ferroelectric material CuInP <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> S <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">6</sub> (CIPS) which can provide ferroelectricity at the ultimate atomic-scale has been successfully introduced in FTJ to achieve significantly improved TER. Here, we present a theoretical study on the performance of FTJ based on CIPS through the quantum transport simulation using <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">kp</i> Hamiltonian obtained from density functional theory. Benchmarking with ferroelectric HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> -based FTJ reveals that much higher TER can be achieved in CIPS-based FTJ due to a lower tunneling potential barrier and a larger tunneling effective mass.

Ferroelectric Properties of HZO Ferroelectric Capacitors with Various Capping Electrodes and Annealing Conditions

In this study, the ferroelectric HfZrO2 (HZO) Metal-Ferroelectric-Metal (MFM) structures with the various metal electrodes including TiN, W, Mo, TaN (i.e. MFM=TiN/HZO/TiN, W/HZO/W, Mo/HZO/Mo, TaN/HZO/TaN) were fabricated. We have characterized the ferroelectric properties and microstructure of these MFM structures at various annealing temperature. The orthorhombic phase of samples with different electrodes and annealing temperature were investigated by grazing incidence x-ray diffraction (GIXRD). Microstructure analysis for the MFM capacitors were also conducted using TEM. The trends in remanent polarization and the coercive field of MFM capacitors with differed electrodes were compared by the polarization-voltage (P-V) measurements.

MoS2 transistors gated by ferroelectric HfZrO2 with MoS2/mica heterojunction interface

Two-dimensional (2D) molybdenum disulfide (MoS2) field-effect transistor (FET) gated by negative capacitance (NC) is a promising architecture to overcome the thermionic limit and thus reduce device consumption. Here, top-gated MoS2 NCFETs have been prepared by transferring a mica flake on MoS2 channel to form a van der Waals heterojunction interface, together with a ferroelectric HfZrO2 (HZO) deposited on mica. Stable NC effects are demonstrated for MoS2 NCFETs. The MoS2 NCFETs integrated with mica/HZO gate stack provide competitive electrical characteristics when they are applied with a gate voltage sweep-width in the range of 1−3 V and a sweep-rate from 0.01 to 0.2 V s−1, including steep-slope of sub 60 mV dec−1 in four orders of magnitude of drain current, on/off current ratio over 106, and small hysteresis-width less than 50 mV. Outstanding performance should be ascribed to damage-free properties of mica/MoS2 van der Waals interface and capacitance matching between the HZO ferroelectric and mica dielectric. The results confirm the promising nature of mica/HZO gate stack and potential applications for future electronics.

Observation and Characterization of Recoverable Fatigue Process Under Low-Electric Field (&lt;1.8MV/cm) in HfZrO Ferroelectric Film

It is widely believed that the fatigue process of ferroelectric HfZrO (HZO) film is a permanent damage and unrecoverable, which can be regarded as a Time Dependent Dielectric Breakdown (TDDB) process. In this work, the fatigue process of HZO film under low-electric field is found to be irrelevant to defect generation. Furthermore, this fatigued device can be recovered by higher voltage stimulus and then switch normally with lower voltage pulses. This observed recoverable fatigue process is systematically investigated by the conductance method and the first-order reversal curve (FORC) measurement and the mechanism is attributed to electron de-trapping. This observed recoverable fatigue process gives the new insights on the endurance failure mechanism of HZO film under low-electric field.

High Speed and Large Memory Window Ferroelectric HfZrO₂ FinFET for High-Density Nonvolatile Memory

We fabricated the HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (HZO) ferroelectric fin field-effect transistors (Fe-FinFET) with fin width of 60 nm and gate length of 100 nm for ferroelectric nonvolatile memory operations. The fabricated Fe-FinFET exhibited a large memory window (MW) of 1.5 V and high (100 ns) program/erase speeds at ±5 V. After 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sup> program/erase cycles, the MW was maintained at 1.09 V and the retention time was measured up to 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sup> s with no degradation. The fabricated HZO Fe-FinFET is compatible with the current FinFET process and has a high MW, a fast program/erase speed, and excellent reliability. Therefore, the fabricated Fe-FinFET is a promising candidate for high-density ferroelectric field-effect transistor memory applications.

Reduced Asymmetric Memory Window Between Si-Based n- and p-FeFETs With Scaled Ferroelectric HfZrOₓ and AlON Interfacial Layer

The Si-based n- and p-FeFET with 5-nm ferroelectric (FE) HfZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> (HZO) and high-k AlON interfacial layer (IL) were fabricated for the comparison of memory characteristics and reliability. The memory window (MW) of 1.37 V and 1.25 V are obtained by the n- and p-FeFET respectively by applying pulses of ±3.8 V/ 50 μ s. The typical MW asymmetry for both types of FeFETs is significantly reduced which is attributed to the reduced remanent polarization ( P <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">r</sub> ) from the highly scaled HZO and the enhanced voltage drop across the HZO as well as the improved interfacial quality from the AlON IL. In addition, the p-FeFET demonstrates a MW of 1.02 V up to $10^{{5}}$ cycles with a long pulse 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> s, superior to that of the n-FeFET due to the mitigated hot-electrons induced hole generation. Furthermore, the p-FeFET shows comparable retention performance with the n-FeFET. These results indicate that the p-FeFET possesses the competence of future memory applications without adding process complexity and introducing new substrate material.

Comprehensive Study of Inversion and Junctionless Ge Nanowire Ferroelectric HfZrO Gate-All-Around FETs Featuring Steep Subthreshold Slope with Transient Negative Capacitance

This study reports the ferroelectric (FE) layer of Hf0.5Zr0.5O2 (HZO) film on a Ge gate-all-around field-effect-transistor (GAAFET) with inversion mode (IM) and junctionless (JL) mode, and is the first that discuss the association of the JL field-effect transistor conduction mechanism in the subthreshold region with the transient negative capacitance (TNC) effect of the FE layer are discussed. The IM Ge FE-GAAFET exhibited a minimum subthreshold slope (SSmin) of 55 mV dec−1 and a high ION/IOFF ratio of >106. The sub-60 mV dec−1 SS result demonstrates surface potential amplification, which is attributed to the TNC effect. Furthermore, the Ge JL FE-GAAFETs exhibited an SSmin of 58 mV dec−1, a high ION/IOFF ratio (>105), and reverse drain-induced barrier lowering when compared with baseline HfO2 devices. These IM and JL Ge FE-GAAFETs are highly suitable for low-power integrated circuit applications.

Random polarization distribution of multi-domain model for polycrystalline ferroelectric HfZrO2

Device dimension scaling down to be comparable to the domain size of polycrystalline ferroelectric HfZrO2 (HZO) is evaluated for subthreshold swing (SS) and drain-induced barrier lowering (DIBL) by numerical simulation. The proposed multi-domain modeling involves polarization random location in HZO and probability with Gaussian distribution, as well as being integrated with the Landau–Khalatnikov equation. A small device with a few domains exhibits steep SS compared with large dimension with many domains. The N-DIBL (negative-DIBL) is also estimated by using this model, and the negative capacitance effect retards the short-channel effects significantly. The trend of the experimental data and simulation results of fin field-effect transistors and planar field-effect transistors is consistent with nano-scale and micro-scale devices, respectively.

Ferroelectric HfZrO2 With Electrode Engineering and Stimulation Schemes as Symmetric Analog Synaptic Weight Element for Deep Neural Network Training

Atomic layer deposition (ALD)-based TiN electrode on ferroelectric HfZrO2 metal/ferroelectric/metal (MFM) capacitor and ferroelectric field-effect transistor (FeFET) is demonstrated experimentally with weight transfer, that is, $\Delta {P}$ , per pulse analysis through consecutive alternating potentiation/depression (Pot./Dep.) training pulses. The weight training pulse schemes are studied to have symmetric and linear synapse weight transfer to increase the accuracy and accelerate the deep neural network (DNN) training. With ALD TiN inserted, $\alpha _{p} / \alpha _{d} = -0.63$ / −0.84, asymmetry $\vert \alpha _{p} - \alpha _{d}\vert =0.21$ , and polarization modulation ratio (Pot./Dep.) = 97%/98% are achieved for MFM capacitor, and $\alpha _{p} / \alpha _{d} = -1.32$ / −1.88, asymmetry $\vert \alpha _{p} - \alpha _{d}\vert =0.56$ , and $G_{\text {max}} / G_{\text {min}} > 10\times $ are delivered for FeFET.

Impact of GeSn Crystallinity on Reliability of Ferroelectric HfZrOx for Devices with Metal–Ferroelectric–Semiconductor Structure

Devices in the form of TiN/ferroelectric‐HfZrOx (FE‐HZO)/polycrystalline or epitaxial GeSn are used to investigate how the crystallinity of GeSn film affects the behaviors and reliability performance. FE‐HZO on epitaxial GeSn film reveals higher ferroelectricity as evidenced by a larger remanent polarization (Pr) by 21% as compared with that formed on polycrystalline GeSn film. Devices with epitaxial GeSn film also demonstrate higher dipole switching speed, more robust endurance up to 106 cycles (±3.3 MV cm−1, long pulse width of 1 ms) and better retained polarization up to 104 s. The essential factor that determines the more desirable ferroelectric behaviors and reliability lies in the higher quality of the interfacial layer between HZO and GeSn film which helps suppress defect generation and charge trapping. The research results also highlight the importance to improve the interfacial layer quality for enhanced performance of ferroelectric devices formed on polycrystalline semiconductor.

Graphene bandgap induced by ferroelectric HfO2 doped with Zr (HfZrO)

Motivated by the need to open a bandgap in graphene, we show experimentally that the CMOS-compatible ferroelectric HfZrO substrate induces a bandgap of 0.18 eV in graphene monolayer, which allows top-gate graphene/HfZrO/SiO2/Si field-effect transistors to have high on/off current ratio, of about 103, at small drain voltages, of 0.5 V, and for gate voltage spans of only 3.5 V. In addition, these transistors have a very high transconductance, of about 1 mS, and carrier mobilities of 7900 cm2 Vs−1. The results show that this relatively simple and wafer-scale compatible bandgap opening method in graphene renders this material useful for digital low-power electronics.

A comparative study of metal-ferroelectric-metal devices using doped- and stacked-hafnium zirconium oxides

To understand the effect of deposition sequence of ferroelectric HfZrO, we investigated the ferroelectric polarization characteristics of a 50%-zirconium-doped HfZrO and a stacked HfZrO metal-ferroelectric-metal capacitors. Based on experimental results, we find that the leakage current can be effectively suppressed in stacked HfZrO film. The film stack structure is favorable for simultaneously stabilizing the ferroelectric polarization and minimizing the generation of interface defect traps during the post-metal annealing process with a thermal budget of 600–800 °C, which is favorable for complementary-metal-oxide-semiconductor frond- and back-end process integration with various thermal budget requirement.