Ferroelectric Field-effect Transistors Research Articles

Quasi-equilibrium growth of inch-scale single-crystal monolayer α-In2Se3 on fluor-phlogopite

Epitaxial growth of two-dimensional (2D) materials with uniform orientation has been previously realized by introducing a small binding energy difference between the two locally most stable orientations. However, this small energy difference can be easily disturbed by uncontrollable dynamics during the growth process, limiting its practical applications. Herein, we propose a quasi-equilibrium growth (QEG) strategy to synthesize inch-scale monolayer α-In2Se3 single crystals, a semiconductor with ferroelectric properties, on fluor-phlogopite substrates. The QEG facilitates the discrimination of small differences in binding energy between the two locally most stable orientations, realizing robust single-orientation epitaxy within a broad growth window. Thus, single-crystal α-In2Se3 film can be epitaxially grown on fluor-phlogopite, the cleavage surface atomic layer of which has the same 3-fold rotational symmetry with α-In2Se3. The resulting crystalline quality enables high electron mobility up to 117.2 cm2 V−1 s−1 in α-In2Se3 ferroelectric field-effect transistors, exhibiting reliable nonvolatile memory performance with long retention time and robust cycling endurance. In brief, the developed QEG method provides a route for preparing larger-area single-crystal 2D materials and a promising opportunity for applications of 2D ferroelectric devices and nanoelectronics.

Ferroelectric field effect transistors based on two-dimensional CuInP2S6 (CIPS) and graphene heterostructures

Ferroelectric field effect transistors based on two-dimensional CuInP2S6 (CIPS) and graphene heterostructures

Two-Dimensional Ferroelectric Materials: Synthesis, Characterization and Applications

In recent years, the continuous advancements in microelectronics have driven the evolution of electronic devices towards miniaturization and integration. However, at the nanoscale level, surface and size effects become significant, imposing constraints on the use of conventional bulk ferroelectric materials in contemporary industry. As a result, in the field of materials research, two-dimensional (2D) ferroelectric materials with stable spontaneous polarization and minimal size effects have gained significant attention. These novel 2D ferroelectric materials have great potential for future nano-level ferroelectric applications, enabling high levels of device integration. To begin with, this paper divides 2D ferroelectric materials into two categories: intrinsic ferroelectrics and sliding ferroelectrics. It also discusses the features and current state of research on each of these categories. Next, typical 2D ferroelectric material preparation and characterization techniques are outlined. Additionally, 2D ferroelectric memory devices like ferroelectric diodes (FD), ferroelectric field effect transistors (FeFET), ferroelectric semiconductor field-effect transistors (FeSFET), and ferroelectric tunnel junctions (FTJ) are introduced. Finally, this review also presents expectations and potential challenges in the domain of 2D ferroelectric materials.

Ferroelectric Aluminum Scandium Nitride Transistors with Intrinsic Switching Characteristics and Artificial Synaptic Functions for Neuromorphic Computing.

Aluminum Scandium Nitride (Al1-xScxN) has received attention for its exceptional ferroelectric properties, whereas the fundamental mechanism determining its dynamic response and reliability remains elusive. In this work, an unreported nucleation-based polarization switching mechanism in Al0.7Sc0.3N (AlScN) is unveiled, driven by its intrinsic ferroelectricity rooted in the ionic displacement. Fast polarization switching, characterized by a remarkably low characteristic time of 0.00183ps, is captured, and effectively simulated using a nucleation-limited switching (NLS) model, where the profound effect of defects on the nucleation and domain propagation is systematically studied. These findings are further integrated into Monte Carlo simulations to unravel the influence of the activation energy for ferroelectric switching on the distributions of switching thresholds. The long-term reliability of devices is also confirmed by time-dependent dielectric breakdown (TDDB) measurements, and the effect of thickness scaling is discussed. Ferroelectric field-effect transistors (FeFETs) are demonstrated through the integration of AlScN and 2D MoS2 channel, where biological synaptic functions can be emulated with optimized operation voltage. The artificial neural network built from AlScN-based FeFETs achieves 93.8% recognition accuracy of handwritten digits, demonstrating the potential of ferroelectric AlScN in future neuromorphic computing applications.

Correction to “Infrared Light Rewritable Optoelectronic Memories in Graphene-P(VDF-TrFE) Ferroelectric Field-Effect Transistor”

Correction to “Infrared Light Rewritable Optoelectronic Memories in Graphene-P(VDF-TrFE) Ferroelectric Field-Effect Transistor”

Design of Physically Unclonable Function Using Ferroelectric FET With Auto Write-Back Technique for Resource-Limited IoT Security

Design of Physically Unclonable Function Using Ferroelectric FET With Auto Write-Back Technique for Resource-Limited IoT Security

(Invited) Novel Neuromorphic Computing Paradigms Enabled By Emerging Memory Devices

Implementation of Artificial Intelligence and Machine Learning algorithms on conventional Von Neumann computing architectures are crippled by the memory-wall bottleneck. To overcome these issues, novel computing architectures with high-bandwidth memories, in-memory computing, and near-memory computing capabilities are being developed. Almost all of these architectures will benefit from high-density on-chip non-volatile memories, offered by the emerging non-volatile memory devices. Additionally, emerging memory devices offer rich device physics that can be leveraged for the implementation of novel computing paradigms. This paper will talk about three such emerging memory technologies: Vertical-Thin Film Transistors-Resistive Random Access Memory (V-TFT-RRAMs), Gated-RRAMs, and Ferroelectric Field Effect transistors (FeFETs). A comparative studies of various conventional neuromorphic computing approaches that can be implemented using these devices will be discussed. Finally, materials and device requirements and pending challenges will be discussed by successful realization of the proposed computing approaches. Implementation of Artificial Intelligence and Machine Learning algorithms on conventional Von-Neumann computing architectures are crippled by the memory-wall bottleneck. To overcome these issues, novel computing architectures with high-bandwidth memories, in-memory computing, and near-memory computing capabilities are getting developed. Almost all of these architectures will benefit from high-density on-chip non-volatile memories, offered by the emerging non-volatile memory devices. Additionally, emerging memory devices offer a rich set of device physics that can be leveraged for the implementation of novel computing paradigms. This paper will talk about three such emerging memory technologies: Vertical-Thin Film Transistors-Resistive Random Access Memory (V-TFT-RRAMs), Gated-RRAMs, and Ferroelectric Field Effect Transistors (FeFETs). A comparative studies of various unconventional and brain-inspired neuromorphic computing approaches that can be implemented using these devices will be discussed. Finally, materials and device requirements and pending challenges will be discussed for these device technologies.

(Invited) Ferroelectric Nonvolatile Capacitive Synapse for Charge Domain Compute-in-Memory

The rise of Artificial Intelligence has led to an increased demand for computing hardware which can handle data intensive tasks in an energy efficient manner. Compute-in-memory architecture which combines information processing and data storage at the same location and specializes in Multiply-and-Accumulate (MAC) operation has emerged as an attractive candidate to meet this demand. Non-volatile capacitive (nvCAP) devices are investigated to realize the synaptic devices to enable CIM in charge-domain-computing. Charge-domain-CIM works as follows: The synaptic weights of a neural network are stored as the capacitance state of the nvCAP device in a crossbar array. The input of the neural network is applied as voltages to the crossbar array, and the resulting charges are summed up as the MAC operation. The nvCAP synaptic devices also provides benefits over traditional resistive synapses such as: only static power consumption, negligible sneaky current, suppressed read-disturb due to small-signal-read out. Recently, the Ferroelectric Field Effect Transistor (FeFET) has been demonstrated to operate in nvCAP mode, with S-D terminal of the FET shorted and Body-Floating. Here, the Field Effect Transistor part exhibits a gate voltage-dependent capacitance behavior, where the high capacitance originates from the transistor gate area, while the low capacitance originates from the overlap region between the gate oxide and source-drain region of FET. The ferroelectric layer part introduces a lateral shift in the C-V curve of FET, leading to either a high (CON) or low capacitance (COFF) state at 0V that can be tuned by an applied electric field. The CON/COFF ratio of the device can be designed as-per the application by increasing the channel area and reducing the overlap length. For a robust and consistent performance in CIM, reliability aspects of ferroelectric nvCAP are investigated. The FeFET in nvCAP mode demonstrates an initial endurance of 106 Program-Erase cycles while maintaining the ON/OFF >5. It is found that a CV sweep performed on the device help recover the performance. By performing repeated endurance-recovery operation, a recovered endurance of 108 cycles is achieved. The nvCAP device demonstrates memory retention of at least 1 day @85C for all fresh, fatigued and recovered states of the device. The nvCAP device also shows multi-level-cell capabilities for atleast 4 levels by changing the Program voltages. Figure 1

IP2 optimization in frequency mixers using ferroelectric field-effect transistors

Ferroelectric devices have traditionally been utilized in memory circuits due to their ability to retain a polarization charge and potentially act as a nonvolatile storage device. Their usage in applications unrelated to memory has also previously expanded into other digital and analog circuits, and now, it is being investigated in radio frequency circuits. This work explores the implementation of a frequency mixer using ferroelectric field-effect transistors in order to demonstrate stability against voltage offsets in a single-balanced mixer, making use of the polarization in the switching transistors to improve the performance of the second-order intermodulation product.

Role of Nitrogen in Suppressing Interfacial States Generation and Improving Endurance in Ferroelectric Field-Effect Transistors

Role of Nitrogen in Suppressing Interfacial States Generation and Improving Endurance in Ferroelectric Field-Effect Transistors

Van der Waals heterostructure-compatible, single-crystal Bi3.15Nd0.85Ti3O12 flakes with high fatigue endurance

High endurance, van der Waals (vdW) heterostructure-compatible, single-crystalline Bi3.15Nd0.85Ti3O12 (BiT-Nd) flakes were synthesized by hydrothermal and molten salt method. They exhibit robust ferroelectricity with a coercive field of ∼50 kV/cm and remnant polarization of ∼8 μC/cm2. Importantly, negligible polarization loss was observed after 1010 cycles of polarization switching operations, verifying their high fatigue endurance. Using vdW stacking technique, a full vdW-heterostructured ferroelectric field-effect transistor (FeFET) was fabricated using BiT-Nd as gate dielectric, MoS2 as channel, and graphene as contacts, which exhibits a typical ferroelectric memory window of 1.5 V. These findings highlight the potential of BiT-Nd as a promising candidate for high-endurance non-volatile FeFETs.

Giant piezotronic effect in ferroelectric field effect transistor

Giant piezotronic effect in ferroelectric field effect transistor

Experimental investigation of dipole formation and modulation at Hf0.5Zr0.5O2/SiO2 interface

HfO2-doped ferroelectric field-effect transistors have been extensively studied since the discovery of ferroelectricity in HfO2. A metal/ferroelectric/insulator/semiconductor structure is widely used in FeFETs. The dipole at the doped-HfO2/SiO2 interface is not well understood, though it plays an important role in the flat voltage shift and band alignment which strongly affects charge trapping. This study investigates the band alignment and dipole distribution at the Hf0.5Zr0.5O2 /SiO2 interface using x-ray photoelectron spectroscopy. The band bending of the Hf0.5Zr0.5O2 /SiO2/Si structure is found to vary with Hf0.5Zr0.5O2 layer thickness. The valence band offset (VBO) at the Hf0.5Zr0.5O2 /SiO2 interface decreases with increasing Hf0.5Zr0.5O2 thickness. It is confirmed that the dipole contributes to the dependence of band bending and VBO on Hf0.5Zr0.5O2 thickness. Dipole formation is caused by the charge neutral level mismatch between Hf0.5Zr0.5O2 and the SiO2/Si stack, which induces electron transfer and band bending. O2 post deposition annealing (PDA) can modulate the dipole distribution and generate a larger dipole at the Hf0.5Zr0.5O2 /SiO2 interface than that of the sample not subjected PDA.

Study on reliability improvement for p-type FeFinFET under negative-bias temperature instability stress with appropriate fluorine plasma treatment

This study investigates the effects of fluorine plasma treatment (FPT) on the reliability of p-type ferroelectric fin-shaped field-effect transistors (FeFinFETs) based on Hf0.5Zr0.5O2 (HZO) and subjected to negative bias temperature instability (NBTI). Compared with non-FPT devices, FeFinFETs treated with FPT exhibited higher drive currents and mobility for fresh devices, indicating an improvement in interface quality. After NBTI stress, FPT devices exhibited lesser threshold voltage shift and subthreshold swing degradation than non-FPT devices, which is attributed to the passivation of dangling bonds between the Si/HZO interfaces by fluorine. Si–F bonds are less susceptible to breakage than Si–H bonds. These findings suggest that FPT is a promising technique to enhance the reliability and performance of FeFinFETs based on Hf0.5Zr0.5O2.

Enhancement of Ion-Sensitive Field-Effect Transistors through Sol-Gel Processed Lead Zirconate Titanate Ferroelectric Film Integration and Coplanar Gate Sensing Paradigm

To facilitate the utility of field effect transistor (FET)-type sensors, achieving sensitivity enhancement beyond the Nernst limit is crucial. Thus, this study proposed a novel approach for the development of ferroelectric FETs (FeFETs) using lead zirconate titanate (PZT) ferroelectric films integrated with indium–tungsten oxide (IWO) channels synthesized via a cost-effective sol-gel process. The electrical properties of PZT-IWO FeFET devices were significantly enhanced through the strategic implementation of PZT film treatment by employing intentional annealing procedures. Consequently, key performance metrics, including the transfer curve on/off ratio and subthreshold swings, were improved. Moreover, unprecedented electrical stability was realized by eliminating the hysteresis effect during double sweeps. By leveraging a single-gate configuration as an FeFET transformation element, extended-gate (EG) detection methodologies for pH sensing were explored, thereby introducing a pioneering dimension to sensor architecture. A measurement paradigm inspired by plane gate work was adopted, and the proposed device exhibited significant resistive coupling, consequently surpassing the sensitivity thresholds of conventional ion-sensitive field-effect transistors. This achievement represents a substantial paradigm shift in the landscape of ion-sensing methodologies, surpassing the established Nernst limit (59.14 mV/pH). Furthermore, this study advances FeFET technology and paves the way for the realization of highly sensitive and reliable ion sensing modalities.

Impact of Doped Hafnium Oxides on Memory Window and Low-Frequency Noise in Ferroelectric FETs

Impact of Doped Hafnium Oxides on Memory Window and Low-Frequency Noise in Ferroelectric FETs

Analog and linearity performance analysis of ferroelectric vertical tunnel field effect transistor with and without source pocket

AbstractThis study examines the electrical performance characteristics of a ferroelectric vertical tunnel field‐effect transistor (TFET) with and without a source pocket (Si0.5Ge0.5). The incorporation of Germanium in the source of the TFET aims to enhance the on‐current. The Silvaco TCAD simulation tool is utilized to simulate the proposed structure. To improve device performance, a ferroelectric layer with a vertical length is employed in the gate of the TFET. When the ferroelectric layer partially controls the channel region, device characteristics, such as on‐current and subthreshold swing (SS) can be improved (i.e., ION = 15.21 × 10−5 A/μm, ION/IOFF = 5.03 × 109, and a minimum SS of 20.87 mV/decade at 300 K). This article studied a comparison between ferroelectric vertical TFETs and nonferroelectric vertical TFETs, as well as ferroelectric vertical TFETs with and without source pockets. The comparison is done on the basis of DC and RF parameters. Analysis of this comparison represents that ferroelectric vertical TFET with source pocket has improved characteristics.

A Physics-Based Model for Oxide–Semiconductor-Based Ferroelectric Field-Effect Transistors

A Physics-Based Model for Oxide–Semiconductor-Based Ferroelectric Field-Effect Transistors

A Novel Ferroelectric FET Based Universal Content Addressable Memory With Reconfigurability for Area- and Energy-Efficient In-Memory-Searching System

A Novel Ferroelectric FET Based Universal Content Addressable Memory With Reconfigurability for Area- and Energy-Efficient In-Memory-Searching System

FTIR characterization analysis of BaTiO3 nanoparticles synthesized using Terminalia catappa leaf extract

Ferroelectric materials are materials that are in great demand in high-density memory applications, such as ferroelectric random access memory, ferroelectric field effect transistors, negative capacitance field effect transistors, and ferroelectric tunnel junctions. Barium titanate (BaTiO3) is a lead-free ferroelectric material with a high dielectric constant and low dielectric loss. The method used is sol gel for the synthesis of BaTiO3 solution, extract for ketapang (Terminalia catappa) leaves, and characterized by FTIR. The FTIR spectrum synthesized with ketapang leaf extract displays several characteristic peaks in the mid-infrared region (4000 – 400 cm-1). These peaks can be determined by the specific vibration mode of the structure and organic compounds contained in the ketapang leaf extract. BaTiO3 has a cubic perovskite structure with a peak wave number of 600 cm-1. Ketapang leaf extract is incorporated into the BaTiO3 structure. BaTiO3 has a Ti–O functional group. Ketapang leaf extract has C–O, C=O, C–H, and O–H functional groups.