Fault Current Path Research Articles

Advanced earth grid monitoring for HV network safety compliance

ABSTRACT Electrical energy is a critical component for human comfort, but mismanagement of this energy can lead to human injury and even fatalities. High voltage safety compliance hinges on the presence of an adequate earthing system within the infrastructure. Various factors influence the effectiveness of the earthing system, including soil resistivity in the surrounding area and the availability of auxiliary paths for fault currents. Weather conditions, changes in the surrounding environment, and alterations within the high-voltage network significantly impact these elements. Any modifications to the auxiliary path conditions can have severe consequences on the network’s safety compliance. The current industry practice lacks continuous monitoring of the earth grid and fault current paths, with no provision for frequent current injection tests on the entire earth grid system. To close the existing gap, this paper proposes a novel approach through the introduction of an Earthing IoT Monitoring system. This system enables network owners to monitor safety compliance across the entire network, identify fault current return paths, and pinpoint any necessary preventive maintenance measures. The paper also delves into the crucial roles played by soil resistivity and split factors in the earthing system domain. A case study is included to support the innovative nature of the proposed system.

Impact of strength of fault current path on the operation of decoupled double synchronous reference frame – phase locked loop

This paper studies the performance of decoupled double synchronous reference frame - phase locked loop (DDSRF-PLL) synchronizing method during grid fault. The study is carried out using Matlab/Simulink. The contribution of the paper is to reveal that if the DDSRF-PLL proposed in many papers is used, the control system of network side converter (NSC) may become unstable during a symmetrical grid fault. The instability problem appears only when certain tuning parameters of DDSRF-PLL are used and the fault current path is weak. Thus, the problem may not be easily detected. This paper emphasizes that it is mandatory to use PI-controller with integrator anti windup in the loop filter of DDSRF-PLL. In addition, the impact of angular frequency limitation range on the fault ride through performance is evaluated with comparative simulations.

From pole-to-ground fault current return paths in a meshed HVDC network to a grounding modelling simplification for protection studies

Meshed bipolar High Voltage Direct Current grids are considered as one of the preferable solutions for integration of renewable energy sources and increasing the security of power systems on a continental scale. In this context, several fault current studies are proposed in the literature, considering different grounding methods for modular multilevel converter neutral points. But these studies often focus on fault current paths to the fault location, and none of them analyzes the return paths of fault current from the fault location. This article deals with fault currents return paths in case of pole-to-ground fault in a grounding configuration using surge arresters in all stations except one, which is solidly grounded. The influence of this solidly grounded point location on the return paths of fault currents is evaluated. With these results, a modelling simplification is considered for HVDC protection studies. Specifically, the discussion investigates whether all MMC neutral points can be solidly grounded.

Backup protection with accelerating strategy based on fault control of modular multilevel converters in medium‐voltage direct current distribution network

AbstractThe medium‐voltage DC distribution network with multiple DC feeders is more cost‐effective when equipped with switches than DC circuit breakers. Under such conditions, the converters with fault‐handling capacity are blocked to clear the fault, which will cause the rapid disappearance of the fault current. Therefore, the primary protection has to pursue high speed at the expense of reliability, which threatens the network's safety. To construct a reliable protection system, backup protection with an accelerating strategy based on the fault control of converters is proposed. The current is controlled first by the fault control of converters to ensure the fault characteristics during backup protection. Then the DC switches on the healthy line are blocked by the polarity of the current integral, and the distribution network turns into the close‐loop mode to provide a fault current path. When the DC switches on the faulty line disconnect according to the predefined time delay, the current change time is recorded and thus the switches in the network are accelerated without communication. The proposed scheme only depends on the measured local current and the backup function still exists after acceleration. The effectiveness of the proposed scheme is verified in power systems computer aided design/electromagnetic transient including DC (PSCAD/EMTDC).

Analysis of a Grounding System In 20 Kv Distribution Transformer Line in PLTD Gayo Lues

The main purpose of grounding is to create a low-impedance path to the earth's surface for electric waves and transient voltages. An effective grounding system will minimize these effects. The grounding system plays a very important role in the protection system. The grounding system is used as a fault current discharge path to the ground. According to its function, grounding is divided into 2, namely grounding the neutral point of the power system and grounding equipment. The neutral grounding of the power system serves as a safety system or network, while the grounding of the equipment functions as a safety against touch voltage. Measurement of the type of grounding electrode on a 20 kV distribution transformer at PT. PLN Rema Gayo Lues Area uses 2 rod electrodes with a grounding resistance value of 2 Ohms.

Mitigating low fault current in microgrids through renewables-battery hybrid units

One of the major problems with inverter-based distributed generation (IBDG) compared to synchronous generators, is the little fault current contribution during fault condition in islanded mode of operation. Particularly, the increased penetration of IBDGs such as renewable energy sources (RES) into the microgrid (MG) has a substantial impact, as it would lower the fault current level; such diminished fault current induces mal-trip and fail to trip of protective relays causing problems in fault detection and isolation and consequently degrades the MG protection. To tackle this issue, this paper proposes an adaptive protection scheme that considers RES, Battery Energy Storage System (BESS), Hybrid units in the MG. The proposed scheme applies an internal cooperation strategy between RES and BESS to ensure reliable output power. Then, a power flow-based fault analysis is performed to determine the fault current paths. A fault current zone (FCZ) is formed out of the IBDGs that are found to be on the observed fault current paths and an optimal residual capacity is determined for the BESS units within FCZ; the optimization is formulated as a nonlinear program for maximizing the residual capacity of the BESS unit. Validation of the proposed scheme is carried out through simulation of the IEEE 33 bus systems. The simulation results confirm the effectiveness of the proposed protection scheme and its superiority to competing approaches in the literature.

Power Arcing Fault Detection and Location Algorithm Solution in Two and Three Dimensions Euclidean Planes Using an Analytic Geometry Method Instead of an Iterative or Numerical Method

The relationship between the electric current and the magnetism is well demonstrated by the Faraday's induction and conductivity laws. Under this concept, it follows that, through intensive laboratory experiments, it has been established that the arcing fault current path related sparks are indeed source of ElectroMagnetic Radiated (EMR) signals waves. These EMR can be detected and located at a relatively remote distance, with the aid of directional antennas arrays, at considerable and reasonable accuracy. Under this novel concept of power arcing fault source point triangulation, the arc EMR data play a critical role in providing essential timing information onto which the arc fault detection and location algorithm is based. Thus, from these arc EMR recorded and gathered data, the signals Time Differences Of Arrival (TDOA) information or signatures can be easily extracted from a pair of antennas, with the aid of an appropriate signal processing tool, namely the cross-correlation (Xcorr) function. Since the electric arc phenomenon is unpredictable practically, therefore, the use of the arc signal Time Of Arrival (TOA), is impossible for the fault source point triangulation solution. In contrast, the values of TDOA seem to be efficient for solving the system of hyperbolic equations which has been imposed by this particular field measurement structure and constraints. It is of interest to mention that, the arc fault EMR field measurement structure and constraints are given and determined by the distributed antennas arrays locations or positions only. In other words, with the knowledge of both the antennas arrays locations Cartesian Coordinates (CC), together with the TDOA values, it is possible to pinpoint the unknown target power arcing fault exact source point position or location, not only in two-dimensions (2D), but also in three-dimensions (3D) Euclidean plane. Thus, this kind of arc fault source point position or location solution finding is generally referred to as a source point triangulation method. This source point triangulation method consists of solving a system of hyperbolic equations as aforementioned. In fact, under a geometry analysis process, it follows that, if only if the arcing fault hazard formation time is known in advance, therefore, the solution of a system of hyperbolic equations consists of finding the intersection point of at least two or more circles. Such that, each of these circles, will be centered at each antenna in such a way that each circle will have a radius given by the distance derived from the value of TOA together with the power arcing fault hazard ignition time stamp or signature. In contrast, since the arcing fault hazard formation stage time is unknown in practice, therefore the solution of the system of hyperbolic equations consists of finding the intersection point of at least two or more hyperbolas. Such that each of these hyperbolas will have a focal point determined by the location of each antenna and the distance between pair of foci will be given by the values of TDOA. However, generally, a system of hyperbolic equations can be solved either with the aid of an analytic method or with that of a numerical method (also known as iterative method). Unlike the majority of this research field related relevant published literature into which the iterative methods have been used intensively, this paper presents an accurate analytic geometry method in order to solve the electric arc faults EMR source point exact location or position. As a result, it appears that, this novel proposed analytic geometry method has shown its potential in clarifying the power arcing fault source position or location, at a reasonable and considerable accuracy.

Analysis and calculation method for multiple faults in low-resistance grounded systems with inverter-interfaced distributed generators based on a PQ control strategy

The short-circuit characteristics of low-resistance grounded systems (LRGSs) under multiple faults have fundamentally changed because of the high penetration level of inverter-interfaced distributed generators (IIDGs). However, an analysis and calculation method for multiple faults (ACMMF) with IIDGs that is a standard basis for fault features, relay protection, safe evaluation and design of LRGSs is currently lacking. A novel systematic ACMMF is analytically proposed in this paper based on ideal transformer and multiport network theory. Based on the proposed ACMMF, composite networks under various fault conditions are established, which provides a straightforward presentation of fault current paths and equivalent impedance and simplifies the modelling procedure for fault analysis and calculation. Furthermore, to overcome the strong nonlinear inter-IIDG couplings, an iterative correction algorithm is proposed for accurate IIDG fault current calculations. Finally, the accuracy of the proposed method is verified by PSCAD/EMTDC simulation. The results show that the proposed methods have good adaptivity to different system structures, operation modes, fault types and flexible access of IIDGs.

A new fault resistance compensation scheme for distance relays of parallel lines with untransposed conductors

Line to ground (L-G) faults with a highly-resistive fault current path can be considered as the main reason for the distance relays underreach. This paper presents a new scheme to compensate commercial distance relays for the high fault resistance, without making any changes in its conventional structure, and is applicable to the under-operation relays. It operates on relay feeding signals measured by instrument transformers and corrects them in a way that the relay is enabled to calculate the desired fault impedance in case of high-resistance faults (HRFs). For this objective, a straightforward time-domain formula is creatively obtained first for a fast and accurate evaluation of the fault distance in case of L-G faults. The evaluated fault distance is then utilized to generate the signals correcting the relay feeding signals. The proposed approach is developed for the parallel lines with untransposed conductors on both circuits, hence it is intended for the lines at the HV and MV levels. Being readily implementable, preserving the relay security, insignificantly affecting the relay tripping time, being insensitive to the noise and fully eliminating the HRF-caused underreach are the features the proposed approach includes, which are verified by comprehensive simulation studies in PACAD/EMTDC for a variety of fault and system loading conditions.

LVDC Microgrid를 위한 웨이브릿 변환 기반 지락고장 검출

LVDC Microgrid is a small-scale power grid that can increase the stability and efficiency of power supply in a small area, enabling independent operation and increasing the acceptability of DERs (Distributed Energy Resources). However, this is an ungrounded IT (Isolated Terre) grounding system, and even when a ground fault occurs, there is no fault current path and no significant difference compared to the steady state current, so fault detection is very difficult. WT (Wavelet Transform), an easy tool for transient analysis and signal identification, is to be applied to the detection of ground faults in LVDC Microgrid.<BR>In this paper, we propose a Wavelet transform-based ground fault detection method for an ungrounded LVDC Microgrid. By changing the level and order of various MW (Mother Wavelets) using the current collected in the existing pulse injection method, the optimal MW for ground fault detection method is derived. First, an ungrounded LVDC Microgrid is modeled using PSCAD s/w, and ground faults are simulated by varying the fault point and fault resistance. We implement the selected optimal Wavelet transform-based ground fault detection method using Matlab s/w. Finally, performance evaluation is performed through simulation using various collected signals.

A Fault Current Limiting Approach for Commutation Failure Prevention in LCC-HVDC Transmission Systems

Commutation failure is one of the most frequent failures in line-commutated converter based high-voltage direct-current (LCC-HVdc) systems which may lead to the outage of HVdc links, and thus affect the performance of the power system. Most commutation failures are caused by voltage reduction due to ac system faults. In this paper, a commutation failure prevention module (CFPM) is developed, which inserts the optimal value of resistance proportional to the reduced extinction angle in series with the fault current path using a simple switching method. When a fault occurs at the inverter ac side, a self turn- off switch starts switching with a pre-specified frequency and controlled modulation index, which limits the fault current to the desired value and inhibits commutation failure. The salient feature of the proposed CFPM is that it is fully controllable. In addition, despite the available controller modification methods which are not effective for low-impedance faults, the proposed CFPM can prevent commutation failure regardless of the fault severity. The practical performance and feasibility of the developed CFPM is validated through laboratory testing, using the real-time Opal-RT hardware prototyping platform. The experimental results demonstrate that the proposed strategy can effectively eliminate the commutation failure or repetitive commutation failures under different fault types.

A Low Conduction Loss Modular Multilevel Converter Topology With DC Fault Blocking Capability and Reduced Capacitance

A new modular multilevel converter (MMC) sub-module (SM) topology based on the reverse-blocking insulated gate bipolar transistor (RB-IGBT) is proposed in this brief for equipping the system with dc fault blocking capability. In addition, the proposed topology has lower conduction loss than all of the existing SM topologies with dc side fault blocking capability. By employing RB-IGBTs in the sub-module circuit, it is possible to change the fault current path to block the dc side fault without inserting extra semiconductor devices in the normal current path, thus reducing the conduction loss when compared to other topologies. A comparison between the proposed topology and the existing topologies in terms of components number, power loss and dc fault blocking capability is carried out to show the superiority of the proposed topology. To reduce the cost of the topology, a control strategy is introduced to reduce the capacitance of the proposed topology. By optimizing the amplitude of the second-order and fourth-order harmonic currents when injecting third-order harmonic voltage, the capacitance can be reduced to about 37% of that of the conventional method. To verify the dc side fault blocking capability and the effect of the proposed method, the controller hardware in the loop experiment based on RT-LAB is conducted. The reported study results confirm the dc side fault riding through capability of the proposed sub-module topology and the effectiveness of the proposed method is also validated.

Coordination of Over Current Relays in Distributed Generation

The modern power system increases the power by adding Distributed Generation (DG). When distributed energy sources are added to the network, they effect the conventional fault levels and fault current paths and have been proved that the accurate operation of the overcurrent protection is not possible. This paper describes time overcurrent relay protection for radial distribution system (RDS) with DG. These time overcurrent relays is implemented by using IEC-60255 standard. The proposed protection outline is verified on a typical IEEE 13-bus radial distribution system with distributed energy source. The model of the system is replicated by using MATLAB/Simulink.

A Novel MMC Sub-Module Topology With DC Fault Clearance Capability

The sub-module of the modular multilevel converter (MMC) in practical engineering mainly adopt half-bridge sub-module (HBSM), which does not have the capability to clear dc fault current. Based on the analysis of the dc fault current path of traditional HBSM, this paper proposes a novel MMC sub-module with dc fault clearance capability. It adds a bidirectional switch and two diodes to the HBSM. When the dc fault occurs, the bypass absorption circuit is introduced into the arm through the diodes and the freewheeling effect of diodes is eliminated by the sub-module capacitor voltage. Thereby, the fault current can be extinguished rapidly and the requirement for the consistency of the trigger pulse is reduced. By comparing with the operation principle of the HBSM, it can quickly block the dc fault current without changing the original control and modulation strategy. Then, the fault clearance principle of the sub-module and the voltage stress of the key power devices are analyzed. The simulation results in MATLAB/SIMLINK have verified the validity and feasibility of the proposed sub-module topology in the dc fault current clearance.

An Improved Fault-Tolerant Control Strategy for High-Power ANPC Three-Level Inverter Under Short-Circuit Fault of Power Devices

The high-power active neutral-point clamped (ANPC) three-level inverter has high-reliability requirements for the system operation, and short-circuit fault, very common, and serious problem in the operation will affect the operation stability. To solve this problem, the fault current path analyses under a single device and multi-device short-circuit fault were carried out first in this paper. Second, on the basis of the different fault condition, an improved fault-tolerant control strategy was proposed. This strategy maintains the three-level operation under a single device short-circuit fault, and under multiple device, fault operates with low withstanding voltage. Finally, the experiment was made on a 1 MW ANPC three-level platform, which proved the effectiveness of the proposed method.

The third harmonic generated voltage by salient-pole synchronous generator during 3-phase-to-ground fault

Summary Conducted experiment proves that third harmonic (TH) component of salient-pole synchronous generator behaves differently compared with fundamental frequency component in terms of generated voltage. Fundamental frequency-generated voltage depends on the excitation system, and the generated voltages before and during fault are almost the same. However, TH-generated voltage is independent of the excitation system. In other words, variation of the excitation current does not affect the generation of TH voltage as much as it affects the generation of fundamental frequency voltage. On top of that, the generation of TH voltage before and during fault varies significantly. Hence, a typical method to solve fault analysis for 3-phase–to–ground fault is not applicable in TH domain. Therefore, in this article, a method to find TH-generated voltage is proposed. The TH-generated voltage during 3-phase–to–ground fault is presented in terms of percentage called the harmonic fundamental ratio, which is the ratio of TH zero-sequence–generated voltage to fundamental frequency–positive sequence-generated voltage during fault. The harmonic fundamental ratio is obtained by short circuiting the generator terminal prior to the application in the system. It turns out that the generated TH voltage by synchronous generator depends on the zero-sequence TH impedance of the TH fault current path. Lastly, the proposed method to obtain TH-generated voltage by salient-pole synchronous generator is validated by comparing the calculated TH fault current with the actual TH fault current obtained from experiment.

Conductive and Inductive Coupling between Faulted Power Lines and Buried Pipeline by Considering the Effect of Soil Structure

&lt;p&gt;The AC total interference of faulted power lines to gas pipelines sharing the same right of way, which may pose a threat to operating personnel and equipment, was studied. The main advantage of this work is to determine the effects of different soil structures on the induced voltage for various soil resistivities. Two main approaches were used to compute the induced voltages, namely the method of moment (MOM), which is based on electromagnetic field theory, and the circuit based method, which uses the circuit grounding analysis to compute the conductive interference and the circuit based models to compute the inductive interference. A 10-km-long parallel pipeline-transmission line model was developed. The soil resistivity was varied, and the induced voltages obtained from both approaches were compared. Soil resistivity and soil structure are important parameters that affect the AC interference level. The results of the study show that the earth potentials and the metal GPRS are independent. Higher soil resistivity causes the tower ground resistance to increase, thus making the shield wire’s attractiveness as a fault current return path to increase, which in turn forces the induced net EMF and the cumulative GPR in the pipeline to reduce.&lt;/p&gt;

Hardware-In-the-Loop Design and Optimal Setting of Adaptive Protection Schemes for Distribution Systems With Distributed Generation

The constantly increasing presence of distributed generation (DG) in modern distribution systems induces grid configuration alterations, affecting thus the short-circuit levels and fault current paths. To address all arising protection challenges, adaptive protection is being implemented. This paper presents an innovative hardware-in-the-loop adaptive protection scheme, which incorporates real-time simulation, multifunction protection, centralized control, and optimal calculation of protection settings. The proposed adaptive scheme is based, first, on the determination of optimal relay setting groups, and then on their online self-adjustment, providing a continuously tuned protection scheme to the variable system operating modes. The efficacy of the proposed solution is demonstrated through two distribution test networks with embedded DG.

Optimum Resistive Type Fault Current Limiter: An Efficient Solution to Achieve Maximum Fault Ride-Through Capability of Fixed-Speed Wind Turbines During Symmetrical and Asymmetrical Grid Faults

This paper proposes an optimum resistive type fault current limiter (OR-FCL) as an efficient solution to achieve maximum fault ride-through (FRT) capability of fixed-speed wind turbines (FSWT) during various grid faults. In this paper, a dedicated control circuit is designed for the OR-FCL that enables it to insert an optimum value of resistance in the FSWT's fault current's path for improving transient behavior of the FSWT. The optimum resistance value depends on fault location and prefault active power. The control circuit of the proposed OR-FCL is capable of calculating the optimum resistance value for all the prefault conditions. By using the proposed control circuit, the FSWT can achieve its maximum FRT capability during symmetrical and asymmetrical faults, even at zero grid voltage. Analysis is provided in detail to highlight the process of calculating the optimum resistance of the OR-FCL. Moreover, the effect of the resistance value of the OR-FCL on the FRT behavior of FSWT is investigated. To show the efficiency of the proposed OR-FCL, its performance during various operation conditions of the FSWT is studied. It can be proved that each operation condition needs its own optimum resistance value, which can be obtained by using the proposed control circuit during the fault to achieve the maximum FRT capability of the FSWT. Comprehensive sets of simulations are carried out in PSCAD/EMTDC software and the results prove the effectiveness of the proposed approach.

저압직류 접지시스템의 지락경로 흐름 분석에 따른 감전 보호기법

This paper presents protection techniques against electric shock in low voltage DC(direct current) grounding systems depending on the analysis of earth fault current paths. Firstly, the comparison between alternating current and direct current on human was conducted, and current threshold values for each current path and for long duration were analyzed. Secondly, the analyses of the earth fault current flows were performed depending on the grounding types and earth fault conditions. Lastly, based on these analyses, adequate protection measures of electric shock depending on low voltage DC grounding types were provided.