Envelope Elimination Research Articles

Study on the Concentration of Chlorophyll a and Suspended Solid Using Hyperspectral Quantitative Model in Nansi Lake

This paper process spectral data of the water based on normalization and Envelope elimination methods, by correlation analysis between land surface spectral data of single band or combining band and concentration of chlorophyll a and Suspended Solid to select band with max correlation coefficients, construct the best linear regressive models between spectral data and chlorophyll a and suspended solid. Firstly, the reflectance of the land surface of Hyperion images were obtained through geometric rectification and atmospheric modification adopted the 6S model, then the maps of spatial distributions of the concentration of chlorophyll a and suspended solid in the Nansi Lake were obtained using the best linear regressive model of chlorophyll a and the best linear regressive model of suspended solid. The results show that, data process of envelope elimination can remove the effect of the background spectral effectively and stand out the features of spectral absorption and reflection, and the combination of spectral R700/R560 and R736/R759 can be used to retrieved the concentration of chlorophyll a and suspended solid in the Nansi Lake.

Amplitude-modulation characteristics of power-combining Class-E amplifier with finite choke

Power back-off performances of a new variant power-combining Class-E amplifier under different amplitude-modulation schemes such as continuous wave (CW), envelope elimination and restoration (EER), envelope tracking (ET) and outphasing are for the first time investigated in this study. Finite DC-feed inductances rather than massive RF chokes as used in the classic single-ended Class-E power amplifier (PA) resulted from the approximate yet effective frequency-domain circuit analysis provide the wherewithal to increase modulation bandwidth up to 80% higher than the classic single-ended Class-E PA. This increased modulation bandwidth is required for the linearity improvement in the EER/ET transmitters. The modified output load network of the power-combining Class-E amplifier adopting three-harmonic terminations technique relaxes the design specifications for the additional filtering block typically required at the output stage of the transmitter chain. Qualitative agreements between simulation and measurement results for all four schemes were achieved where the ET technique was proven superior to the other schemes. When the PA is used within the ET scheme, an increase of average drain efficiency of as high as 40% with respect to the CW excitation was obtained for a multi-carrier input signal with 12 dB peak-to-average power ratio.

Digital processing compensation mechanisms for highly efficient transmitter architectures

This article presents the design and final field programmable gate array (FPGA) integration of the necessary baseband (BB) signal processing for some of the emergent highly efficient amplification architectures. Following the software-design radio concept, this design is aimed at generating, monitoring and correcting BB and intermediate frequency signals for operating in highly efficient power amplifier (PA) architectures, such as envelope tracking PAs, envelope elimination and restoration or polar transmitter and linear amplification with non-linear components. The closed-loop nature of this FPGA design allows introducing control strategies to overcome or mitigate the unwanted distortion arising from maladjustments in the aforementioned efficient transmitter architectures. In addition to the signal generation blocks, three key blocks are included in the design to significantly contribute to the performance of these power-efficient architectures. These three blocks are a fractional delay filter block, a block that generates a slower (or slew-rate-limited) version of the envelope of the signal and a digital adaptive predistortion block. Experimental results presented in this article show the importance of including these blocks to provide these efficient transmitter architectures with correcting capabilities to guarantee power efficiency and linear amplification at RF.

Dual-Mode High-Dynamic Range Class E HBT Power Amplifier for WCDMA EER Transmitter

This letter demonstrates a high-dynamic range GaAs heterojunction bipolar transistor Class E power amplifier (PA) for a WCDMA envelope elimination and restoration transmitter using a dual-mode amplification. An impedance optimization can operate the lossless high-power Class E mode and lossless low-power Class AB mode. This PA has a high dynamic range of -50 dBm to 27 dBm and obtains a remarkably improved efficiency of 9% and 27% power-added efficiency (PAE) at output powers of 0 dBm and 10 dBm, respectively, for low-power mode, and 40% and 48% PAE at 20 and 27 dBm, respectively, for high-power mode.

High Power Wideband Class-E Power Amplifier

This letter shows a high-power, high-efficiency, wideband Class-E RF power amplifier designed upon the load admittance synthesis concept and built using an uncomplicated low-loss load network with a low loss wideband admittance transformer as the main component. It uses a power Silicon LDMOS transistor to provide up to 145 W at 28 V peak power, up to 86% drain efficiency over 35% fractional bandwidth (from 85 to 120 MHz) and 15.6 dB gain at peak power without any adjustments. These are clear performance advantages over previous published works and commercially available amplifiers at a similar frequency band and power level. The amplifier applications include FM broadcast, aeronautical communications, nuclear, MRI, heating or RF power stage for Envelope Elimination and Restoration transmitters.

A Technique for Implementing Wide Dynamic-Range Polar Transmitters

This paper presents a technique for implementing wide dynamic-range polar transmitters based on the envelope elimination and restoration technique. The fast-varying instantaneous output power level is controlled by a switch that modulates the input signal of the power amplifier (PA), whereas the slow-varying average power level is controlled by changing the dc voltage of the drain of the PA. A cellular band prototype transmitter system is constructed using commercially available components. Using a CDMA2000 1× signal with 4.5-dB peak-to-average power ratio at 836.5 MHz, the prototype transmitter achieved a dynamic range of over 80 dB while passing the adjacent and alternate channel power ratios for the CDMA2000 standard without the use of digital pre-distortion or calibration.

Advanced Doherty Architecture

For modulated signals with a high peak-to-average power ratio (PAPR), the transmitter has to be operated with its average output power backed off for an acceptable linearity at the expense of low efficiency. To achieve high efficiency and high linearity at the same time, both an efficiency enhancement technique and a linearization technique should be utilized. A powerful and reliable linearization technique, digital predistortion (DPD), is currently the most favored method for the linearization of base-station amplifiers [1]-[3]. Possible efficiency enhancement techniques are the hybrid envelope elimination and restoration/envelope tracking technique (H-EER/ET) and the Do-herty technique.

Optimization of output matching network for class F power amplifier according to envelope in the envelope elimination and restoration transmitter

AbstractThis article presents the design and optimization of output matching network according to envelope for class F power amplifier (PA), which is to apply to envelope elimination and restoration (EER) transmitter.In this article, to increase the PAE of class F PA, which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in second‐harmonic and is open circuit in third‐harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 1890–1893, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.25335

A Multi-Level Pulse Modulated Polar Transmitter Using Digital Pulse-Width Modulation

This letter presents a multi-level pulse modulated polar transmitter architecture. Compared to a conventional gate-modulated envelope elimination and restoration transmitter, the use of the proposed technique is capable of reducing the in-band quantization noise level. Moreover, the proposed technique can increase the pulse-width modulation sampling frequency by relaxing its resolution requirement, which eases the filtering requirement at the output. A prototype transmitter system is constructed using commercially available components. Using a CDMA2000 1X signal at 836.5 MHz, it achieved over 40% power-added efficiency at 24.5 dBm output power level while passing the adjacent and alternate channel power ratios for the CDMA2000 standard.

Multilevel Power Supply for High-Efficiency RF Amplifiers

In communication systems, linear power amplifiers (PAs) (class A, B, or AB) are usually used as a solution for the PA stage. These amplifiers have high linearity, but suffer from low efficiency when the transmitted signal has high peak-to-average power ratio. The Kahn envelope elimination and restoration technique is used to enhance the efficiency of RF transmitters by combining highly efficient, nonlinear RF amplifier (class D or E) with a highly efficient envelope amplifier in order to obtain linear and highly efficient RF amplifier. This paper presents a solution for the envelope amplifier based on a combination of multilevel converter and linear regulator. The proposed solution can reproduce any signal with maximum spectral component of 2 MHz and give instantaneous maximum power of 50 W. The efficiency measurements show that when the signals with low average value are transmitted, it has up to 49% higher efficiency than an ideal linear regulator that is used as a conventional solution. Additionally, the algorithm for the optimization of the voltage levels, for the multilevel converter, is explained as well.

Theoretical Analysis of Hole Punch Signal Conditioning for High Efficiency EER Power Amplifiers

High efficiency and linearity can be achieved using Kahn's envelope elimination and restoration (EER) technique. However, when used with modulation schemes such as code division multiple access (CDMA) and orthogonal frequency division multiplexing (OFDM), the resulting polar drive signals suffer from expanded bandwidth. Rudolph has shown that the bandwidth of the polar drive signals can be reduced by hole punching the signal in the phase plane (limiting the minimum envelop of the modulated signal). This paper theoretically analyses the hole punch method and quantifies adjacent channel interference (ACI) and the error vector magnitude (EVM) caused by the ensuing distortion. It also shows how the results differ using different shapes and lengths of window functions. Although the hole punch process manages to achieve spectrum improvement for polar components, its EVM will limit the data throughput in some wireless standards.

A Design of CMOS Class-E Power Amplifier with Phase Correction for Envelope Elimination and Restoration (EER)/Polar Systems

SUMMARY A circuit technique to correct Vdd/PM distortion and improve efficiency as supply modulation of cascode class-E PAs has been proposed. The experimental result shows that the phase distortion can be improved from 20 degrees to 5 degrees. Moreover, a system co-simulation result demonstrated that the EVM can be improved from −17 dB to −19 dB.

Analysis of the feedback envelope tracking linear class E power amplifier

Feedback envelope tracking amplifier is one technology to realize linear amplification for nonlinear class E power amplifier. In this paper, the basic architecture and frequency response of the feedback envelope tracking amplifier are analyzed in detail. And the analysis shows that the feedback envelope tracking loop can be implemented to satisfy the system's specifications of linearity and stability, if the bandwidth and the other design parameters are properly selected. The limited bandwidth and different time delay between the envelope path and the phase path can cause intermodulation distortions which deteriorate the linearity of the feedback envelope tracking amplifier, the model for the intermodulation distortions of the feedback envelope tracking class E power amplifier is analyzed compared to the envelope elimination and restoration transmitter. In order to evaluate the broadband performance of the feedback envelope tracking class E power amplifier, the error vector magnitude (EVM) specification is also analyzed, and the simulation results on EVM for WCDMA signal is given.

A Potential Transmitter Architecture for Future Generation Green Wireless Base Station

Current radio frequency power amplifiers in 3G base stations have very high power consumption leading to a hefty cost and negative environmental impact. In this paper, we propose a potential architecture design for future wireless base station. Issues associated with components of the architecture are investigated. The all-digital transmitter architecture uses a combination of envelope elimination and restoration (EER) and pulse width modulation (PWM)/pulse position modulation (PPM) modulation. The performance of this architecture is predicted from the measured output power and efficiency curves of a GaN amplifier. 57% efficiency is obtained for an OFDM signal limited to 8 dB peak to average power ratio. The PWM/PPM drive signal is generated using the improved Cartesian sigma delta techniques. It is shown that an RF oversampling by a factor of four meets the WLAN spectral mask, and WCDMA specification is met by an RF oversampling of sixteen.

A 60% PAE WCDMA Handset Transmitter Amplifier

This paper reports the design of a class-E envelope elimination and restoration (EER) based amplifier for a wideband code division multiple access handset application that attains 60% power-added efficiency at peak power output. Emphasis is placed on the envelope modulator that employs a novel split-frequency approach in order to attain an efficiency of 80% for this part of the system. In contrast to standard EER systems, the carrier is not amplitude limited, but rather predistorted to maintain both linearity and power efficiency. Performance in terms of efficiency, spectral output, and error vector magnitude is reported.

Design of Highly Efficient Wideband RF Polar Transmitters Using the Envelope-Tracking Technique

This paper discusses the design issues of highly efficient and monolithic wideband RF polar transmitters, especially the ones that use the envelope-tracking (ET) technique. Besides first reviewing the current state-of-the-art polar transmitters in the literature, three focus topics will be discussed: 1) the system-on-a-chip (SoC) design considerations of the monolithic polar transmitter using ET versus EER (envelope elimination and restoration); 2) the design of highly efficient envelope amplifier capable of achieving the high efficiency, current, bandwidth, accuracy and noise specifications required for wideband signals; and 3) the design of high-efficiency monolithic Si-based class E power amplifiers (PAs) suitable for ET-based RF polar transmitters. A design prototype of a polar transmitter using ET and a monolithic SiGe PA that passed the stringent low-band EDGE (Enhanced Data rates for GSM Evolution) transmit mask with 45% overall transmitter system efficiency will be given; the simulated data of the entire polar transmitter system is also compared against the measurement. Further investigations on how to solve the technical challenges to successfully implement linear and high-efficiency ET-based polar transmitter for broadband wireless applications such as WiBro/WiMAX are also discussed.

A Class-G Supply Modulator and Class-E PA in 130 nm CMOS

A class-G supply modulator utilizes parallel low- dropout (LDO) regulators that are controlled by comparators and negative feedback. It optimizes the power consumption of a nonlinear power amplifier (PA) operating with supply modulation, such that it draws current from one of multiple appropriately sized supply voltages as determined by the input signal envelope. The class-G modulator is used in conjunction with a class-E PA operating in an envelope elimination and restoration (EER) mode to efficiently amplify signals with large peak-to-average ratios. The measured maximum output power and power added efficiency (PAE) are 29.3 dBm and 69%, respectively. The class-G technique is demonstrated for a 64 QAM, OFDM input signal (symbol period = 4 mus) wherein the measured error vector magnitude (EVM) is 2.5% and the average efficiency of 22.6%.

Optimized Envelope Shaping for Hybrid EER Transmitter of Mobile WiMAX— Optimized ET Operation

The envelope signal of a Hybrid Envelope Elimination and Restoration (H-EER) technique is optimally reshaped to improve linearity and efficiency, resulting in an Envelope Tracking (ET) architecture. The bias Vds of the ET is adjusted to be a higher value than that of the conventional H-EER technique to enhance the output power and power-added efficiency (PAE). Furthermore, the bias is shifted above the knee region of the PA to reduce the AM/AM and AM/PM distortions at the low bias region. For the verification, the Mobile WiMAX signal with 8.2 dB peak-to-average power ratio and 5-MHz signal bandwidth is used. In the interlock experiment, the PAE of the transmitter is 40% at an output power of 42.04 dBm. By using the digital predistortion technique, the Relative Constellation Error has satisfied the specification of - 33.6 dB. These results clearly show that the H-EER transmitter with ET shaping is the most suitable architecture for the highly linear and efficient Base Transceiver Station transmitter.

High-Efficiency Hybrid EER Transmitter Using Optimized Power Amplifier

This paper describes a new design approach for a power amplifier (PA) of the highly efficient hybrid envelope elimination and restoration (H-EER) transmitter. Since the PA operates mostly at the average power region of the modulation signal, power-added efficiency (PAE) of the PA at the average drain voltage is very important for the overall transmitter PAE. Accordingly, the PA is designed to have a maximum PAE in that region. The performances of the proposed PA and a conventional PA under H-EER operation are evaluated via ADS and MatLab simulations using a behavioral large-signal model of a silicon LDMOSFET, which verifies that the proposed PA has significant advantages for the H-EER transmitter in both PAE and output power. A saturated amplifier, inverse class F, has been implemented using a 5-W peak envelope power LDMOSFET for 3GPP forward-link single-carrier wideband code-division multiple-access at 1 GHz with a peak-to-average power ratio of 9.8 dB. An envelope amplifier is built that has an efficiency of above 68% and peak output voltage of 31 V for an interlock experiment. The overall PAE of the transmitter with a conventional PA is 35.5% at an output power of 29.2 dBm. On the other hand, the transmitter with the proposed PA delivers significantly improved performances: PAE increased by 4% and output power by 2.5 dB. The H-EER transmitter has been linearized by the digital feedback predistortion technique. The measured error vector magnitude is reduced to 1.47% from 6.4%. These results clearly show that the proposed architecture is a good candidate for efficient linear transmitters.

IEEE 802.16e Mobile WiMAX용 고효율 고출력 하이브리드 포락선 제거 및 복원 전력 송신기

We have described a high power hybrid envelope elimination and restoration(H-EER) transmitter for IEEE 802.16e Mobile World Interoperability for Microwave Access(WiMAX) using an efficiency optimized power amplifier(PA). The PA has been designed to have maximum PAE at the important power generation , region using Nitronex 100-W PEP GaN HEMT. For the high power application, H-EER transmitter should be considered the regenerative oscillation problem due to the PA`s bias fluctuation effect and bias modulator stability issue. Therefore, the bias modulator for H-EER transmitter has been designed to suppress the regenerative oscillation. For the interlock experiment, the bias modulator has been built with the efficiency of 72% and peak output voltage of 30 V for the envelope signal with a PAPR of 8.5 dB. The H-EER transmitter for WiMAX application has been achieved a high PAE characteristic, 38.8 % at an output power of 41.25 dBm. By using digital predistortion(DPD) technique, the Relative Constellation Error (RCE) has been satisfied the specification of -34.5 dB. This is the first work at 2.655 GHz high power H-EER transmitter for WiMAX application.