ABSTRACT Perovskite memristors are redefining the landscape of memory storage and neuromorphic computing by combining rich ion dynamics, ultralow voltage switching, cost‐effective solution processability, and excellent scalability within a single material platform. Harnessing their intrinsic stochasticity in conductive filamentary switching provides a physical route to true random number generation and a unique window into the fundamental physics of resistive switching. Herein, we investigate solution‐processed ITO/Cs 0.1 FA 0.9 PbI 3 /Ag organic–inorganic hybrid halide perovskite (OIHP) memristors that exhibit low voltage switching (∼0.29 V) with distinct cumulative function (∼100x) between ON/OFF states, demonstrating stability of 10 3 cycles and providing a clear mechanism of OIHP‐based memristors, thereby advancing fundamentals of next‐generation neuromorphic computing and practical hurdles in electronics hardware. Investigating the elemental analysis at the buried interface via X‐ray photoelectron spectroscopy (XPS) and energy dispersive X‐ray spectroscopy (EDX) reveal previously overlooked and underexplored phenomena at the ITO‐perovskite junction, offering essential understanding into the switching mechanism. Additionally, pulse stress testing with sharp 500 µs‐wide excitation demonstrates robust endurance and concurrently exposing the intrinsic complexity and dynamic unpredictability of filamentary interactions. These results unveil the mechanistic understanding of FA‐based OIHP memristors and also provide vital insights into their potential in large‐scale, brain‐inspired architectures for neuromorphic computing and secure information processing.

Abstract All products are likely to be influenced by obsolescence. The consequences can be serious since an obsolete part or component could raise issues in terms of cost, production, safety, and maintenance. To minimize the impact, strategies must be implemented throughout the product’s intended life. This research reviews 188 papers on product obsolescence management published in the past three decades to understand the proposed strategies. Two research questions are addressed: (1) What is the academic landscape of product obsolescence management? (2) What are the main research topics and how are these topics covered by the literature? This work first conducts a bibliometric analysis and then analyzes the existing works under seven topics, i.e., general management, upgrade and replacement, mitigation, monitoring, forecasting, design refresh and strategy, and obsolescence impacts. The key approaches and performed actions are highlighted for each topic. The findings show that a range of products has been covered, whereas electronic hardware still constitutes a large proportion. Meanwhile, attention to software obsolescence has grown. Cost model-based strategies are a key means of obsolescence management, particularly for replacement, mitigation, and monitoring. The findings also reveal the need to consider multiple key aspects when implementing these strategies. Despite considerable research on different strategies, challenges remain in developing a long-term vision and techniques for obsolescence management, predicting obsolescence, integrating strategies, and addressing the diverse impacts across industries. Limited research has explored how to identify the most appropriate approach or performed action, and further studies are needed to develop new methods and techniques to manage obsolescence and also to provide systematic guidance for implementing obsolescence management strategies.

This research article numerically investigated the performance of non-oxide hybrid Boron Nitride Silicon Carbide (BN+SiC/water) hybrid nanofluid in high heat flux miniaturized electronic hardware. 3d-CFD model validated with established experimental data on a triangular section, oblique microchannel geometry is used to explore the influence of total particle loading (0.5 to 1.5 %), relative particle proportion, on the Nusselt number (Nu), friction factor (f) and thermal performance factor (TPF). The results compared with the benchmark conventional oxide hybrid nanofluid system (Al₂O₃+CuO/water) and found superior on overall thermo-hydraulic performance. Heat transfer enhancement by 50% with respect to base fluid water, is quite an improvement in thermal enhancement, if we compare with the benchmark oxide system reference of around 37%. It is also observed that relative SiC proportion increases the performance of this system. Nanoparticle size and morphology effects on the thermo-hydraulic performance is also studied in this work. Smaller size particles are found beneficial in a quantitative analysis in the range of 10nm to 90nm average particle diameter. Non spherical high aspect ratio shapes nanoparticles enhance the performance of the nanofluid observed in this study. This study not only introduced a novel advanced heat transfer fluid but also allow the design customization insight for this BN+SiC/water hybrid nanofluid system.

The subclinical atrial fi brillation (SCAF) in patients with cardiac implanted electronic devices (CIED) is a critical area of research in cardiology. It represents episodes of atrial fi brillation (AF) that occur in patients without any noticeable symptoms, registered by electronic devices for prolonged rhythm monitoring. Because of that, early diagnosis has proven to be diffi cult in the absence of advanced monitoring tools, such as smart electronic devices or implantable cardiac hardware. CIED, such as permanent pacemakers (PPM), implantable cardioverter defi brillators (ICD), resynchronization devices (CRT) and Loop Recorders (IRL) are fundamental in the detection of such episodes and provide continuous monitoring of the cardiac electrical activity. The early detections of SCAF provide the ability to initiate early prophylactic or therapeutic measurements that will help reduce not only the burden of disease, but also to reduce morbidity and mortality. The widespread use of CIED`s and wearable devices has led to the detection of subclinical AF in a signifi cant portion of the population. Thus, this detection may often help reduce the incidents of thromboembolism by initiating anticoagulation therapy. However, it is still unknown at what point and in which population long-term anticoagulation is benefi cial, having also in consideration the hemorrhagic risk. This review aims to explore the existing data and to identify the current gaps in knowledge.

Abstract Replicating the operation of biological neurons using electronic hardware is of significant interest for engineering and biomedical applications. Spiking neural network (SNN) models are especially suited as they exhibit temporal dynamics and local synaptic plasticity, closely mimicking biological neural function. To enable biological interaction, real-time response, and the ability to explore and deploy multiple neural models becomes also necessary. In this work, the Hardware Emulator of Evolving Neural Spiking Systems (HEENS), an efficient, fully digital architecture intended for real-time execution of SNNs, is reported. Based on Single Instruction Multiple Data (SIMD) computation, an array of simple but programmable processing elements is controlled by a sequencer dispatching common instructions. Local distributed memory avoids data bottlenecks and enables parallel parameter updates and interconnect reconfiguration. The address-encoded spikes are decoded by local associative memories, that can be modified on the fly, thus supporting evolvable networks. A synchronous ring topology based on fast point-to-point serial links enables multi-node systems with minimal latency and excellent scalability. A control node controls and configures the ring nodes, drives the system execution, and monitors the processed data. The hardware is supported by a user-friendly custom set of tools that performs a simple and fast compilation of neural/synaptic algorithms and network topology on a host computer. The results of field-programmable gate array (FPGA) implementation are reported. Multimodel real-time execution of proof-of-concept networks demonstrates the proposed architecture potential.

<div>Common rail, high-pressure electronic fuel injection is one of the primary technologies enabling high-efficiency and low emissions in modern diesel engines. Most fuel injectors utilize an actively controlled solenoid valve to actuate a needle that modulates the fuel supply into the combustion chamber. The electrical drive circuit for the injector requires extensive development costs, and thus, most designs are proprietary in nature, making it difficult to perform academic studies of the fuel injection processes. This research presents an injector driver circuit to control one or more solenoid injectors simultaneously for research-based injector development efforts. The electrical circuit was computationally modeled and optimized iteratively, and then, electronic hardware was developed to demonstrate control of a Bosch CRIN3 solenoid diesel injector as proof of concept. In addition, the injector performance was quantified by the fuel rate of injection (ROI) profiles obtained in a test rig utilizing the momentum flux method. Results show that the electronic control inputs do not affect the initial fuel ROI profile, which is impacted mainly by the injector geometry and associated fluid dynamics effects.</div>

Graph neural networks (GNNs) have significantly advanced learning and predictive tasks in many domains like social networks and biology. Given the inherent graph structure of integrated circuits (ICs), GNNs have also shown strong results for various IC-related tasks. Here, we review GNN methodologies across three key areas for ICs: electronic design automation (EDA), reliability, and hardware security. We introduce a comprehensive taxonomy and survey, covering various tasks and their solutions by GNNs in depth. We also outline key challenges like scalability and EDA tool integration. Finally, we present GNN4CIRCUITS, an open-source tool for plug-and-play GNN integration for various IC tasks.

Deep learning stands as a cornerstone of modern artificial intelligence (AI), revolutionizing fields from computer vision to large language models (LLMs). However, as electronic hardware approaches fundamental physical limits-constrained by transistor scaling challenges, von Neuman architecture, and thermal dissipation-critical bottlenecks emerge in computational density and energy efficiency. To bridge the gap between algorithmic ambition and hardware limitations, photonic neuromorphic computing emerges as a transformative candidate, exploiting light's inherent parallelism, sub-nanosecond latency, and near-zero thermal losses to natively execute matrix operations-the computational backbone of neural networks. Photonic neural networks (PNNs) have achieved influential milestones in AI acceleration, demonstrating single-chip integration of both inference and in situ training-a leap forward with profound implications for next-generation computing. This review synthesizes a decade of progress in PNNs core components, critically analyzing advances in linear synaptic devices, nonlinear neuron devices, and network architectures, summarizing their respective strengths and persistent challenges. Furthermore, application-specific requirements are systematically analyzed for PNN deployment across computational regimes: cloud-scale and edge/client-side AIs. Finally, actionable pathways are outlined for overcoming material- and system-level barriers, emphasizing topology-optimized active/passive devices and advanced packaging strategies. These multidisciplinary advances position PNNs as a paradigm-shifting platform for post-Moore AI hardware.

Abstract Photonic technologies offer promising solutions to the power consumption, bandwidth constraints and latency limits of electronic hardware used in high‐performance computing and artificial intelligence. Recently, many studies have proposed and successfully demonstrated photonic accelerators based on integrated meshes of Mach–Zehnder interferometers (MZIs), enabling matrix‐vector multiplications directly in the optical domain. While being fast and energy efficient, these photonic architectures still struggle to get the required precision for such applications, because setting the complex coefficients of MZI tunable gates with a high accuracy is still an unsolved problem. This work demonstrates high‐precision automated setting and stabilization of MZI‐based optical gates with a resolution of 7.01 and 8.04 bits for the output power and phase, respectively. Demonstration is achieved on a multistage silicon photonic circuit comprising a coherent input vector generator, an MZI matrix‐vector multiplier, and a coherent receiver for phase measurement. The proposed control strategy can configure the MZIs to any desired working point, without any prior calibration or complex algorithm for the correction of hardware non‐idealities, and prevents the propagation of programming errors, thus allowing scalability toward optical processors of large size.

Hardware friendly deep reservoir computing.

Abstract Squeezed vacuum states of light with bandwidths in the gigahertz range are required for ultrafast quantum sensors, for high-speed continuous-variable (CV) one-sided device independent QKD and for CV optical quantum computers. Here we report on the detailed investigation of the current performance limits of the established method for the generation and direct measurement of squeezed light with GHz bandwidth. We present squeeze factors of diffraction limited laser beams from monolithic periodically poled KTP resonators measured with two laboratory-built balanced homodyne detectors (BHDs) with gigahertz bandwidth. We realize two complete systems without selection of optical or electronic hardware components to test the reproducibility without rejects. As expected, the systems show clear spectral differences. However, both achieve directly measured squeeze factors in the order of 3 dB over a GHz bandwidth, which is achieved here for the first time. Since the speed of CV quantum protocols scales proportionally to the bandwidth used, our layout for BHDs is suitable for increasing the speed of all these protocols.

Learning More with Less: How Improving Access to Electronics Hardware Could Transform Engineering Education in Africa

Conventional electronics is founded on a paradigm where shaping perfect electrical elements is done at the fabrication plant, so as to make devices and systems identical, “eternally immutable.” In nature, morphogenic evolutions are observed in most living organisms and exploit topological plasticity as a low-resource mechanism for in operando manufacturing and computation. Often fractal, the resulting topologies feature an inherent disorder: a property that is never exploited in conventional electronics manufacturing, while necessary for data generation and security in software. In this study, we present how such properties can be exploited to implement long-term and evolvable synaptic plasticity in an electronic hardware. The rich topology of conducting polymer dendrites (CPDs) is exploited to program the non-ideality of their electrochemical capacitances containing constant-phase-elements. Their evolution through structural changes alters the characteristic time constants for them to charge and discharge with the applied voltage stimuli. Under a train of voltage spikes, the evolvable current relaxation of the electrochemical systems promotes short-term plasticity, with timescales ranging from milliseconds to seconds. This large window depends not only on the temporality of the voltage pulses used for reading but also on the structure of a pair of CPDs on two electrodes, grown by voltage pulses. This study demonstrates how relevant physically transient and non-ideal electrochemical components can be exploited for unconventional electronics, with the aim to mimic a universal property of living organisms, which could barely be replicated in a silicon monocrystal.

Insufficient coverage of cervical cytology screening in resource-limited areas remains a major bottleneck for women's health, as traditional centralized methods require significant investment and many qualified pathologists. Using consumer-grade electronic hardware andaspherical lenses, we design an ultra-low-cost and compact microscope. Given the microscope's low resolution, which hinders accurate identification of lesion cells in cervical samples, we train a coarse instance classifier to screen and extract feature sequences of the top 200 instances containing potential lesions from a slide. We further develop Att-Transformer to focus onand integrate the sparse lesion information from these sequences, enabling slide grading. Our model is trained and validated using 3510 low-resolution slides from female patients at four hospitals, and subsequently evaluated on four independent datasets. The system achieves area under the receiver operating characteristic curve values of 0.87 and 0.89 for detecting squamous intraepithelial lesions on 364 slides from female patients at two external primary hospitals, 0.89 on 391 newly collected slides from female patients at the original four hospitals, and 0.85 on 570 human papillomavirus positive slides from female patients. These findings demonstrate the feasibility ofourAI-assisted approach for effective detection ofhigh-risk cervical precanceramong womenin resource-limited regions.

Since its publication in the 1960s, the Kalman Filter (KF) has been a powerful tool in optimal state estimation. However, the KF and most of its variants have mainly focused on the state estimation of smooth systems. In this work, we propose a new algorithm called the Discrete Unilateral Constrained Extended Kalman Filter (DUCEKF) that expands the capabilities of the Extended Kalman Filter (EKF) to a class of hybrid mechanical systems known as systems with unilateral constraints. Such systems are non-smooth in position and discontinuous in velocity. Lyapunov stability theory is invoked to establish sufficient conditions for the estimation error stability of the proposed algorithm. A comparison of the proposed algorithm with the EKF is conducted in simulation through a case study to demonstrate the superiority of the DUCEKF for the state estimation tasks in this class of systems. Simulations and an experiment were developed in this case study to validate the performance of the proposed algorithm. The experiment was conducted using electronic hardware that consists of an Embedded System (ES) called "Mikromedia for dsPIC33EP" and an external DAC-12 Click board, which includes a Digital-to-Analog Converter (DAC) from Texas Instruments.

Artificial neural networks (ANNs) have become ubiquitous in high-performance information processing. However, conventional electronic hardware, based on the sequential Von Neumann architecture, struggles to efficiently support ANN computations due to their inherently massive parallelism. Additionally, electrical parasitics further limit energy efficiency and processing speed, pushing traditional architectures toward their fundamental constraints. To overcome these limitations, researchers are exploring integrated photonics, leveraging the inherent parallelism of optical devices for more efficient computation. Despite these efforts, most existing optical computing schemes encounter scalability challenges, given that the number of optical elements typically grows quadratically with the computational matrix size. In this work, a compact programmable multimode interference (MMI) coupler on an indium phosphide membrane platform is proposed for realizing a photonic feedforward neural network. MMIs present a unique opportunity to accelerate matrix multiplication processes by exploiting the interference properties of light modes, promising advancements in both speed and energy efficiency. The programmable MMI coupler, comprising four input and three output (4 × 3 MMI) InP waveguides, makes use of hybrid integration of liquid crystals as cladding material, which offers reconfigurability to the MMI structure. Three electrically tunable sections are made to perform parallel multiplication operations. A novel modeling technique is introduced to facilitate effective training and inference operations. Finite-Difference Time-Domain (FDTD) simulations are employed for calculating the optical mode propagation process within the programmable MMI structure. Based on the FDTD results, a compact optical neural network is implemented and assessed on the Iris flower dataset, demonstrating a testing accuracy of 86.67%. This novel MMI device concept offers a promising pathway toward energy-efficient, scalable optical computing systems, contributing to the advancement of next-generation artificial intelligence hardware.

The rapid growth in computing demands, particularly driven by artificial intelligence applications, has begun to exceed the capabilities of traditional electronic hardware. Optical computing offers a promising alternative due to its parallelism, high computational speed, and low power consumption. However, existing photonic integrated circuits are constrained by large footprints, costly electro-optical interfaces, and complex control mechanisms, limiting the practical scalability of optical neural networks (ONNs). To address these limitations, we introduce a block-circulant photonic tensor core for a structure-compressed optical neural network (StrC-ONN) architecture. The structured compression technique substantially reduces both model complexity and hardware resources without sacrificing the versatility of neural networks, and achieves accuracy comparable to uncompressed models. Additionally, we propose a hardware-aware training framework to compensate for on-chip nonidealities to improve model robustness and accuracy. Experimental validation through image processing and classification tasks demonstrates that our StrC-ONN achieves a reduction in trainable parameters of up to 74.91%, while still maintaining competitive accuracy levels. Performance analyses further indicate that this hardware–software co-design approach is expected to yield a 3.56× improvement in power efficiency. By reducing both hardware requirements and control complexity across multiple dimensions, this work explores a pathway toward practical and scalable ONNs, highlighting a promising route to address future computational efficiency challenges.

Abstract Spiking neural networks (SNNs) are neuromorphic systems that emulate certain aspects of biological neural tissue, offering potential advantages in energy efficiency and speed by for example leveraging sparsity. While CMOS-based electronic SNN hardware has shown promise, scalability and parallelism challenges remain. Photonics provides a promising platform for SNNs due to the speed of excitable photonic devices standing in as neurons and the parallelism and low-latency of optical signal conduction. Here, we present a photonic SNN comprising 40 000 neurons using off-the-shelf components, including a spatial light modulator and a CMOS camera, enabling scalable and cost-effective implementations for photonic SNN proof of concept studies. The system is governed by a modified Ikeda map, where adding slow inhibitory feedback forcing introduces excitability akin to biological dynamics. Using latency encoding and sparsity, the network achieves 83.5% accuracy on MNIST handwritten digits using only 22% of neurons, and 77.5% with only 8.5% of neurons. Training is performed via liquid state machine concepts combined with the hardware-compatible simultaneous perturbation stochastic approximation algorithm, marking its first use in photonic neural networks. This demonstration integrates photonic nonlinearity, excitability, and sparse computation, paving the way for efficient large-scale photonic neuromorphic systems.

Real-time, physically realistic rendering is a significant challenge in spatial computing systems due to the excessive computational intensity of ray tracing and the performance limitations of current electronic platform. Here, we propose and demonstrate the first photonic counterpart for ray tracing acceleration, capable of performing ray-box intersection tests in the optical domain. Leveraging the high bandwidth, high linearity, and superior efficiency of thin-film lithium niobate (TFLN), our photonic ray tracing core (PRTC) achieves significantly more rapid and energy-efficient computation compared to traditional electronic hardware. Furthermore, by exploiting the binary nature of ray-box intersection tests, we reduce the analog-to-digital converter (ADC) bit-width requirement to a single bit, effectively overcoming the primary bottleneck in analog computing accelerators—the power consumption dominated by ADCs. As a result, our PRTC achieves an energy efficiency of 326 femtojoules per operation (fJ/OP) and demonstrates a modulator bandwidth exceeding 100 GHz. This advancement achieves significant improvements in both speed and energy efficiency by orders of magnitude. Our work demonstrates the feasibility of using photonic chips for ray tracing, effectively circumventing the ADC bottleneck of optical computing systems, and paves the way for future innovations in high-performance, low-power spatial computing applications.

Multi-beam laser Doppler vibrometers (MB-LDVs) are capable of measuring dynamic surface deformation and analyzing non-stationary and transient events by measuring vibration at multiple points simultaneously. However, the number of measurement channels in current MB-LDVs is limited due to the complexity of electronic hardware, which increases with the number of measurement points and includes pin photodiodes, multichannel amplifiers, A/D converters, and signal processors. We developed a full-field MB-LDV based on an array scan high-speed digital CMOS camera that simultaneously measures vibrations in a matrix array of 17×17 points. The MB-LDV provides a measurement of vibration in the frequency range from 0 to 25kHz with velocity noise in the range from 2 to 8nm/s. Simultaneous measurements over the whole area allow for shorter measurement time in comparison to scanning single-beam LDV and linear array MB-LDV and obtaining an instantaneous velocity image of the measured area at any moment in time due to saving the phase information between the measurement points. Using an array scan high-speed digital camera allows for a large number of measurement points and a compact design of the MB-LDV, since the complexity of the hardware does not depend on the number of beams, which is limited by the camera's number of pixels. The experimental setup and performance of the developed full-field MB-LDV are discussed in this paper.