Single Event Transient Effects Research Articles

Improvement of Single Event Transient Effects for a Novel AlGaN/GaN High Electron-Mobility Transistor with a P-GaN Buried Layer and a Locally Doped Barrier Layer.

In this paper, a novel AlGaN/GaN HEMT structure with a P-GaN buried layer in the buffer layer and a locally doped barrier layer under the gate (PN-HEMT) is proposed to enhance its resistance to single event transient (SET) effects while also overcoming the degradation of other characteristics. The device operation mechanism and characteristics are investigated by TCAD simulation. The results show that the peak electric field and impact ionization at the gate edges are reduced in the PN-HEMT due to the introduced P-GaN buried layer in the buffer layer. This leads to a decrease in the peak drain current (Ipeak) induced by the SET effect and an improvement in the breakdown voltage (BV). Additionally, the locally doped barrier layer provides extra electrons to the channel, resulting in higher saturated drain current (ID,sat) and maximum transconductance (gmax). The Ipeak of the PN-HEMT (1.37 A/mm) is 71.8% lower than that of the conventional AlGaN/GaN HEMT (C-HEMT) (4.85 A/mm) at 0.6 pC/µm. Simultaneously, ID,sat and BV are increased by 21.2% and 63.9%, respectively. Therefore, the PN-HEMT enhances the hardened SET effect of the device without sacrificing other key characteristics of the AlGaN/GaN HEMT.

Simulation and analysis of the single event transient characteristics of SiGe HBT at low-temperature environment

This study investigates the temperature dependence of single event transient (SET) effects in silicon germanium heterojunction bipolar transistors (SiGe HBTs). Using Silvaco TCAD simulations, we analyze the influence of linear energy transfer (LET), emitter bias voltage, and striking angle across a temperature range from 100 K to 300 K. The results reveal that temperature significantly affects emitter pulse current and charge collection induced by heavy ions. Higher temperatures increase charge collection, while lower temperatures correspond to higher emitter current and shorter pulse width. The study also observes an increase in bandgap energy (from 1.12 eV to 1.16 eV) and electrostatic potential (from 1.19 V to 1.25 V) with decreasing temperature. The study highlights the crucial role of temperature in SiGe HBT performance under radiation threats and emphasizes drift and diffusion mechanisms as dominant for charge collection.

Efficient Modeling of Single Event Transient Effect with Limited Peak Current: Implications for Logic Circuits.

The problem that the conventional double-exponential transient current model (DE model) can overdrive the circuit, which leads to the overestimation of the soft error rate of the logic cell, is solved. Our work uses a new and accurate model for predicting the soft error rate that brings the soft error rate closer to the actual. The piecewise double-exponential transient current model (PDE model) is chosen, and the accuracy of the model is reflected using the Layout Awareness Single Event Multi Transients Soft Error Rate Calculation tool (LA-SEMT-SER tool). The model can characterize transient current pulses piecewise and limit the peak current magnitude to not exceed the conduction current. TCAD models are constructed from 28 nm process library and cell layouts. The transfer characteristic curves of devices are calibrated, and functional timing verification is performed to ensure the accuracy of the TCAD model. The experimental results show that the PDE model is not only more consistent with TCAD simulation than the DE model in modeling the single event transient currents of the device, but also that the SER calculated by the LA-SEMT-SER tool based on the PDE model has a smaller error than the SER calculated by the LA-SEMT-SER tool based on the DE model.

SET-detection low complexity burst error correction codes for SRAM protection

As the feature size of transistors decreases, multiple bit upsets and single event transient effects become severe in circuits working in radiation environment. In static random-access memories (SRAM), both single event upsets and single event transients need caring about. Fault-tolerant ECCs are optional for SRAM protection, which own the ability to deal with SEU and SET at the same time. We designed a series of low complexity burst error correcting codes with fault detection feature. This can deal with burst errors in memories and transient errors in the decoder. Low complexity ECC simplifies the decoding circuits and reduces hardware overhead. Compared with schemes to deal with SET in decoders, the proposed scheme has obvious advantage on area’s overhead and can be an effective choice for SRAM protection in radiation environment.

Examining the role of tap cell in suppressing single event transient effect in 28-nm CMOS technology

The Single Event Transient (SET) phenomenon, which occurs in combinational circuits, has emerged as the primary source of soft errors in Integrated Circuits (IC) in advanced deep-submicron technologies. Therefore, it is imperative to investigate the underlying mechanisms of SET effects in order to gain valuable insights for mitigating SET in combinational circuits. In advanced technologies, specifically those at the 28-nm and below, tap cells are commonly utilized as the well and substrate contact to achieve higher device density. This article presents a comprehensive study on the impact of tap cells on SET sensitivity for the first time. Furthermore, a comparison is made between the SET sensitivity of conventional and tap cell-based well and substrate contact.

Characterization and modeling of Single Event Transient propagation through standard combinational cells

Analysis of Single Event Transient (SET) effects is an important step in the design of radiation-hardened integrated circuits for space missions. Because the simulation of SET effects in a complex design would be very time-consuming, appropriate SET models are required to simplify and speed up the SET analysis. In this paper, we demonstrate an approach for deriving an analytical SET propagation model from the simulation-based characterization of standard cells. We have performed detailed characterization of standard combinational cells designed in IHP's 130 nm CMOS technology, using Cadence Spectre simulations. The simulation results have shown that significant SET broadening may occur across short combinational paths composed of up to ten logic gates, and supply voltage and temperature variations may enhance the SET broadening. By fitting the simulation results, an analytical model for estimating the SET pulse broadening and shrinking caused by individual logic gates has been derived. The proposed model expresses the propagated SET pulse width in terms of gate's size factor, load capacitance, supply voltage and temperature. Using the proposed model allows for estimating the SET pulse width across any combinational path composed of characterized standard cells. The model was verified on selected combinational paths, and the average relative error with respect to simulations was 6.4 %.

A comprehensive study of InGaAs based linearly graded channel DL-TFET and its single event transient effect

In this paper, the DC, RF and single-event transient effect studies are carried out for investigating the performance and reliability of hetero-junction InGaAs DL-TFET having linearly graded channel region. The mole-fraction of source side In1−xGaxAs is varied for obtaining the higher ION i.e. obtained at x = 0.40; this also impact the RF simulation studies by increasing the gain-bandwidth product range to 52.4 GHz. To reduce Iambipolar, a step junction is introduced for first time in the channel region at channel-drain interface which reduces the Iambipolar by 93.27% to the magnitude of 0.867 μA μm−1. Further reduction in ambipolarity is achieved at TG = 3.9 eV to the level of 0.269 fA μm−1, ION increases to 0.558 mA μm−1, sub-threshold swing is 23.8 mV/decade and shows highest cut-off frequency upto 155 GHz. Hence, the optimized device structure is investigated under the influence of single-event transient; therefore, the effect of heavy ion is investigated on optimized linearly graded structure for different LETs’ (Linear energy transfer). It shows increase in the drain current and charge collected with increase in LET. The maximum IDS is 0.618 mA μm−1 in OFF state, and IDS of 0.819 mA μm−1 in ON state at VDS = 1.0 V, which is higher than its ION at 10 MeV.cm2/mg (i.e. 0.11 pC μm−1). By simulating heavy ion single event effect on different positions, it is found that channel-drain interface is more sensitive to irradiation. This gives an insight for radiation hardened applications in space for TFET based circuit designs.

On the double channel engineering of dual gate AlGaN/GaN HEMTs for heavy ion sensing applications

This work investigates the influence of Single Event Transient (SET) effect on Double Channel Dual Gate (DC-DG) AlGaN/GaN HEMT using TCAD simulations. Both Single Channel (SC) and Double Channel HEMT have been calibrated with reported experimental results and further extended by introducing a second gate in the structures to analyze its sensitivity towards heavy ion strike. The effective gate length has been optimized in such a way that the saturation currents and threshold voltage of dual gate devices is similar to that of the single gate devices. The DC-DG HEMT improves the heavy ion sensitivity, thus making it a more viable device for sensing application (mainly radiation). Different biases and gate materials have been used to observe the influence of SET on the DC-DG AlGaN/GaN HEMT. Further, the impact of the graded AlGaN barrier on the device current as well as on the sensitivity of the DC-DG HEMT towards SET is studied. To ascertain the performance of DC-DG HEMT for dosimeter applications, its sensitivity toward heavy ion impact in switched mode is monitored. Investigation reveals that the device current returns to its original order of magnitude after every ion impact, and therefore can be effectively used as a dosimeter.

Sentaurus TCAD simulation of SET and Radiation-Hardened technology for FDSOI TFET devices

This paper mainly carries out research on TFET device based on FDSOI. The simulations were performed at the single event transient effect (SET), The effects of The high-energy particles from different positions, different incident depths and different incident angles, and the mechanism of charge collection in the sensitive position are analyzed, the effects of different bias voltages on SET is discussed. Finally, a device-level Radiation-Hardened technique for SET of the device is proposed.

Analysis of Single Event Transient Effects in Standard Delay Cells Based on Decoupling Capacitors

Single Event Transients (SETs), i.e., voltage glitches induced in combinational logic as a result of the passage of energetic particles, represent an increasingly critical reliability threat for modern complementary metal oxide semiconductor (CMOS) integrated circuits (ICs) employed in space missions. In rad-hard ICs implemented with standard digital cells, special design techniques should be applied to reduce the Soft Error Rate (SER) due to SETs. To this end, it is essential to consider the SET robustness of individual standard cells. Among the wide range of logic cells available in standard cell libraries, the standard delay cells (SDCs) implemented with the skew-sized inverters are exceptionally vulnerable to SETs. Namely, the SET pulses induced in these cells may be hundreds of picoseconds longer than those in other standard cells. In this work, an alternative design of a SDC based on two inverters and two decoupling capacitors is introduced. Electrical simulations have shown that the propagation delay and SET robustness of the proposed delay cell are strongly influenced by the transistor sizes and supply voltage, while the impact of temperature is moderate. The proposed design is more tolerant to SETs than the SDCs with skew-sized inverters, and occupies less area compared to the hardening configurations based on partial and complete duplication. Due to the low transistor count (only six transistors), the proposed delay cell could also be used as a SET filter.

Single-event-transient effect in nanotube tunnel field-effect transistor with bias-induced electron–hole bilayer

The single event transient (SET) effect in nanotube tunneling field-effect transistor with bias-induced electron–hole bilayer (EHBNT-TFET) is investigated by 3-D TCAD simulation for the first time. The effects of linear energy transfer (LET), characteristic radius, strike angle, electrode bias and hit location on SET response are evaluated in detail. The simulation results show that the peak value of transient drain current is up to 0.08 mA for heavy ion irradiation with characteristic radius of 50 nm and LET of 10 MeV⋅cm2/mg, which is much higher than the on-state current of EHBNT-TFET. The SET response of EHBNT-TFET presents an obvious dependence on LET, strike angle, drain bias and hit location. As LET increases from 2 MeV⋅cm2/mg to 10 MeV⋅cm2/mg, the peak drain current increases monotonically from 0.015 mA to 0.08 mA. The strike angle has an greater impact on peak drain current especially for the smaller characteristic radius. The peak drain current and collected charge increase by 0.014 mA and 0.06 fC, respectively, as the drain bias increases from 0.1 V to 0.9 V. Whether from the horizontal or the vertical direction, the most sensitive hit location is related to w t. The underlying physical mechanism is explored and discussed.

Numerical simulation of single-event effects in fully-depleted silicon-on-insulator HfO<sub>2</sub>-based ferroelectric field-effect transistor memory cell

Ferroelectric field-effect transistor (FeFET) memory is currently a popular non-volatile memory. It has many advantages such as nonvolatility, better scalability, energy-efficient switching with non-destructive read-out and anti-radiation. To promote the application of FeFET in radiation environments, the single-event transient effect in HfO<sub>2</sub>-based fully-depleted silicon-on-insulator (FDSOI) FeFET memory cell is studied by technology computer aided design (TCAD) numerical simulation. The effects of different incident positions and angles of heavy ions and the drain bias voltage on the characteristics of the memory cell are analyzed. The results show that the corresponding polarization state in the HfO<sub>2</sub> ferroelectric layer will not reverse regardless of the change for the incident position of heavy ions, but the transient change of the output voltage for the memory cell will be affected. The most sensitive area is close to the drain-body junction area. Moreover, with the decrease of the ion incidence angle, the peak of output voltage for the memory cell increases. And the effect of the incident angle change is more obvious when reading data is “0” rather than “1”. The peak of output voltage for the memory cell is modulated by the drain bias voltage, and the modulation effect is more obvious when reading data is “1” rather than “0”. The above findings provide theoretical basis and guidance for the anti-single event design of the FDSOI FeFET memory cell.

Single event transient effect of frontside and backside illumination image sensors under proton irradiation

Complementary metal oxide semiconductor (CMOS) image sensor is susceptible to proton single event effect when being applied to space environment. Proton irradiation experiments with different energy values are carried out on a commercial FSI and BSI CMOS image sensors. The proton single event effect is analyzed by on-line testing, the maximum proton energy is 200 MeV, and the total fluence is 10<sup>10 </sup>particle/cm<sup>2</sup>. The single-event transient bright spots of different shapes are observed in the pixel array. By extracting the deposition energy and size, the effects of different energy protons on transient bright spot characteristics are compared, and the transient bright spot characteristics between FSI and BSI are also compared. Finally, the energy deposition distribution of the transient bright spot generated by proton in CMOS image sensor pixel unit is predicted by comparing the simulation method with the experimental results. The simulation results verify that the decrease of PPD depletion region thickness and the thinning of epitaxial layer are the main factors leading the proton energy deposition distribution to shift leftward in BSI image sensor.

Impact of single event transient effect on adiabatic logic circuits

The evolution of the modern Complementary Metal Oxide Semiconductor technology has led to the scaling of the transistor size to nanometers. This has resulted in significant benefits to integrated circuits, such as higher speed, smaller circuit size and lower operating voltage. However, this smaller size and lower operating voltage have become highly susceptible to operational disturbances such as signal coupling, substrate noise, and single event effects caused by ionizing particles. Single Event Transient occurs when a high-energy particle strikes a combinational logic circuit. The charge deposited by the particle causes a transient voltage disturbance to load incorrect data. In this work, the impact of Single Event Transient on total power dissipation and the delay of static complementary logic is analyzed. Different circuits like basic inverter, adiabatic inverter, chain of inverters of complementary and adiabatic logic have been selected for the analysis. The technology node used for this analysis is 180 nm and 90 nm using Cadence Virtuoso. The result shows that on scaling, the effect of Single Event Transient is increased, and the use of an adiabatic logic reduces the power by 15% compared to conventional static logic circuits.

TCAD Based Investigation of Single Event Transient Effect in Double Channel AlGaN/GaN HEMT

In this paper, investigation of Double Channel (DC) AlGaN/GaN HEMT has been presented using extensive TCAD simulation under the influence of Single Event Transient (SET) effect. Various models used to emulate Single Channel (SC) and DC HEMT in the TCAD are calibrated with the help of previously reported work. In order to present clear insight into the device behaviour, thermal model has also been included during device simulation. Presented results show that the generation of electron-hole pair due to heavy ion beam is significantly higher in DC HEMT during both OFF and ON state conditions. Ion beam having different Linear Energy Transfer (LET) and different position of Ion strike along with penetration depth has been used for investigating the SET effect on DC and SC AlGaN/GaN HEMT. The suitability of different metal gate work-function for heavy Ion detection has also been performed using both devices and DC HEMT (0.115 A/mm) demonstrated superior \bigtriangleup I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> DMAX</sub> as compared to SC HEMT (0.049 A/mm). The presence of a second channel in Double Channel (DC) HEMT leads to a device more sensitive towards the Single Event Transients (SET) Effect, thus, a more suitable candidate for radiation dosimeter as compared to Single Channel (SC) HEMT.

Integrated Silicon Photonics for Enabling Next-Generation Space Systems

A review of silicon photonics for space applications is presented. The benefits and advantages of size, weight, power, and cost (SWaP-C) metrics inherent to silicon photonics are summarized. Motivation for their use in optical communications systems and microwave photonics is addressed. The current state of our understanding of radiation effects in silicon photonics is included in this discussion. Total-ionizing dose, displacement damage, and single-event transient effects are discussed in detail for germanium-integrated photodiodes, silicon waveguides, and Mach-Zehnder modulators. Areas needing further study are suggested.

Investigation of Single Event Transient Effects in Junctionless Accumulation Mode MOSFET

The Junctionless Accumulation Mode Double Gate MOSFET (JAM DG MOSFET) is a promising novel architecture for future nano-scaled devices because of its outstanding electrical characteristics, e.g., lower subthreshold swing, lower drain induced barrier lowering, i.e., lower short channel effects and higher I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> /I <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</sub> ratio. In this paper, a comprehensive analysis of the effects of single-event transient on JAM DG MOSFET has been performed using the sentaurus TCAD simulator. The result shows that the transient drain current peak obtained after the heavy-ion strike for JAM DG MOSFET is small at lower value linear energy transfer (LET) and high for the larger value of LET. Collected charge at different LET values has also been investigated. Moreover, the sensitive region of the device, e.g., source to channel junction, channel, and channel to drain junction has been studied. It has been found that the drain to channel junction is more sensitive to the linear energy than the channel and source to channel junction. The electrical characteristics have also been compared with JL DG MOSFET.

Electrical characteristics analysis of a 314 mm2 double-sided spiral SDD for x-ray pulsar navigation

Pulsar navigation, to meet the physical needs of detecting pulsed x-ray contour, requires a large-area and high-energy resolution silicon drift detector (SDD). Until recently when we designed and fabricated a 314 mm2 double-sided spiral SDD, SDDs developed worldwide have been relatively small in size with a typical diameter less than 10 mm. The details of the design of our 314 mm2 double-sided spiral SDD had been reported in the literature (Li (2013) Nuclear Instruments and Methods in Physics Research A 730 73–78). Present work involves the analysis of electrical characteristics simulations of a 314 mm2 double-sided spiral SDD. It is essential to study the carriers drift behavior of a 314 mm2 double-sided spiral SDD for the structural design optimization of the detector. Therefore, this paper analyzes the relevant electrical characteristics that can characterize the carriers drift behavior. Firstly, this paper illustrates the electric potential, electric field, and electron concentration of the detector. Then, it also provides an analysis of the transient current by simulated the single event transient (SET) effect. The SILVACO TCAD simulator was used to simulate these electrical characteristics. Based on TCAD simulation, the best drift electric field and optimal electron drift channel in a 314 mm2 double-sided spiral SDD are demonstrated. Moreover, the transient current and charge collection mechanism of the detector is also analyzed. Finally, we also tested the leakage current and capacitance of the detector at room temperature.

Investigation of Radiation Effects on FD-SOI Hall Sensors by TCAD Simulations.

This work investigates the responses of the fully-depleted silicon-on-insulator (FD-SOI) Hall sensors to the three main types of irradiation ionization effects, including the total ionizing dose (TID), transient dose rate (TDR), and single event transient (SET) effects. Via 3D technology computer aided design (TCAD) simulations with insulator fixed charge, radiation, heavy ion, and galvanomagnetic transport models, the performances of the transient current, Hall voltage, sensitivity, efficiency, and offset voltage have been evaluated. For the TID effect, the Hall voltage and sensitivity of the sensor increase after irradiation, while the efficiency and offset voltage decrease. As for TDR and SET effects, when the energy deposited on the sensor during a nuclear explosion or heavy ion injection is small, the transient Hall voltage of the off-state sensor first decreases and then returns to the initial value. However, if the energy deposition is large, the transient Hall voltage first decreases, then increases to a peak value and decreases to a fixed value. The physical mechanisms that produce different trends in the transient Hall voltage have been analyzed in detail.

Measurements of Single Event Upset in ATLAS IBL

Effects of Single Event Upsets (SEU) and Single Event Transients (SET) are studied in the FE-I4B chip of the innermost layer of the ATLAS pixel system. SEU/SET affect the FE-I4B Global Registers as well as the settings for the individual pixels, causing, among other things, occupancy losses, drops in the low voltage currents, noisy pixels, and silent pixels. Quantitative data analysis and simulations indicate that SET dominate over SEU on the load line of the memory. Operational issues and mitigation techniques are presented.