Effect Of Series Resistance Research Articles

Investigation of thin-film p-BaSi2/n-CdS heterostructure towards semiconducting silicide based high efficiency solar cell

In this article, semiconducting Barium Silicide (BaSi2) absorber based novel heterostructure thin-film solar cell (TFSC) has been studied in details. The solar cell has been numerically simulated and intensely analyzed by Solar cell Capacitance Simulator (SCAPS). Layer thickness was varied from 100 to 3000 nm for p+-BaSi2 absorber, 20 to 200 nm for both n-CdS buffer, and n+-SnO2:F window layers to optimize the device. Hitherwards, the impurities concentration for acceptor (NA) and donor (ND) ions was optimized for each layer through ample variation. The influence of single-donor and acceptor type bulk defect densities has been investigated thoroughly in p+-BaSi2 and n-CdS materials, respectively. An efficiency >30% is achievable ideally with a 2 μm thick BaSi2 absorber without incorporating defects whereas it reduces to 26.32% with only 1.2 μm thick absorber including certain amount of defects. Cell thermal stability and alteration of cell parameters were studied under cell operating temperature from to Finally, the effect of series (Rs) and shunt (Rsh) resistances on proposed cell has been investigated meticulously. This newly designed solar cell structure proclaims the chance of fabricating a resourceful, low cost, and highly efficient TFSC near future.

The rate of Cu doped TiO2 interlayer effects on the electrical characteristics of Al/Cu:TiO2/n-Si (MOS) capacitors depend on frequency and voltage

In order to determine the surface states (Nss), series resistance (Rs), and (Cu:TiO2) interlayer effects on the electrical characteristics of the Al/Cu:TiO2/n-Si metal oxide semiconductor (MOS) capacitors, both capacitance (C) and conductance (G) values were measured for frequency ranges of 10 kHz–1 MHz and ±5 V voltage ranges. In addition, to know Cu doping concentration effect on the MOS capacitor, the Al/Cu:TiO2/n-Si was fabricated with various rates Cu:TiO2 interlayer (5, 10, 15%) grown on n-Si susbtrate by spin-coating. The increase in capacitance via decreasing frequencies was attributed to the existence of Nss and their relaxation time. The frequency dependent diffusion potential (Vd), doping of donor atoms (Nd), Fermi energy (EF), barrier height (Фb) and depletion layer width (Wd) values were extracted from the linear part of reverse bias C−2-V curves. While the value the Rs decreased with increasing frequency, the Nss values increased for the three MOS capacitors. The profiles of Nss and Rs depending on voltage were also plotted by Nicollian-Brews methods and using high-low frequency (CHF-CLF) capacitance, respectively. The mean values of Nss for three capacitors were found at about 1012 eV−1cm−2 as suitable electronic devices. The lower values of the Nss can be attributed to passivation effect of Cu:TiO2 interlayer.

An integration of the review of electrode’s materials and a new gamma function-based charging methodology of supercapacitor for high current applications

Electric double-layer capacitors (EDLC) or supercapacitors are facilitated by the high specific power, fast charging, discharging, and low ESR (effective series resistance), which more efficiently integrated with battery technology to employed in electric vehicles and other electronic gadgets. To enhance the supercapacitor applications and to develop a more capable energy storage device/technology, it has to need the accurate and exact characterization of the supercapacitor. In this paper, we review the electrode’s material of supercapacitor. And some newly developed (hybrid) material that upgrades the behavior and performance of supercapacitors. Also, we bring together recent findings from a series of experiments and computational (simulation) studies to gives a new and smart charging method of the supercapacitor. We have found one cannot pump an infinite amount of current to charge (fast charging) a supercapacitor because the leakage-parallel resistant reduces with one supposed to pump a large amount of current. So, it is not possible to charge a supercapacitor up to a given certain voltage. Therefore, to efficiently charging a supercapacitor up to a specific voltage and to reduce the charging time, we also have proposed and developed a gamma function-based charging methodology.

Evaluation of solar module equivalent models under real operating conditions—A review

A number of mathematical models are available to model the performance of solar modules under varying operating conditions. Most commonly recognized and used models include (a) the basic three-parameter model, (b) the five-parameter model, and (c) the seven-parameter model. The basic three-parameter model does not incorporate series and shunt resistance for IV curves. The five-parameter model incorporates the effect of series and shunt resistance, and the seven-parameter model further includes the additional effect of temperature and irradiance variation on solar cell parameters. While all these models reasonably predict IV profiles of solar modules at small variations from standard testing conditions (STCs), their performance in modeling the module performance at low irradiances and high temperatures is far from ideal. This work primarily reviews the accuracy of available models for various module technologies not only under STC conditions but also over a wide range of operating conditions. The accuracy of modeled results is quantified (with datasheet results) for 10 crystalline silicon (c-Si) based modules as well as 9 thin film module (TF) samples (commercial modules) at multiple irradiance conditions. The results show that the three-parameter model generally overestimates the power output both for c-Si and TF modules. The five-parameter model predicts TF technology more accurately compared to the other two available models, whereas the seven-parameter model is most accurate for c-Si module modeling under varying operations.

Compact Modeling of the I-V Characteristics of ZnO Nanowires Including Nonlinear Series Resistance Effects

This letter deals with the compact modeling of the I-V characteristics of single crystalline ZnO nanowires (NW) attached to two metal electrodes (Pt and Ag). Starting from the standard model of electron transport in these structures based on the series combination of two back-to-back Schottky diodes, three different approaches which account for the role played by the NW series resistance are presented. The first approach considers a fixed potential drop across the NW, the second one involves the solution to the problem of a diode with linear and nonlinear series resistances using the Lambert W function, and the third one consists in a behavioral model with continuous first derivative suitable for circuit simulation environments. In the three cases, the proposed solutions are consistent with the observed electrical constraints both at low (linear I-V relationship) and high (current saturation) voltages.

Effect of measurement frequency on admittance characteristics in Al/p-Si structures with interfacial native oxide layer

Al/p-Si/Al diodes with interfacial native oxide layer were formed. Their frequency induced admittance-voltage measurements were made. The frequency-dependent density distribution of interface states has been determined from the corrected characteristics by considering the series resistance effect which masks the interface trap loss. The majority carrier density corresponding to the depletion and inversion parts of the C-2-V curve, was determined 1.82 x 1014 and 4.48 x 1014 cm-3 at 1000 kHz, respectively. The fact that the carrier density obtained from the inversion part of the plot is higher than that obtained from the depletion part can be related to the increase in the density of negative space charge in the depletion region.The value of was determined as 0.95 eV from the same plot. Interface state density decreased from 4.31 x 1012 eV-1cm-2 at 100 kHz to 7.30 x 1011 eV-1 cm-2 at 1000 kHz, because the interface charges do not follow the ac signal and do not contribute to capacitance values in high frequencies.

Effects of ultraviolet illumination on 4H-SiC Schottky barrier diodes irradiated by swift heavy ions

In this study, the capacitance-voltage (C-V) and current-voltage (I-V) characteristics of 4H-SiC Schottky barrier diode (SBD) irradiated by swift heavy ions (SHI) are studied under different ultraviolet (UV) conditions. The effective carrier concentration (ND), reverse current (IR), series resistance (RS), ideal factor (n) and Schottky barrier height (SBH) are calculated and analyzed. Furthermore, by analyzing the parameters, especially, ND, IR and n, a physical model is built. The UV illumination dependence of the recombination center states for defects or defect-states is presented.

Closed Loop Control of Multilevel Dc-Dc Boost Converter

This paper presents a multilevel DC-DC boost converter (MBC). It is derived from a conventional boost converter just by adding (2N-1) number of capacitors and same number of diodes in order to obtain N levels of output voltage. Its key feature is to convert low input DC to a high output DC at various levels. This feature makes it a suitable candidate for renewable applications like photovoltaic (PV) system, fuel cell system etc. This paper presents a mathematical model of a N level boost converter. Effect of series resistance (ESR) in inductor is analyzed. A closed loop system for a three level MBC is developed and corresponding simulation results are presented.

Frequency and voltage dependent electrical properties of YMn0.90Os0.10O3 thin film on the SiO2/p-Si substrate

The YMn0.90Os0.10O3 (YMOO) thin film was deposited on the SiO2/p-Si substrate via using radio frequency (rf) magnetron sputter method. Voltage dependent electrical properties of the Al/YMOO/SiO2/p-Si/Al structure were investigated at various frequency and ambient condition. Capacitance-voltage (C-V) measurements showed that the capacitance has an accumulation region at positive or forward bias region. Conductance-voltage (G-V) characteristics of the device displayed that the G increases with increasing frequency. Series resistance, Rs, of the device was derived from C-V and G-V measurements and the Rs-V characteristic exhibited strongly frequency dependency. Frequency dependent interface state density, Nss, was calculated according to the Hill-Coleman relation, which decreases as frequency increases. The corrected capacitance (Cc) and conductance (Gc) results revealed that the effect of series resistance on the electrical properties cannot be ignored.

Optimal design of the compensation networks of an inductive wireless power transfer system

Purpose This paper aims to present an approach to the design of the compensation networks (CNs) based on a genetic optimization algorithm. The algorithm is applied to CNs with T-topology and considers the effects of the parasitic series resistances of their inductive components. The effectiveness of the algorithm is verified using Bode diagrams and simulation results. Design/methodology/approach The paper at first describes the problem and the approach followed to reach a set of optimal solutions, then explains the optimization algorithm, reports the obtained solutions and selects the optimal CNs. Finally, the actual performance of the wireless power transfer system (WPTS) when the selected CNs are used are checked. Findings This approach gave interesting results and made available a number of different sizing solutions of complex networks in a very short time. Most of the obtained solutions outperform the widely used series-series compensation. An accurate post processing of the obtained result is mandatory to discriminate the solutions that could be implemented from those that in a real system would originate uncontrolled high frequency current oscillation. Originality/value This paper offers a rather new approach to solve the problem of sizing the CNs of a dynamic WPTS. This approach makes available a large number of optimal solutions to the problem in a short time, without solving complex system of equations.

An External Capacitor-Less Low-Dropout Voltage Regulator Using a Transconductance Amplifier

This brief presents an external capacitor-less nMOS low-dropout (LDO) voltage regulator integrated with a standard CSMC 0.6- ${\mu }\text{m}$ BiCMOS technology. Over a −55 °C to +125 °C temperature range, the fabricated LDO provides a stable and considerable amount of 3 A output current over wide ranges of output capacitance $C_{\mathrm {OUT}}$ (from zero to hundreds of ${\mu }\text{F}$ ) and effective-series-resistance (ESR) (from tens of milliohms to several ohms). A LDO voltage of 200 mV has been realized by accurate modeling. Operating with an input voltage ranging from 2.2 to 5.5 V provides a scalable output voltage from 0.8 to 3.6 V. When the load current jumps from 100 mA to 3 A within 3 ${\mu }\text{s}$ , the output voltage overshoot remains as low as 50 mV without output capacitance, $C_{\mathrm {OUT}}$ . The system bandwidth is about 2 MHz, and hardly changes with load altering to ensure system stability. To improve the load transient response and driving capacity of the nMOS power transistor, a buffer with high input impedance and low output impedance is applied between the transconductance amplifier and the nMOS power transistor. The total area of fabricated LDO voltage regulator chip including pads is 2.1 mm $\times $ 2.2 mm.

Constant off-Time Digital Current-Mode Controlled Boost Converters With Enhanced Stability Boundary

The right-half-plane (RHP) zero in a continuous conduction mode boost converter results in a significantly restricted closed-loop bandwidth (BW) for higher voltage gain and/or load current conditions. A compensating ramp is used for current-mode control (CMC), and a higher ramp slope degrades the BW. Variable-frequency digital CMC offers inherent current-loop stability and real-time tuning scope for higher closed-loop BW. However, the challenges are to select the sampling frequency and sampling instant of the output voltage with discontinuous ripple due to the effective series resistance of the output capacitor, and its impact on stability. This paper shows that an event-based current-mode constant off -time digital modulator achieves superior stability and performance in a boost converter along with the reduced RHP zero effect over other digital CMC techniques. Using a discrete-time framework, the fast-scale stability conditions and small-signal models are analytically derived for various digital CMC techniques, which are validated using SIMPLIS simulation. A boost converter prototype is tested, and the analytical predictions are verified experimentally. Further, the analysis is extended to a non-inverting buck–boost converter.

The investigation of effects of (Fe2O4-PVP) organic-layer, surface states, and series resistance on the electrical characteristics and the sources of them

In this work, Au/n-Si (MS) structures with and without (Fe2O4-doped PVP) interlayer were prepared with the same conditions to see effects of organic layer on the electrical characteristics and conduction mechanisms. For this aim, I–V and Z–V measurements of them were carried out at room temperature. The saturation current (Is), ideality factor (n), barrier height (ΦB(I–V)), series (Rs) and shunt (Rsh) resistances, and rectifying rate (RR = IF/IR) of them were extracted from the I–V data as 2.90 × 10−8 A, 1.699, 0.741 eV, 1.58 kΩ, 25.7 MΩ, 1.45 × 104 for MS and 2.30 × 10−9 A, 1.634, 0.806 eV, 1.17 kΩ, 103 MΩ, 9.01 × 104 for MPS, respectively. The values of interface states (Nss) were also extracted from the I–V data at forward bias by considering voltage dependent BH and n, and it is found that they increase from the mid-gap of semiconductor towards the conductance band. The values of doping atoms (ND), Fermi-energy (EF), and (ΦB(C–V)) were also acquired from the C−2–V plots at reverse bias as 9.08 × 1014 cm−3, 0.258 eV, 0.914 eV for MS and 7.650 × 1014 cm−3, 0.263 eV, 0.981 eV, for MPS structure, respectively. It is clear that the (Fe2O4-PVP) interlayer leads to decreases in Rs, Nss, leakage current and increase in rectifying rate (RR), Rsh and BH, so that it can used in place of the conventional oxide or insulator layer.

A theoretical study on Sb2S3 solar cells: The path to overcome the efficiency barrier of 8%

Sb2S3 semiconductor is among the absorber materials that have currently received an increased attention from scientific community since it presents adequate physical properties for solar cell fabrication. In addition, it is also based on abundant and relatively low-toxic elements. Nevertheless, so far, Sb2S3 solar cells in planar configuration are limited to efficiency values lower than 8%, being mechanisms behind such low performances still unknown. In this work we perform theoretical calculations to study the impact of recombination mechanisms at both Sb2S3 bulk material and Sb2S3/CdS interface on solar cells, in order to explain low efficiencies reported for this technology, for the first time. The comparison of model outcomes to the experimental data reported in the literature demonstrates good correspondence. It is found that current Sb2S3 solar cells are dominated by a combination of factors such as non-ideal series and shunt resistances, Sb2S3 non-radiative recombination and Sb2S3/CdS interface recombination. By improving Sb2S3/CdS interface and Sb2S3 bulk material quality, a solar cell efficiency of 11.8% could be achieved, which is limited by the effect of series and shunt resistances. Therefore, the same attention should be paid to both defects and resistances to promote device efficiency over 12%, achieving a new record value of 18.4%. Conditions under which each loss mechanism is dominant are presented and discussed. Finally, it is demonstrated that under optimized conditions and with the use of an antireflection coating layer, an efficiency about 20% is expected.

A Study on Modeling of Effective Series Resistance for Lithium-ion Batteries under Life Cycle Consideration

This paper presents a modeling of effective series resistance for Lithium-ion batteries, which is focusing on the effect of life cycles in aging cells during operations. A computer-based sequential control system is developed to prepare aging cells and automatically characterize the information of testing batteries. Several aspects of testing parameters during the charge and discharge, such as characteristics of the effective series resistance, amplitudes of the pulse current, changes of the increasing resistance, state of charge, capacity and operating cycles, are considered and analyzed to implement in the effective series resistance model. A methodology based on the experiment of pulse tests is applied as sequential steps for modeling the effective series resistance with life cycle consideration. Comparison results between the proposed model and measured values over the life cycle of the battery show the satisfactory verification with the maximum error lower than 4%.

Strain-Engineered Asymmetrical Superlattice Si/Si1–x Ge x Nano-ATT $\langle$ p++-n-n−-n++$\rangle$ Oscillator: Enhanced Photo-Sensitivity in Terahertz Domain

This paper proposes a strained Si-based single drift nano-mixed tunnel avalanche transit time (MITATT) oscillator capable of generating high RF power in the terahertz regime, inaccessible by conventional Si devices. The authors have developed a quantum modified classical drift-diffusion model to study the nanoscale properties of strained Si oscillator. The study reveals that 14.72-GW/m2 RF power could be generated from 0.715-THz strain-engineered Si oscillator. Such performance enhancement of the Si device is due to selective incorporation of trace amounts of Ge in the Si active region. This generates in-plane biaxial strain which in turn degrades the in-plane electron mobility, hence unsuitable for conventional MOSFETs. However, such strain remarkably enhances the out-of-plane mobility, and uniqueness of the current research is the utilization of in-plane strain to boost up the out-of-plane mobility depending on geometry and dimensions of the oscillator’s active region. The model incorporates parasitic series resistance and elevates junction temperature effects on terahertz properties of the device. Incorporation of the strained layer in the active region reduces the parasitic series resistance effect on high frequency properties of the oscillator. Validity of the developed model is established by comparing simulated data with the corresponding experimental observations. The authors have further studied photo irradiation effects on terahertz characteristics of the new class of devices. The structure-induced quantum confinement effect has made the Si-based active region to behave as a partially direct bandgap material, and therefore, a significant improvement is observed in optical sensitivity. To the best of the authors’ knowledge, this is the first report on strain-engineered asymmetrically doped Si/SiGe based avalanche photosensor in the high-frequency terahertz domain.

Electrical Parameters of the Erbium Oxide MOS Capacitor for Different Frequencies

Electrical parameters of Erbium Oxide (Er2O3) MOS capacitors depending on frequency were investigated deeply, in this paper. Er2O3 layers were deposited on p–Si substrates with (100) oriented using RF–magnetron sputtering method. The films were annealed at 500 oC in N2 environment. C–V characteristic changes reduce with increasing frequency. G/ω–V characteristic variations show different behavior between 10–250 kHz and 250 kHz–1 MHz. It is thought that these different behaviors are caused by interface states between silicon and Er2O3 layer, series resistance (Rs) effects and the relaxation time of trapped states. The Rs values calculated by the Cma and Gma values at the high frequency and decrease with rising frequency. Then, Cc­­–V and Gc/ω–V characteristic curves were measured and compared to first measurements. In addition, interface state density (Dit), diffusion potential (VD), and barrier height (B) were calculated and these results demonstrate similar behaviors.

Temperature dependence improvement of polycrystalline-silicon tunnel field-effect thin-film transistor

Trap-assisted tunneling (TAT) mechanism dominates the subthreshold leakage current and ambipolar transport behavior of tunnel field-effect transistor (TFET) with polycrystalline-silicon (poly-Si) channel. The unwanted ambipolar transport behavior of poly-Si TFET can be suppressed by the employment of gate-to-drain underlap structure to increase the tunneling distance near the drain side when the TFET is operated at the negative gate voltage. The gate-to-drain underlap length of TFET would also exhibit series resistance effect and strong temperature effect on the on-state current (ION). The strong temperature dependent series resistance effect and bandgap narrowing effect cause the poly-Si TFET to exhibit temperature instability of the on-state current. In order to improve the temperature instability of the on-state current, the ammonia plasma treatment has been performed to passivate the defects and reduce the trap state density of poly-Si film. The trap state density reduction of poly-Si can improve the field-effect mobility of transport carrier and reduce the series resistance effect, resulting in the reduction of the temperature dependence of ION. Consequently, the improved temperature dependent ION of poly-Si TFET can be obtained, and it is useful for the development of poly-Si thin-film transistor and its applications in the high resolution display industry and three-dimensional integrated-circuit.

Effects of (0.01Ni-PVA) interlayer, interface traps (Dit), and series resistance (Rs) on the conduction mechanisms(CMs) in the Au/n-Si (MS) structures at room temperature

In order to determine effects of interlayer, Dit, and Rs on the CMs, both Au/n-Si and Au/(0.01Ni-PVA)/n-Si (MPS) structures were fabricated on the n-Si wafer and their electrical parameters were extracted from the current-voltage (I-V) and capacitance-voltage (C-V) measurements. The ideality factor (n), zero-bias barrier height (ΦBo), rectifying rate (RR at ±5V), Rs, shunt resistances (Rsh), and density of Dit (at 0.40eV) values were found from the I-V data as 1.944, 0.733 eV, 3.50×103, 64.8 , 0.23 M, 1.62x1013 eV-1cm-2 for MS and 1.533, 0.818 eV, 1.15×107, 5.0 , 57.5 M, 8.82x1012 eV-1cm-2 for MPS. Fermi energy (EF), barrier height (ΦB(C-V)), depletion-layer width (WD) values were obtained from the C-V data as 0.239 eV, 0.812 eV, 1.14x10-4 cm for MS and 0.233 eV, 0.888 eV, 9.31x10-5 cm for MPS. These results indicated that the MPS structure has lower Rs, Dit, leakage current and higher RR, Rsh, BH compared with MS and so this interlayer can be successfully used instead of conventional insulator interlayer. The Ln(I)-Ln(V) plot at forward-bias region has three linear parts corresponding to the low, intermediate, and higher voltages. In these regions; conduction mechanism (CM) is governed by ohmic, trap charge-limited current (TCLC) and space charge-limited current (SCLC), respectively.

Examination of dielectric response of Au/HgS-PVA/n-Si (MPS) structure by impedance spectroscopy method

HgS-PVA nanoparticles were obtained via a simple ultrasound-assisted method. The structural and morphological characteristics of the products were analyzed by X-ray diffraction (XRD) and Scanning Electron Microscopy (SEM). The optical properties were also analyzed by UV–Vis spectroscopy, and Fourier transform infrared (FT-IR). The XRD pattern demonstrated that the samples were high purity and no impurity other peaks were detected. The optical band gap was calculated by Tauc plot measured as 2.4 eV and a blue shift of about 0.3 eV due to the quantum confinement of charge carriers in a small nanostructure was observed. The surface of the samples consisting of nano-sized particles and the energy between the functional group were proved by SEM measurement and FTIR analysis techniques, respectively. Dielectric behavior was examined in the frequency range of 1 kHz-5MHz by using admittance (C-V and G/ω-V) measurements. The effect of surface states (Nss) and polarization processes are dominant especially at low frequencies which lead to large discrepancies in C and G values. The dielectric constant value ε′ reduces with the frequency increments, whereas the ac electrical conductivity σac increases, depending on the nature of reducing polarization and series resistance (Rs) effect. The ε″-V and tanδ-V plots give a peak in the inversion region and the magnitude of this peak reduces with the frequency increments, shifting towards the accumulation region that can be ascribed to a frequency dependent dielectric relaxation.