Effect Of Parasitic Elements Research Articles

Effects of Parasitic Elements on L-Type LC/CL Matching Circuits

Effects of Parasitic Elements on L-Type LC/CL Matching Circuits

Investigation on the Effect of Parasitic Elements on PID Control of DC-DC Buck Converter

DC-DC converter circuits are used in many electronic devices to adjust the voltage to a certain level such as Electric Vehicle. DC-DC Buck converters, which are the most used type of DC-DC converters, reduce the input voltage and keep the output voltage constant at a desired reference voltage value. In this study, the effect of parasitic elements in Buck DC-DC converters is examined on the PID controllers. Parasitic elements cause a non-linear effect on the Buck converter system model. Studies in the literature generally control the output voltage by designing controllers on the Buck converter model without parasitic elements. Alternatively, linear controllers such as PID are designed according to the linearizing model, taking into account the effect of parasitic elements. In addition, nonlinear controllers are designed on the full model with the effect of parasitic elements. In this study, the effect of parasitic elements on linear controllers, especially PID, is examined.

Design and Implementation of Improved Gate Driver Circuit for Sensorless Permanent Magnet Synchronous Motor Control

Reliable motor control is important for electric vehicle applications. The control process requires accurate measurements of the current and rotor position information to establish correct motor control design, particularly in sensorless permanent magnet synchronous motor control systems. Practical issues regarding the motor control circuit, such as the effects of parasitic element behavior on the switching components in the insulated gate bipolar transistor-driven inverter, were discussed in this study. It analyzed the effects of parasitic elements that can cause the ringing of switching losses and affect the spike of the signal in the motor current, which must be avoided in the implementation of motor control. The gate driver circuit topology was improved to reduce this effect in motor control devices. The proposed gate driver circuit design with the ringing suppression circuit configuration achieved good performance by keeping the signal spike at less than 10% in the motor current. Furthermore, a signal spike or noise was not observed in the estimation results of rotor position when using current information as the parameter control process. Both conditions were verified by experiments on the designed motor control devices. Under these conditions, signal precision can be achieved in motor control.

Extendable Bidirectional DC–DC Converter With Improved Voltage Transfer Ratio and Reduced Switch Count

Bidirectional dc-dc converter (BDC) plays an important role in battery-based applications. This paper presents an extendable BDC using 8+5 <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> components, including 3+ <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> MOSFETs, where <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">n</i> is the number of stages. The detailed analysis of single-stage of the proposed converter is discussed. The voltage transfer ratio (VTR) of the converter during the step-up and step-down modes is derived. The effect of parasitic elements on the VTR and the efficiency is discussed. The state-space model is derived, and the open-loop transfer functions, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\widehat{\boldsymbol{v}}_{\boldsymbol H}/\widehat{\boldsymbol d}_{\boldsymbol H}$</tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$\widehat{\boldsymbol{v}}_{\boldsymbol L}/\widehat{\boldsymbol d}_{\boldsymbol L}$</tex-math></inline-formula> for both the modes are obtained. These transfer functions are validated using circuit level simulation. The operating modes of the converter are validated using a 300 W, 650 V, and 50 kHz prototype, and the experimental results are presented. Using the derived transfer functions, the PI controllers are designed using Ziegler–Nichols method for step-up and step-down modes. Using the Xilinx system generator (XSG), the designed controllers are implemented, and the experimental closed-loop results are presented. The performance comparison shows that the VTR of the single-stage converter using four MOSFETs is significantly improved compared to the other converters which achieve the quadratic VTR. Each extended stage requires a single MOSFET along with 4 passive components.

Family of Non-Isolated Quadratic High Gain DC–DC Converters Based on Extended Capacitor-Diode Network for Renewable Energy Source Integration

Many topologies in the area of non-isolated high-voltage gain dc–dc converter are reported for improving efficiency and voltage gain and to reduce the switch stress with the use of minimum number of components. A family of quadratic high-gain dc–dc converters using an extended capacitor–diode network is proposed in this article, and an extensive analysis has been conducted to assess their performances. The output voltage of the five proposed converters by considering the effect of parasitic elements is derived, and the analytical efficiency profiles are drawn. The proposed converters are designed for 650 V, 0.5 kW, and 50 kHz with a 48-V input source. The hardware prototypes are fabricated for the five converters, and the experimental results are presented. For the considered design, converters I and III give higher efficiency and lower voltage stress on the semiconductor devices. Converters IV and V are suitable for higher voltage gain applications. A dynamic model for converter I is derived and a controller is implemented for closed-loop operation. A suitable converter among the family can be selected according to the applications for the integration of renewable energy sources.

Design of an Integrated Power Module for Silicon Carbide MOSFET with Self-Compensation of the Magnetic Field

Compactness, efficiency, and light weight are the key topics in the design of power conversion systems for transportation applications. This demand is achievable by using wide band gap devices such as SiC devices, characterized by the high switching speed and low on-resistance. However, this trend imposes new challenges and the effect of parasitic elements of power package during switching transient becomes significant. Hence, new packaging solutions should be investigated for addressing this concern. This paper presents a new multichip power module architecture, where its design considering capacitive and inductive stray elements is carried out. Using Ansys Q3D Extractor, electromagnetic simulations are achieved to extract the inductive and capacitive parasitic element of one leg of a three-phase inverter.

A complete small‐signal model of GaAs dual‐gate HEMT

AbstractA complete small‐signal model of dual‐gate HEMT is proposed, considering the parasitic element effects. To extract the intrinsic elements accurately, the parasitic elements are eliminated by using a new method in this paper. It is realized by constructing two simple three‐port matrices and eliminating them with the features of ‐type and T‐type networks. This method is fast and accurate. Dual‐gate HEMTs could be regarded as a cascode connection of two single‐gate HMETs. A dual‐gate HEMT is fabricated on a commercial 0.25 μm GaAs technology to verify the proposed the extraction method. The result shows a good agreement between measured and simulated data over a wide frequency range.

Switched LC Network-Based Multistage Ultra Gain DC-DC Converter

A multi-stage active switched inductor-capacitor network (SLCN)-based high gain DC-DC converter structure with a single switch is proposed in this paper. The idea of utilizing multiple number of SLCN networks to achieve an ultra-voltage gain is proposed. The achievement of ultra-gain helps to operate the converter at lower duty ratio. Hence, a reduction of conduction loss, improvement in efficiency and elimination of core saturation are attained in the proposed bi-quadratic converter compared to the conventional converters. The performance of a biquadratic boost converter which is formulated from the <inline-formula> <tex-math notation="LaTeX">$n$ </tex-math></inline-formula>-stage SLCN converter for <inline-formula> <tex-math notation="LaTeX">$n=2$ </tex-math></inline-formula>, is analyzed. To reduce the effect of parasitic elements of the semiconductor devices, the SiC-based devices are selected. The small-signal model of the biquadratic converter is derived, and a PI controller is designed to regulate the output voltage. The designed controller is implemented using XSG platform. Experimental waveforms for 650 V output voltage, 500 W output power and 50 kHz switching frequency are presented. The performance of the proposed converter with similar recently reported topologies is compared. Simulation results of the bi-quadratic converter interfaced solar PV panel with P&#x0026;O algorithm are presented to assess the feasibility of the proposed converter in solar PV application.

Analysis of a CS amplifier Based on CNTFET with parasitic elements of interconnection lines

In this paper we present a procedure to study the effects of parasitic elements (capacitances, inductances and resistances) of interconnection lines in integrated circuits where Carbon Nanotubes are embedded. In particular the Drain/Source pads dimensions of CNT are analysed, as well as the interconnection lines between a CNT and an appropriate load are sized. In order to estimate parasitic elements in CNTs embedded integrated circuits, we analyse 50 nm technology. Moreover it is also possible for predictions analysis on 10 nm and 3 nm technology. We apply the proposed procedure to the design of a Common-Source amplifier, using a CNTFET model already proposed by us. The frequency domain simulations, obtained using the ADS simulator, show how the parasitic elements limit the performances of CNTs. In particular we obtain that the -3 dB cutting frequency of the examined amplifier full of parasitic elements increases as technology decreases. Moreover we repeat the proposed simulations using SPICE, obtaining results practically coincident but with the Verilog-A implementation we have mainly a simulation run time much shorter and a software much more concise and clear than schemes using ABM blocks in SPICE.

Investigation of Electrical Properties of the Al/SiO2/n++-Si Resistive Switching Structures by Means of Static, Admittance, and Impedance Spectroscopy Measurements.

In this study, the resistive switching phenomenon in Al/SiO2/n++-Si structures is observed and studied by means of DC, small-signal admittance, and complex impedance spectroscopy measurements. Possible transport mechanisms in the high and low resistance states are identified. Based on the results of the applied measurement techniques, an electrical equivalent circuit of the structure is proposed. We discuss the effect of parasitic elements influencing the measurement results and show that a proper model can give useful information about the electrical properties of the device. A good agreement between the characteristics of the proposed equivalent circuit and the experimental data, based on different measurement procedures, confirms the validity of the used methodology and its applicability to the electrical characterization of RRAMs.

Solar power based positive output super-lift Luo converter using fuzzy logic controller

Photovoltaic (PV) power generation is employed to meet the increasing demand for energy and of cleaner form. Though renewable and high energy using PV can be produced, they have certain disadvantages. PV cells have a low voltage (approx. 0.5V) rating and they have to be connected in series when higher voltage is required. These cells when connected in series should have identical electrical characteristics to avoid ripples in the output voltage and current, but it is not possible practically. To avoid this miss-match, converter circuits are employed. The major drawbacks in most power converters are reduced voltage gain and their tendency to generate harmonics in the supply system and the load circuit. To overcome these limitations, a positive output super-lift Luo converter is designed. A Positive Output Super Lift Luo converter (POSLC) is a powerful DC-DC converter where the voltage is converted from positive source voltage to positive load voltage as it produces positive voltages of comparatively higher ranges than those of conventional types. The super-lift technique also overcomes the effect of parasitic elements and thus minimizing the ripples in the output voltage and current. In addition to this, the voltage build-up can be achieved by implementing the super-lift technique where the output voltage rises in geometric progression with increased voltage transfer gain and high power density. In this paper fuzzy control is used to produce better-controlled voltage and a more refined output. The performance of POSLC with and without implementation of fuzzy control has been successfully simulated and verified using MATLAB/SIMULINK as well simulation model also developed and analyzed with Proteus package.

Electronically tunable CFTA based positive and negative grounded capacitance multipliers

This paper presents four novel lossless grounded capacitance multiplier (GCM) circuits based on Current Follower Transconductance Amplifier (CFTA). Two of the proposed GCMs are positive and two are negative. The proposed GCMs include two CFTAs, two resistors, and a capacitor. The proposed GCMs employ a minimum number of passive components and do not require any passive element matching condition. The multiplication factor can be controlled either by bias current or by varying either of the two resistances. The effects of parasitic elements on the operating frequency range of the proposed GCMs have been investigated through mathematical analysis. Time and frequency domain analysis has been performed with LTspice program using 0.13 µm IBM CMOS technology parameters. The capacitance cancellation circuit and current-mode universal biquad filter applications are provided to demonstrate the usefulness of the circuit. Monte Carlo and temperature analyses have been performed to verify the robustness of the proposed GCMs. Additionally, comparison of the proposed GCMs with the relevant circuits previously reported in the literature is presented. An experimental example is provided to verify the time-domain performance of the proposed positive lossless GCM by using commercially available integrated circuits (ICs).

Design, Implementation, and Validation of Electro-Thermal Simulation for SiC MOSFETs in Power Electronic Systems

Silicon carbide (SiC) mosfets are getting popular in high-frequency power electronic (PE) applications. More and more concerns for system efficiency and reliability are growing due to the increasing switching losses and thermal stress. In this article, an electro-thermal simulation method for SiC mosfets in modern PE systems is proposed. In the device simulation, a behavioral transient model of SiC mosfets is developed and used for generating a multidimensional power loss table in a wide range of operating conditions. The effects of parasitic elements, temperature-dependent parameters, and reverse recovery effect of the diode are taken into account. Furthermore, the power loss look-up table is integrated into the PE system simulation with an additional Cauer-based dynamic thermal model considering heatsink impact. In this way, the instantaneous power losses and junction temperature can be obtained, respectively, with fast simulation speed, reasonable accuracy, and improved simulation convergence. The proposed approach is implemented in PSCAD/EMTDC and further validated by the experimental results of a double pulse test setup and a power factor correction system.

Non-Isolated n-Stage High Step-up DC-DC Converter for Low Voltage DC Source Integration

The dc-dc converters with high step-up DC-voltage gain play a vital role in integrating low voltage DC sources. Though several converter topologies are reported in the recent past, attempts have been made to reduce the components, especially the switching devices, passive elements, converter losses, etc., of the converter. A novel DC-DC converter topology, viz., single switched impedance network (SSIN)-based converter with n-stage is proposed in this paper. The operation of the SSIN based converter in continuous and discontinuous conduction modes are discussed. The effect of parasitic elements on DC-voltage gain and efficiency of the SSIN is carried out. The small-signal model of the SSIN converter is derived. The performance of the SSIN converter is compared with the similar converter topologies. The 500 W prototypes of the SSIN with n = 1 and n = 2 are fabricated, and the experimental results are presented in this paper. To improve the converter performance, SiC-based semiconductor devices are used. The SSIN converter with two-stage has low switch loss at 500 W load, improved efficiency during high power and high output voltage operation, the switch stress of V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">o</sub> /2, etc.

Backward Discrete State Event-Driven Approach for Simulation of Stiff Power Electronic Systems

Power electronic systems are intrinsically hybrid systems, consisting of continuous states and discrete events. The hybrid nature makes their accurate and efficient simulation challenging to achieve. A novel approach called discrete state event-driven (DSED) is able to solve such hybrid systems efficiently, but it shows unsatisfying simulation speed when calculating circuits containing parasitic parameters, namely stiff systems. Since the effect of parasitic parameters brought by connection lines can be destructive when they produce voltage peak or resonance, it is crucial to evaluate the impact of parasitic elements during the design phase of the converters by simulation. This paper proposes a backward DSED (BDSED) approach that can solve stiff systems efficiently by cooperating with the event-driven framework. The BDSED adopts a semi-variable-step-variable-order (S-VSVO) mechanism for integrating continuous states and uses interpolation method for dealing with discrete events. With this simulation approach, the effect of parasitic elements in power electronic systems can be analyzed more efficiently compared to other commercial software. In a case study, the proposed approach shows 60 times faster in simulation speed compared with ode15s in Simulink and more than 3 times faster compared with stiff solver in a commercial software called PLECS at the same level of accuracy.

Performance Enhancement of MIMO Patch Antenna Using Parasitic Elements

This paper investigates the effects of parasitic elements on the performance of MIMO patch antenna. Multiple square parasitic elements are added in close proximity to each of the rectangular patch elements. These parasitic elements affect the electromagnetic field distribution and consequently reduce the mutual coupling. In addition, wider bandwidth is also achieved. Two MIMO antennas coupled in H-plane and E-plane are designed and measured to demonstrate the proposed concept. The measured results show that both designs have a wide impedance bandwidth of 14% with isolation of more than 20 dB across the whole band (with a small antenna profile of $0.05\lambda _{0}$ ). For 40-dB isolation, the H-coupled and E-coupled design achieve a bandwidth of 2.7% and 1.5%, respectively. Compared to other methods, the proposed method has much simpler structure, wider bandwidth and comparable improvement in isolation, with the tradeoff in larger antenna element size.

Dual-Input Nonisolated DC–DC Converter With Vehicle-to-Grid Feature

Electric vehicles (EVs) have become a more prominent solution to replace all fossil-fuel-based combustion vehicles. During the parking of EVs, the power produced by solar photovoltaic (PV) present in the PV-powered EVs is underutilized when the capacity of the EV battery is full. Also, a converter is devoted in the conventional EVs to perform the vehicle-to-grid (V2G) or vehicle-to-vehicle (V2V) operation. To use PV and to perform V2G operation, a novel nonisolated dual-input single-output dc–dc converter (DISOC) is proposed. The DISOC structure can be reconfigured to perform six types of operation based on the status of power availability with PV, battery, and also the running status of the EV. Simultaneous power transfer from both the input sources, charging the battery from solar PV, and V2G and G2V operations are the key features of the proposed converter. The converter operation, component design, effect of parasitic elements on the converter performance, small-signal model, and so on have been reported. The hardware prototype of the converter is fabricated for 500 W, and the experimental results are presented.

SiC‐based high‐gain DC–DC converters with fault ride‐through capability

This study presents active switched passive network-based high-gain DC–DC converters. The active switched network is formulated using two inductors, one capacitor and two diodes. Hence, the network is named as a 2L–C–2D network. Using ten components, an asymmetric high-gain DC-DC converter is proposed. This converter achieves a gain of 29 at an 80% duty ratio. In the asymmetric converter structure by replacing the inductor by another 2L–C–2D network, the symmetric converter structure is proposed using 14 components. This converter structure achieves the gain of 49 at the same 80% duty ratio. Apart from increasing the voltage gain, the 2L–C–2D network helps to reduce the voltage and current stresses of the converter. The utilisation of two semiconductor switches in the proposed converter structures permits a fault ride-through capability even when any one of the switches fails. Operations of the converters in continuous conduction mode (CCM) and discontinuous conduction mode (DCM) are discussed, and the boundary condition between CCM and DCM is derived. To limit the effect of parasitic elements on the converter performance, SiC-based semiconductor devices are used in the 500 W hardware prototype. The maximum efficiency of 92.8% is achieved in the case of a symmetric converter.

Multi-Stage DC-DC Converter Using Active LC2D Network With Minimum Component

A multi-stage ultra-gain converter using minimum component including a single semiconductor switch is proposed. The proposed converter is formulated using an active inductor-capacitor-two diodes (LC2D) network. The basic structure of the converter called as a cubic gain converter is formulated using twelve components including a semiconductor switch. The operation of the converter is discussed for continuous and discontinuous modes of operations. The converter performance due to the parasitic elements is discussed, and the SiC-based semiconductor devices are selected to reduce the effect of parasitic elements. A 250 W, 50 kHz cubic gain converter prototype is made and the test results are recorded. The results prove that the operation of the cubic gain converter in low duty ratio helps to attain 91.6% efficiency. The proposed structure of the n-stage and the detailed analysis of the cubic gain converter are the major novelties and contributions of this brief.

Preliminary design of the implementation of automatic antenna radiation pattern measurement: Study of Yagi antenna radiation pattern

The radiation pattern is an important parameter of the antenna performance. This parameter needs to be measured not only accurately but also as fast as possible. For this purpose, the automatic measurement system has been developed. In this research, the system is implemented to analyze the radiation characteristic of a Yagi antenna by measuring its radiation pattern. The measurement result of the patterns is compared to those of the table characteristics of the Yagi antenna as well as a computer simulation. For this purpose, a Yagi antenna is designed and realized as the radiation pattern measurement object. Then, the students experiment to measure and analyze the effect of parasitic elements on the radiation pattern performance of the antenna. The questionnaire is carried out as the method of the research and directed to the students of the Telecommunication Study Program, Bandung State Polytechnic, to get the perception of the object performance.