Effect Of Parasitic Elements Research Articles

Editors’ Choice—Effects of Parasitic Elements of Interconnection Lines in CNT Embedded Integrated Circuits

In this paper we present a study of the effects of parasitic elements of interconnection lines in integrated circuits (I.C.) where Carbon NanoTubes (CNTs) are embedded. In particular the Drain/Source pads dimensions of CNT are analyzed, as well as the interconnection lines between a CNT and an appropriate load are sized.Furthermore the time domain and frequency simulations of some circuits are presented in order to see how the parasitic elements could limit the high-speed performances of CNTs.

Analysis, Modeling, and Control of Half-Bridge Current-Source Converter for Energy Management of Supercapacitor Modules in Traction Applications

In this work, an in-depth investigation was performed on the properties of the half-bridge current-source (HBCS) bidirectional direct current (DC)-to-DC converter, used to interface two DC-link voltage sources with a high-voltage-rating mismatch. The intended implementation is particularly suitable for the interfacing of a supercapacitor (SC) module and a battery stack in a hybrid storage system (HSS) for automotive applications. It is demonstrated that the use of a synchronous rectification (SR) modulation scheme benefits both the power-stage performance (in terms of efficiency and reliability) and the control-stage performance (in terms of simplicity and versatility). Furthermore, an average model of the converter, valid for every operating condition, is derived and utilized as a tool for the design of the control system. This model includes the effects of parasitic elements (mainly the leakage inductance of the transformer) and of the converter snubbers. A 3 kW prototype of the converter was used for experimental validation of the converter modeling, design, and performance. Finally, a discussion on the control strategy of the converter operation is included.

Dual Frequencies Band and Enhanced Wideband Effect of Dual Layer Microstrip Patch Antenna with Parasitic

In current telecommunication situation, the antenna with wideband or multi-band effect are important for cater many users’ demands. In this research, the works explores the effect of parasitic element on the above of the dual layer microstrip patch antenna. Firstly, a basic microstrip patch antenna with a single layer of substrate (Design A) had been simulated using the CST Microwave Studio software. After that, the addition of another layer of substrate with parasitic element is shown as Design B. This proposed microstrip patch antenna resonates at two different frequencies of 2.396 GHz and at 2.543 GHz of frequency with - 36.8 dB and - 35.644 dB of return loss, respectively. The gain performance for both resonant frequencies at 2.396 GHz and at 2.543 is 5.035 dB and 4.814 dB, respectively. The bandwidth of the Design B antenna is 0.097 GHz (2.354 GHz - 2.451 GHz), had been increase compare with Design A performance of 0.039 GHz (2.380 GHz- 2.419 GHz). The second resonant frequency for Design B is only 0.028 GHz. (2.526 GHz- 2.554 GHz).

Attenuate Influence of Parasitic Elements in 13.56-MHz Inverter for Wireless Power Transfer Systems

At 13.56 MHz, the circuit parasitic elements strongly affect the stability, performance, and efficiency of the inverter. In this paper, the effect of parasitic elements in the 13.56-MHz half-bridge inverter is analyzed in detail based on the point of view of the high-frequency ringing in the circuit. A proposed inverter design that aims to attenuate the influence of the parasitic elements is presented, including optimized printed circuit board (PCB) design and ringing damping design. The simulation and experiment results show that the proposed PCB design not only reduces the parasitic inductance in the ringing loop but also improves the stability of the inverter by avoiding the subresonant at low frequency and reducing the radiation electromagnetic interference noise. This paper also points out that the ringing current exists in the circuit even with the proposed optimized PCB design lead to the instability of the inverter at high voltage operating condition. The proposed damping circuit significantly suppresses the ringing in the circuit and improves the stability as well as the efficiency of the inverter. The experiment results confirm that by using the proposed design, the half-bridge inverter module using Silicon mosfet is stable at 13.56-MHz switching frequency and its efficiency obtains ${\text{93.1}}\%$ at 1.2-kW output power.

Radiation Pattern Performance of Unequally Linear Arrays with Parasitic Element

<p>For next generation of 5G mobile base station antennas, multibeam, multifrequency and low sidelobe characteristics requested. Simplify the feeding network will contribute a low feeder loss and frequency dependent. From the previous research by the author, low sidelobe level reported by density tapered array configuration from -13 dB to -16 dB and the result maintained for wideband operation frequency at 28 GHz, 42 GHz, and 56 GHz. However, the grating lobe has occurred due to element spacing larger than a wavelength of higher frequency (56 GHz). In this paper, an investigation was made of the performance of radiation pattern for unequally microstrip linear array antenna in frequency 42 GHz and 56 GHz by loading parasitic elements. The effect of parasitic element to the impedance, gain, and sidelobe level of unequally microstrip linear spaced tapered array also examined. The design has been simulated using Ansoft High Frequency Structural Simulator (HFSS) ver 16.0.</p>

Band-pass filter with high quality factor based on current differencing transconductance amplifier and current amplifier

This paper presents second order band-pass filter with high quality factor. Its high quality factor is provided by feedback circuit. The used second order filter is modified so that filters outputs through capacitor can be obtained to high impedance output. Thereby, there is no need the extra active element to obtain filter outputs. Also, the output stage of current differencing transconductance amplifier have only X− terminals instead of X+ and X− terminals. Furthermore, the quality factor of the band-pass filter with feedback circuit is increased by feedback gain consisting of only four transistors. Besides, to examine effects of parasitic elements, non-ideal and sensitivity, the overall structure is investigated deeply. Working conditions and boundaries of the overall structure is also defined. The simulation demonstrates good agreement between the theoretical expectations and simulation results.

Enhancement of Medium Frequency Hysteresis Loop Measurements Over a Wide Temperature Range

Measuring the high-frequency magnetic losses of high performance, low-loss magnetic materials is a challenging issue due to the parasitic elements in measurement circuits. Performing loss measurements at a specific temperature applies more constraints on the development of measurement setups. In this paper, we focus on hysteresis loops ( $B$ – $H$ loop) measurement technique and we propose a new compensation method aimed to reduce the effect of parasitic elements and to ameliorate the measurement precision. The magnetic losses measured with the thermal method are used as a reference to evaluate the precision of the proposed compensation technique. In order to measure loss at higher temperatures, we propose a calibration method. Measurements are performed between −10 °C and 110 °C. Our approach can be used to develop simple and precise laboratory setups for magnetic measurements.

Design and simulation of an ultra-low power high performance CMOS logic: DMTGDI

An ultra-low power, high speed dual mode CMOS logic family called DMTGDI is introduced. This logic family takes over and improves main characteristics of Gate Diffusion Input (GDI) and Dual Mode Logic (DML). Simulations have been performed in 90nm CMOS on a single bit full adder. DMTGDI shows 60% performance improvement over conventional DML, and significant reduction of power-delay product (PDP), of about 95% in static mode, and 75% in dynamic mode. Monte Carlo simulations reveal that DMTGDI is more robust under process variation comparing to conventional DML. Post layout simulation demonstrates negligible effect of parasitic elements on performance of the single bit adder.

An Improved Analytical Model for Predicting the Switching Performance of SiC MOSFETs

This paper derives an improved analytical model to estimate switching loss and analyze the effects of parasitic elements on the switching performance of SiC MOSFETs. The proposed analytical model considers the parasitic inductances, the nonlinearity of the junction capacitances and the nonlinearity of the trans-conductance. The turn-on process and the turn-off process are illustrated in detail, and equivalent circuits are derived and solved for each switching transition. The proposed analytical model is more accurate and matches better with experimental results than other analytical models. Note that switching losses calculated based on experiments are imprecise, because the energy of the junction capacitances is not properly disposed. Finally, the proposed analytical model is utilized to account for the effects of parasitic elements on the switching performance of a SiC MOSFET, and the circuit design rules for high frequency circuits are given.

Assessment of 28 nm UTBB FD-SOI technology platform for RF applications: Figures of merit and effect of parasitic elements

This work provides a detailed study of 28nm fully-depleted silicon-on-insulator (FD-SOI) planar ultra-thin body and BOX (UTBB) MOSFETs for high frequency applications. All parasitic elements such as the parasitic gate and source/drain series resistances, total capacitances are extracted and their effects on RF performance are analyzed and compared with previous work on similar devices. Two main RF figures of merit (FoM) such as the current gain cut-off frequency (fT) and the maximum oscillation frequency (fmax) are determined. It is shown that fT of ∼280GHz and fmax of ∼250GHz are achievable in the shortest devices. Based on the extracted parameters, the validation of the small-signal equivalent circuit used for modeling UTBB MOSFETs is investigated by comparing simulated and measured S-parameters.

Modelling and experimental verification of the effect of parasitic elements on the performance of an active-clamped current-fed DC–DC converter

Current-fed DC–DC converter has received a lot of attention recently for the fuel cell power source applications. This is due to its attractive features, such as low input current ripple, high voltage conversion ratio and high efficiency. Unfortunately, a high voltage stress across the switches and hard switching is the main drawback of the current-fed topologies. Therefore, an active clamp circuit is often implemented to suppress any voltage overshoot across the switches and achieving zero-voltage switching. In this paper, based on detailed analysis on the converter performance it was found that parasitic elements of the converter can have a large impact on promising features of current-fed converters with an active clamp. This has not been reported in the literature. It has been shown through an in-depth analysis on the converter that particularly during the switch overlap period the parasitic elements create undesirable oscillations leading to additional circulating energy that adds to the conduction losses of the converter. It also results in voltage ringing across the clamp switch, oscillations in the current through the clamp circuit and high voltages across the bridge switches, even when the switches are conducting. Based on this finding a number of modifications have been proposed and these have been verified by thorough simulation and experiment.

Comparison of DC-DC Converters for Photo-Voltaic Application

Electricity demand is a major concern in the world today. To meet this demand, a number of natural sources are used for electricity production. The produced electrical energy from these natural sources will be given to consumers after going through a lot of conversion stages. So losses mostly occur in these conversion stages. In this paper the four existing converters CUK, SEPIC, Self-lift CUK and Self-lift SEPIC performances are separately compared and analyzed with each other. The voltage-lift (VL) technique is a popular method that is widely applied in electronic circuit design. This technique overcomes the effects of parasitic elements and increases the output voltage effectively along with high power efficiency and high power density with a simple structure. The operating principles of these converters are discussed and Simulation results are provided to verify and compare the feasibility of each systemwith solar photo-voltaic panel incorporated maximum power point tracking (MPPT).

Wide frequency band assessment of 28 nm FDSOI technology platform for analogue and RF applications

This work presents an in-depth wide-frequency band assessment of 28nm FDSOI MOSFETs for analogue and RF applications. The focus is mainly on such figures of merit (FoM) as the transconductance gm, the output conductance gd, the intrinsic gain Av and the cut-off frequencies fT and fmax. Firstly, 28nm FDSOI MOSFETs are compared with other advanced devices and are shown to outperform them. Secondly, gm–Av analogue metric is demonstrated to be affected by operation frequency. Small-signal parameters variation is limited and dominated by self-heating effect. This is in contrast to the first generation of ultra-thin body and BOX devices without a ground plane where coupling through the substrate has a considerable effect. Thirdly, the self-heating effect is analysed and shown to be smaller than previously predicted by simulations for such devices. Fourthly, it is shown that fT of ∼280GHz and fmax of ∼250GHz are reachable in the shortest devices. These values are compared to those of the first generation of UTBB devices through the effect of parasitic elements.

Effect of Parasitic Elements on the Performance of Buck-Boost Converter for PV Systems

In the proposed study, MOSFET device used in buck-boost converter for PV systems is studied. The parameter of MOSFET Rds(on) is varied and its effect on output voltage is studied. The parasitic elements in inductor and capacitor such as resistance on buck-boost converter performance are studied. From the proposed study it has been found that the effect of parasitic resistance in capacitor is less as compared to parasitic resistance effect of inductor. Also the proposed study gives better insight into parasitic effect of Printed Circuit Board and losses incurred due to the same. In PV systems buck-boost converter is used to convert solar energy to electrical energy which is then stored in battery to drive the loads. These parasitic elements will have considerable effect on the performance of buck-boost converter such as efficiency and output voltage as validated by experimental results. DOI: http://dx.doi.org/10.11591/ijece.v4i6.6855

Effect of parasitic elements on UTBB FD SOI MOSFETs RF figures of merit

This work details the harmful effect of parasitic resistances and capacitances on RF figures of merit (FoM) of ultra-thin body and thin buried oxide (UTBB) FD SOI n-MOSFETs. It is demonstrated that intrinsically, UTBB device can reach very high cut-off frequency (fT) provided the reduction of parasitic elements. In addition, based on device simulation, we demonstrate that with appropriate configuration, Asymmetric Double Gate (ADG) regime provides a slight improvement of RF figures-of-merit.

Analog Implementation of Wavelet Transform in Switched-Current Circuits with High Approximation Precision and Minimum Circuit Coefficients

This paper presents a novel procedure for analog implementation of wavelet transform in switched-current (SI) circuits. An improved hybrid PSO---SQP optimization is employed to precisely approximate the impulse response of a filter to the wavelet base function in time domain. The SI first- and second-order section circuits with minimum coefficients are designed based on infinite-impulse-response digital filter technology. Cascode techniques are occupied to reduce the effects of parasitic elements. Based on these SI first- and second-order section circuits, a parallel wavelet circuit structure is presented to synthesize the approximated wavelet base function. By adjusting the switch clock frequency, the wavelets at different scales can be realized. The Gaussian wavelet is selected as an example to illustrate the design procedure. Simulation results demonstrate the feasibility of the proposed procedure for analog wavelet transform in SI circuits.

Effect of Parasitic Element on 408 MHz Antenna for Radio Astronomy Application

Antenna is one of the important subsystem components in a radio telescope system. In this paper, analysis on the effect of parasitic element on 408 MHz antenna in a radio telescope system is presented. Higher gain up to 10.24 dBi with reduction on beamwidth size has been achieved by optimizing the position of parasitic element relative to the driven element. The proposed antenna is suitable to be utilized in a transient radio telescope array.

Characterization and Experimental Assessment of the Effects of Parasitic Elements on the MOSFET Switching Performance

This paper presents a comprehensive study on the influences of parasitic elements on the MOSFET switching performance. A circuit-level analytical model that takes MOSFET parasitic capacitances and inductances, circuit stray inductances, and reverse current of the freewheeling diode into consideration is given to evaluate the MOSFET switching characteristics. The equations derived for emulating MOSFET switching transients are assessed graphically, which, compared to results obtained merely from simulation or parametric study, can offer better insight into where the changes in switching performance lie when the parasitic elements are varied. The analysis has been successfully substantiated by the experimental results of a 400 V, 6 A test bench. A discussion on the physical meanings behind these parasitic effect phenomena is included. Knowledge about the effects of parasitic elements on the switching behavior serves as an important basis for the design guidelines of fast switching power converters.

Scattering parameter based modeling and simulation of symmetric tied-gate InAlAs/InGaAs DG-HEMT for millimeter-wave applications

This paper analyses the RF performance of the symmetric tied-gate In 0.52Al 0.48As/In 0.53Ga 0.47As DG-HEMT in terms of its maximum frequency of oscillation ( f max) and the other important figures of merit that include Maximum Unilateral Transducer Power Gain and the Maximum Stable Gain. This comprehensive investigation has been done on the basis of scattering parameters in order to judge the potential of InAlAs/InGaAs DG-HEMT as the device for future millimeter wave frequency applications. The effect of parasitic elements has also been included in the analytical model which leads to better correspondence with the experimental results. The analytical results thus obtained using the charge control model are compared and found to agree well with both the ATLAS-3D device simulation results as well as the experimental results.

Synthesis of Oscillators Using Limit Variables and NAM Expansion

A systematic synthesis procedure for generating second-order grounded passive element canonic oscillators is given. The synthesis procedure is based on using nodal admittance matrix (NAM) expansion with the bracket method as well as using the infinity parameters. The resulting derived oscillators include circuits using various types of current conveyors. Two classes of oscillators are considered in this paper, and they have the advantages of having independent control on the condition of oscillation and on the frequency of oscillation by varying two different grounded resistors. The two classes of oscillators considered can be easily compensated for the parasitic element effects introduced by the current conveyors. This paper is considered to be continuation to the recently published paper on oscillators using NAM expansion D. G. Haigh et al. (2006). This is the first paper in the literature which uses limit-variables called infinity-variables D. G. Haigh et al. (2005) in the synthesis of oscillator circuits. Simulation results demonstrating the practicality of some of the generated circuits are included.