Early Electromigration Research Articles

Vertical interconnects of microbumps in 3D integration

Abstract

Electromigration in Passivated Gold Interconnects for GaAs Devices

Electromigration in metal interconnects is the most pernicious failure mechanism in semiconductor integrated circuits (ICs). Early electromigration investigations were primarily focused on aluminum interconnects for silicon-based ICs. An alternative metallization compatible with gallium arsenide (GaAs) was required in the development of high powered radio frequency (RF) compound semiconductor devices operating at higher current densities and elevated temperatures. Gold-based metallization was implemented on GaAs devices because it uniquely forms a very low resistance ohmic contact and gold interconnects have superior electrical and thermal conductivity properties. Gold (Au) was also believed to have improved resistance to electromigration due to its higher melting temperature, yet electromigration reliability data on passivated Au interconnects is scarce and inadequate in the literature.Electromigration lifetimes of large quantities of passivated electroplated Au interconnects were measured utilizing high resolution in-situ resistance monitoring equipment. Application of moderate accelerated stress conditions with a current density limited to 2 MA/cm2and oven temperatures in the range of 300°C to 375°C avoided electrical overstress and severe Joule-heated temperature gradients. Temperature coefficients of resistance (TCRs) were measured to determine accurate Joule-heated Au interconnect film temperatures.A failure criterion of 50% resistance degradation was selected to prevent thermal runaway and catastrophic metal ruptures that are problematic of open circuit failure tests. Test structure design was optimized to reduce resistance variation and facilitate failure analysis. Characterization of the Au microstructure yielded a median grain size of 0.91 µm. All Au lifetime distributions followed log-normal distributions and Black’s model was found to be applicable. An activation energy of 0.80 ± 0.05 eV was measured from constant current electromigration tests at multiple temperatures. A current density exponent of 1.91 was extracted from multiple current densities at a constant temperature. Electromigration-induced void morphology along with these model parameters indicated grain boundary diffusion is dominant and the void nucleation mechanism controlled the failure time.

Microstructural impact on electromigration: A TCAD study

Current electromigration models used for simulation and analysis of interconnect reliability lack the appropriate description of metal microstructure and consequently have a very limited predictive capability. Therefore, the main objective of our work was obtaining more sophisticated electromigration models. The problem is addressed through a combination of different levels of atomistic modeling and already available continuum level macroscopic models. A novel method for an ab initio calculation of the effective valence for electromigration is presented and its application on the analysis of EM behavior is demonstrated. Additionally, a simple analytical model for the early electromigration lifetime is obtained. We have shown that its application gives a reasonable estimate for the early electromigration failures including the effect of microstructure.

Mode II electromigration failure mechanism in Sn-based Pb-free solder joints with Ni under-bump metallization

Early electromigration (EM) failure mechanism, also known as Mode II EM failure in Sn-based Pb-free solder joints with Ni under-bump metallization (UBM) is studied. A numerical model was built to incorporate interdiffusion and EM, and to investigate the effect of Sn crystal orientation. Results show that when the c axis of Sn has a close alignment to the current direction, intermetallic compound (IMC) growth is enhanced by both EM and extremely fast interstitial diffusion of Ni in the solder. The combined process results in IMC dissolution from the cathode side of the solder joint and causes EM failure by UBM depletion. Theoretical predictions are consistent with experimental observations.

Modeling Electromigration Lifetimes of Copper Interconnects

A model for early failure due to electromigration in copper dual-damascene interconnects is proposed. The model is based on analytical expressions obtained from solutions of electromigration stress build-up assuming slit void growth under the interconnect vias. It is demonstrated that the model satisfactorily describes the complex physics of void nucleation and growth of the electromigration damage. Furthermore, it is shown that the simulation results provide reasonable estimates for early electromigration failures.

A compact model for early electromigration failures of copper dual-damascene interconnects

A compact model for early electromigration failures in copper dual-damascene interconnects is proposed. The model is based on the combination of a complete void nucleation model together with a simple mechanism of slit void growth under the via. It is demonstrated that the early electromigration lifetime is well described by a simple analytical expression, from where a statistical distribution can be conveniently obtained. Furthermore, it is shown that the simulation results provide a reasonable estimation for the lifetimes.

On-Off Intermittency and Criticality in Early Stage Electromigration

We have studied here using high resolution resistance measurements the time and statistical behavior of abrupt resistance changes in a thin metal aluminum film undergoing electromigration. We reveal for the first time that early stage electromigration exhibits on-off intermittency. The intermittent resistance fluctuations are also shown to be scale invariant, an effect seen in the fluctuations of several physical systems including earthquakes, superconductor dynamics and stock markets. Finite size scaling of the resistance fluctuations demonstrates that they originate near a critical point.

Copper alloy seed integration for reliability improvement

Besides cost reduction and yield optimisation, advanced interconnect development is nowadays driven by continuous resistance and capacitance improvement in order to reduce RC-delay with shrinking line dimensions. In order to attain these aggressive goals atomic layer deposition (ALD) has successfully been employed to improve line resistance by depositing atomically thin TaN barriers thereby increasing the copper cross section of the line. However, the reliability is still of concern due to a reduced adhesion of the copper seed to the ALD TaN liner. In this paper a PVD copper alloyed seed and a PVD Ta-flash (∼5 nm) were used to improve the ALD TaN/Cu interface strength and remedy early electromigration failure. The Cu-seed was alloyed with 1 at.% aluminium and integrated into state-of-the-art 90 nm and 65 nm interconnect structures in order to evaluate the extendibility at narrow line widths. Activation energy and mean time to failure were significantly improved upon replacing the Cu-seed layer with the Cu-alloyed seed. The RC product could be reduced with 30% compared to the PVD base line. Physical analyses like de-wetting tests and time of flight secondary ion spectroscopy (TOF-SIMS) were respectively used to gauge the adhesion improvement, and to measure the diffusion of aluminium in copper. It is shown that the aluminium is staying near the ALD TaN interface after anneal explaining the relative small increase in line resistance and the reduced copper mobility near the interface.

An analysis of the weakest-link model for early electromigration failure

The application of the weakest-link or failure-unit model to electromigration failure is discussed in relation to a simple model that should describe the early failures in fine-line, as-patterned aluminium reasonably well. The earliest failures are expected to be due to the presence of at least one polygranular cluster longer than some critical (Blech) length, while the next earliest are assumed to arise from linked shorter clusters. Using a simple model of the microstructure, the probability density function for the number of each of these types of failure-unit is determined as a function of the linewidth. For this simple model the overall failure distribution may be calculated essentially exactly using the Theory of Runs; consequently we can compare these exact results with some common approximations. It is demonstrated through Jensen's inequality that a common approximate method is in fact a rigorous upper bound for the failure distribution. The model exhibits the expected increase in median-time-to-failure and deviation-in-time-to-failure values with decreasing linewidth when forcing a lognormal distribution. Although this would suggest an eventual decrease in reliability with scale reduction, the exact results show that this is not the case.

Effects of failure criteria on the lifetime distribution of dual-damascene Cu line/via on W

Electromigration lifetime was studied on 0.23 μm wide Cu dual-damascene lines connected to underlying W lines with a TaN/Ta liner and SiNx/SiO2 insulator. The failure criteria used to study electromigration lifetime were based on the increase in test line resistance. Over 900 samples were tested to observe early electromigration Cu lifetime. Experimental results show that the lifetime distribution of samples tested using a failure criterion of 1% (3 Ω) resistance increase at the test temperature is best described by a trimodal function. However, the lifetime distribution of samples tested using a failure criterion of 50% is best described by a bimodal function. This difference in lifetime distribution is due to three types of observed deviant line resistance behaviors (plateau, fluctuating, and uphill) of certain samples which are caused by different types of void growth and a variation in liner stability.

Elasticity and resistivity study on the electromigration effects observed in aluminum–silicon–copper alloy thin films

Abstract The early electromigration (EM) processes in the Al–Si(Cu) thin films several tens of nanometers thick deposited on Si reed substrates were investigated by means of the simultaneous anelasticity and electrical resistivity measurements below 360 K. The grain growth, the shortening of a ⊥ and the probable lengthening of a ∥ take place during the EM tests at the current density of 10 8 A/m 2 , where a ⊥ and a ∥ denote the atomic plane spacing normal to and the one parallel to the film surface, respectively. The activation energy, E GB , for the grain growth is found to be as low as 0.32 eV, possibly suggesting that E GB in very thin nanometer-thick films is much lower than that found in thin micrometer-thick films. The increase in the Young’s modulus of the Al–Si(Cu) thin films takes place during the EM tests, suggesting that the grain growth is responsible for it. The decrease in Q −1 observed at 330 and 360 K may be explained by a decrease in the grain boundary regions too. The increase in Q −1 found during the EM tests at 300 K is possibly associated with an increase in a certain anelastic process in the grain boundary regions.

Effect of cracks in TiN anti-reflection coating layers on early via electromigration failure

Early electromigration failure has been recognized as a generic phenomenon in W-plug via structures. Previous studies have attributed early failure to the properties of the Al layers in contact with the plug, via delamination or to current density distributions in the structure. In this paper, we investigate early failure phenomena in W-plug vias and report a novel early via failure induced by the presence of a crack crossing the lower metal level TiN anti-reflection coating layer in the vicinity of W-plug. The cracks in the TiN shunting layer may cause large resistance jumps of 250–1000 Ω. Resistance simulation results show that the magnitude of resistance jump increases with the size of the crack. The source of the TiN cracks is discussed.

Early electromigration effects and early resistance changes

This paper reviews different known physical phenomena acting during electromigration, such as changes in the mechanical stress of the metal line, void growth and precipitation/dissolution of alloy elements (Cu, Si) and their effects on early resistance changes. The superposition of all these phenomena is also discussed to describe the typical early resistance changes detected in Al–Cu lines of the present technology.

Bath Additive and Current Density Effects on Copper Electroplating Fill of Cu Damascene Structures

AbstractCopper electroplating has become the leading technology for gap fill of damascene structures on advanced interconnects. A key to developing a robust electroplating process that produces deposits free of voids and seams is understanding the role of the additive components, i.e., levelers, brighteners and wetting agents, and their relative diffusion/adsorption characteristics. Additionally, obtaining insight about the cathodic current/potential relationship is critical for maximizing the effectiveness of the additive components.Our results indicate that bath additive composition and the plating parameters (plating pulse frequency, and current density play critical roles in the outcome of the Cu fill. SEM cross sectional analysis of timed partial electroplating fill studies show two types of fill, 1) conformal and 2) bottom-up. Conformal fill of features smaller than 0.25 μm with an aspect ratio (AR) of 4.0 tends to form seam voids in the center of the structure. These seam voids can lead to early electromigration failures. On the other hand, bottom-up fill leads to a void free Cu deposit within the feature.

Bath Additive and Current Density Effects on Copper Electroplating Fill of Cu Damascene Structures

ABSTRACTCopper electroplating has become the leading technology for gap fill of damascene structures on advanced interconnects. A key to developing a robust electroplating process that produces deposits free of voids and seams is understanding the role of the additive components, i.e., levelers, brighteners and wetting agents, and their relative diffusion/adsorption characteristics. Additionally, obtaining insight about the cathodic current/potential relationship is critical for maximizing the effectiveness of the additive components.Our results indicate that bath additive composition and the plating parameters (plating pulse frequency, and current density) play critical roles in the outcome of the Cu fill. SEM cross sectional analysis of timed partial electroplating fill studies show two types of fill, 1) conformal and 2) bottom-up. Conformal fill of features smaller than 0.25 μm with an aspect ratio (AR) of 4.0 tends to form seam voids in the center of the structure. These seam voids can lead to early electromigration failures. On the other hand, bottom-up fill leads to a void free Cu deposit within the feature.

Mechanical stress evolution and the blech length: 2D simulation of early electromigration effects

Modeling of stress and electromigration at the microscopic level, in confined interconnect metallic lines with tungsten studs, can very well account for the resistance behaviour in time. The resistance change at saturation for a metallic line with blocking boundaries at both ends can be related, according to the model, to threshold product (jL) c found by Blech [1].

The influence of TiN ARC thickness on stress-induced void formation in tungsten-plug vias

This paper describes a new failure mechanism in W-plug vias, and the process conditions which enhance it. For submicron technologies, the limiting factor in interconnect reliability performance is increasingly dominated by the electromigration resistance of tungsten-plug vias. We have observed that under certain experimental conditions, early electromigration failures can be induced in via-chain test structures. We have demonstrated that these are caused by stress-induced void formation in the metal line immediately beneath the tungsten plug. This is thought to be due to highly localized film stress around the base of the plug, which can be minimized by increasing the thickness of the TiN anti-reflective coating (ARC). This has the effect of reducing the incidence of early failure by suppressing the stress-induced failures.

Paradoxical predictions and a minimum failure time in electromigration

A paradox arises when the two-parameter log-normal distribution is used to predict early electromigration lifetimes of a two-level structure with Ti–AlCu–Ti stripes and interlevel W stud-vias. The paradox is a direct consequence of the observed increase in the log-normal sigma (σ) as the current density decreases and/or as the maximum allowed resistance change increases. The increase in σ implies that the first failures from equal and large sample sizes are expected to occur at low current densities rather than at high current densities. Similarly, for example, samples at relatively low cumulative failure are expected to fail at high levels of resistance change before failing at low levels of resistance change. This apparent paradox is resolved by testing a large set of samples and fitting the failure data to the three-parameter log-normal distribution. The third parameter, an incubation time or a minimum time required before failure can occur, is shown to increase as the maximum allowed resistance change increases.

Early Failure Sites and Electromigration

ABSTRACTBy definition, half of all interconnects fail before the measured mean time to failure (t50) is reached. To predict early failures the basic reactions occurring in the metallization and its environment must be understood. To this end, fatal interconnect failure sites were characterized by Auger electron spectroscopy, atomic force microscopy and backscattered scanning electron microscopy. CVD silicon dioxide passivation layer/fatal void interfaces of typical early failure voids were characterized and compared to a typical late failure void interface. The topographies of these fatal voids were also quantitatively compared to increase our understanding of early failure sites and electromigration.

Early Electromigration Failure in Submicron width, Multilayer Al Alloy Conductors: Sensitivity to Stripe Length

ABSTRACTThe microstructure of Al alloy integrated circuit conductors strongly affects electromigration failure of the metallization. For submicron linewidths, the microstructure is usually near - bamboo, consisting of alternate polycrystalline and bamboo segments. These polycrystalline segments appear to be much more susceptible to electromigration - induced voiding than the bamboo regions. As a result, microstructural related early failures are a significant concern. In this study we systematically vary line - length to investigate the impact of random microstructural variations on the failure distribution parameters of narrow, multilayer (Ti/TiN/Al/TiN) Al alloy conductors. We show that early failures can occur in 0.6 μm wide stripes. The impact of early void formation on conductor failure, however, is dependent on the resistance failure criterion. By increasing the value, early failures may be eliminated in long line - lengths, suggesting that the resistance failure criterion may provide a means to control the impact of early voiding on the electromigration failure.