Dual Gate Research Articles

P‐32: Dual Gate Amorphous Silicon Thin Film Transistor Technology for High Brightness and High Frame Rate Outdoor Display Panels

In this paper, we present the development of a dual‐gate (DG) architecture for hydrogenated amorphous silicon thin film transistors (a‐Si:H TFTs). The aim is to address the challenges of low on‐state current (Ion) and light‐induced degradation in traditional single‐gate (SG) TFTs. The experimental results demonstrate that the DG‐TFT exhibits significantly higher Ion compared to the SG‐TFT, and the improvement depends on the thickness of the top gate insulator. Additionally, the threshold voltage (Vth) can be adjusted by applying the top gate voltage, allowing for a full‐ swing modulation coefficient of approximately 0.2. To ensure long‐term stability, a light‐blocking layer has been incorporated as the top gate electrode, enabling the DG‐ TFT to maintain its initial properties even under intense illumination conditions of up to 28,000 nits.

Phosphorene nanoribbon field effect transistor with a dual material gate

In this paper, we present a dual-material gate phosphorene nanoribbon field-effect transistor (DMG-PNRFET) that combines the advantages of a PNRFET with a DMG configuration. In this structure, the difference in the work function creates an extra barrier for band-to-band tunneling from the valence band (VB) to the conduction band (CB) inside the channel leading to lower off-currents. An illustration for transmission coefficients with relevant band diagrams is included to demonstrate energy-resolved current spectrum and tunneling emissions within the transport window for both on and off-states. Results also show that DMG-PNRFET possesses a higher ION/IOFF ratio, delay, and power delay product (PDP) compared to a conventional PNRFET. Hence, the DMG-PNRFET is better suited for digital applications. Our simulations rely on combining the density functional-based tight binding method with the non-equilibrium Green’s function.

Linearity and intermodulation distortion analysis of single and dual metal gate junctionless transistor

Linearity and intermodulation distortion are very crucial parameters for RFICs design. Therefore, in this work, a detailed comparative analysis on linearity and intermodulation distortion of single metal (SMG) and double metal (DMG) double gate junction less transistor (JLT) is done using TCAD silvaco suite. Furthermore, the effects of temperature fluctuation, gate length variation, and gate material engineering on the linearity performance of both devices are also studied. A few significant figures of merit, including Voltage Intercept Point 2 (VIP2), Voltage Intercept Point 3 (VIP3), Third Order Intercept Power (IIP3), 1 dB Compression Point (P1dB), Third Order Intermodulation Distortion (IMD3), and the transconductance derivative parameters First Order Transconductance (gm1), Second Order Transconductance (gm2), and Third Order Transconductance (gm3) are used to assess the device linearity and intermodulation distortion of SMG and DMG JLT's. The findings show that higher VIP2, VIP3, IIP3, 1-dB compression point and lower gm3, IMD3 values are obtained for the SMG JLT device when compared to its counterpart DMG JLT. SMG JLT, which assures strong linearity and low distortion.

P‐77: A Novel Frequency Doubling Technology with Adaptive Dither

In this paper, in order to improve the refresh rate of large‐size LCD displays, a new optimized driving scheme combined with new GOA timing is implemented in hardware platform, which is called adaptive scanning for frequency multiplication (ASF) technology, and it can be applied to TV, MNT, NB and other fields. Firstly, this paper introduces the basic principle of Dual Line Gate technology (DLG), which is widely used, and analyzes its advantages and disadvantages. And then ASF technology is proposed to solve the disadvantages of DLG technology. The new optimized driving scheme mainly applied inter‐frame adaptive dither algorithm(ADA), odd and even frame interlaced compensation algorithm(OEC) and application mode for intelligent detection of pictures. A prototype driving circuit was fabricated, and various detection tests have been implemented. The results show the refresh rate is doubled without increasing hardware resources, and this technology avoids the loss of image quality.

Design of high-K dielectric HSS-DMG Junctionless FinFET using hetero GOS for nanoscale application

This article presents a detailed investigation of the High-K dielectric horizontal stack spacer (HSS) dual material gate junction-less FinFET device for analog and RF application using the gate oxide stack (GOS) approach. At first, the impact of the horizontal stack spacer (HSS) with different high-K spacer materials are investigated by placing different dielectric material like HfO2, SiO2, Si3N4, and TiO2 on the horizontal spacer. The simulation results of the device indicate that the High-K dielectric HSS makes the device high stability toward the leakage current and static power dissipation at the sub-nano scale regime. The DC characteristics of the device are also investigated alongside the AC/RF characteristics. The proposed device predominantly improves performance in terms of parameters like subthreshold swing, Ion/Ioff, and DIBL. The proposed device shows a high ON current of 8.56 × 10−5 A μm−1, which is about 15% higher than the existing literature, and the device also makes a notable impact on the leakage current by restricting it to 9.635 × 10−12 A/μm. The simulation of the device is carried out with optimization of the doping to investigate and improve the device’s performance. The device shows an excellent improvement in performance which is highly suitable for future-ready device applications.

P‐74: Study on mechanism of ΔVp impact on picture quality and optimization

Color shift or marginal fringe appear in the bilateral alternating drive mode of Dual Gate structures, which is the impact of ΔVp between the near and far points of gate in positive and negative frames on the brightness uniformity. This essay discusses the mechanism analysis and the GOA design optimization.

P‐24: Ultra‐low power consumption notebook LCD with high on‐state current metal oxide device

Dual gate device with mobility of 20cm2/Vs has been applied to improve power consumption of oxide products, the devices show high on‐state current of more than 45uA, good uniformity of ΔVth 1.03V, PBTS of 2.18V. The optimized pixel design of 14inch WQXGA achieves high aperture ratio of 74% and transmittance of over 9.5%. This 120Hz demo with brightness of 150nit can significantly reduce power consumption by 65%, from 2.1W to 1.27W.

Hi-gMISnet: generalized medical image segmentation using DWT based multilayer fusion and dual mode attention into high resolution pGAN

Objective. Automatic medical image segmentation is crucial for accurately isolating target tissue areas in the image from background tissues, facilitating precise diagnoses and procedures. While the proliferation of publicly available clinical datasets led to the development of deep learning-based medical image segmentation methods, a generalized, accurate, robust, and reliable approach across diverse imaging modalities remains elusive. Approach. This paper proposes a novel high-resolution parallel generative adversarial network (pGAN)-based generalized deep learning method for automatic segmentation of medical images from diverse imaging modalities. The proposed method showcases better performance and generalizability by incorporating novel components such as partial hybrid transfer learning, discrete wavelet transform (DWT)-based multilayer and multiresolution feature fusion in the encoder, and a dual mode attention gate in the decoder of the multi-resolution U-Net-based GAN. With multi-objective adversarial training loss functions including a unique reciprocal loss for enforcing cooperative learning in pGANs, it further enhances the robustness and accuracy of the segmentation map. Main results. Experimental evaluations conducted on nine diverse publicly available medical image segmentation datasets, including PhysioNet ICH, BUSI, CVC-ClinicDB, MoNuSeg, GLAS, ISIC-2018, DRIVE, Montgomery, and PROMISE12, demonstrate the proposed method’s superior performance. The proposed method achieves mean F1 scores of 79.53%, 88.68%, 82.50%, 93.25%, 90.40%, 94.19%, 81.65%, 98.48%, and 90.79%, respectively, on the above datasets, surpass state-of-the-art segmentation methods. Furthermore, our proposed method demonstrates robust multi-domain segmentation capabilities, exhibiting consistent and reliable performance. The assessment of the model’s proficiency in accurately identifying small details indicates that the high-resolution generalized medical image segmentation network (Hi-gMISnet) is more precise in segmenting even when the target area is very small. Significance. The proposed method provides robust and reliable segmentation performance on medical images, and thus it has the potential to be used in a clinical setting for the diagnosis of patients.

Self-Powered cobalt nanocluster decorated flexible graphene based Tribo-Sensors for respiratory diagnosis of critical asthma patient

Self-powered ultrafast sensors have received much attention for sustainable operation without any external power source in the Internet of Things (IoT) platform. This paper proposes faster responsive, highly sensitive triboelectric nanogenerator (TENG) sensors based on few layered nitrogen-doped graphene anchored with cobalt nanocluster (Co-N-Gr) to detect the relative concentration of target species, their proximity analysis, and monitor malfunction of human respiration in real-time. Herein, to understand the sensing mechanism, P-type behaviour of this active material is verified under the FET platform by reducing the leakage current density via the implementation of dual dielectric gate (NiO (200 nm)-SiO2 (10 nm)) oxides leading to better control over channel mobility. The device exhibits maximum sensitivity of around 4722 % at zero bias conditions with excellent response and recovery time of 1.16 s and 1.39 s, respectively which falls within the range of standard human breathing frequency. The triboelectric nature of the sensor device at 1 V bias under natural breathing exhibits a high sensitivity (39.56 %) towards relative humidity of 10–90 % with excellent stability over 13 h. In addition, our TENG sensor is highly sensitive towards NOx content upto ppb levelwhich can improve reliability towards asthma detection as NOx content is relatively higher in asthma patients. This approach provides an integrated platform not only towards selective detection of NOx content as well as to identify the individual breathing strength. Furthermore, as-fabricated self-powered device demonstrates its potential in differentiating various respiratory status and has the capability to detect acute exacerbation of chronic obstructive pulmonary disease (AECOPD) via a distinct pattern recognition. Therefore, the work paves the way to design a low-cost flexible device fabrication on Kapton substrate integrable with wearable appliances for commercialization.

TCAD simulation study of dual ferroelectric gate field-effect transistors with a recessed channel geometry for non-volatile memory applications

TCAD simulation study of dual ferroelectric gate field-effect transistors with a recessed channel geometry for non-volatile memory applications

Performance analysis of dual material control gate cavity on source electrically doped TFET biosensor for biomedical applications

The fabrication complexity, low sensitivity, detection speed, and costs associated with nanoscale devices have been significant concerns in the development of label-free biosensors. To address these issues, we report a novel dual material control gate cavity on source electrically doped tunnel field-effect transistor (DM-CG-CS-ED-TFET) for label-free biosensors. In this regard, the n+ drain and p+ source regions within the proposed device are induced by applying polarity gate (PG) bias voltages of PG-1 = +1.2 V and PG-2 = −1.2 V, respectively, across the respective polarity gate electrodes. This approach not only overcomes doping control issues but also avoids thermal budget constraints and minimizes fabrication complexity when compared to conventional TFET. For biomolecule sensing in the device, a nanogap cavity is created within the gate dielectric by selectively etching a portion of the polarity gate dielectric layer towards the source side. The performance of the proposed biosensor device is evaluated based on the variations in carrier concentration profile, energy band diagram, electric field, transfer (IDS - VGS) characteristics, drain current (IDS) sensitivity, ON-state current (ION) sensitivity, switching ratio (ION/IOFF) and subthreshold swing (SS) sensitivity. The sensitivity of the device is also investigated based on nano-cavity dimensions, practical challenges such as various filling factors, and the step profile generated from the steric hindrance. Moreover, the effect of temperature on sensitivity has also been investigated. For this, various biomolecules including Streptavidin (k = 2.1), APTES (k = 3.57), ferrocytochrome c (k = 4.7), keratin (k = 8) and Gelatin (k = 12), have been investigated for their performance using Silvaco ATLAS device simulator. The simulation results demonstrate that the proposed biosensor is a viable option for biosensing applications in biomedical engineering.

Performance assessment of Si based dual metal double gate vertical TFET biosensor

This piece of work highlights the application of dual-metal double-gate VTFET as label free biosensor having enhanced switching ratio, current driving capability and sub-threshold swing and consequently high sensitivity. The use of dual-material namely tunneling gate and auxiliary gate in this device leads to high switching ratio (ION/IOFF) and low sub-threshold swing (SS). In order to observe outcome of this suggested biosensor, various biomolecules dielectric constant have been considered and examined with respect to electric field, energy band diagram, drain current characteristics and sub-threshold potential profile. Neutral biomolecules with a higher dielectric constant exhibits greater drain current sensitivity against biomolecules having lower dielectric constant. Here effect of cavity interface charge on the sensitivity performance of the proposed biosensor device is also verified. This fabrication feasible homo vertical TFET based biosensor gives best sensitivity performance for K = 12, both for the current (5.44 × 105) and transconductance (3.14 × 105) with the minimal sub-threshold swing of 9.9 mV/decade. Silvaco, a commercially accessible TCAD tool is used to investigate the proposed structure.

Dual targeting Boolean logic gate CAR-T cells for selective tumor antigen encounter exert potent antitumor efficacy in advanced adrenocortical carcinoma

Dual targeting Boolean logic gate CAR-T cells for selective tumor antigen encounter exert potent antitumor efficacy in advanced adrenocortical carcinoma

Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Design, simulation and analog/RF performance evaluation of a hetero-stacked source dual metal T-shaped gate tunnel-FET in thermally variable environments

Enabling of CMOS Circuit using Dual Material Gate Germanium Pocket Induced FDSOI MOSFET

This research presents a comparison of the electrical performance of a double-side induced germanium-pocket (IGP) FD-SOI MOSFET and a dual material gate IGPFDSOI (DIGPFDSOI). The electrical performance is reviewed by comparing the device parameters like drain current, band diagram, lateral electric field, surface potential, and work function of the gate material. The proposed structure exhibits excellent characteristics compared to the IGPFDSOI MOSFET. The proposed structure has a greater Ion/Ioff ratio, a lower subthreshold slope, reduced capacitance, and an elevated cut-off frequency. The implementation of a dual metal gate is considered a superior method in comparison to FD-SOI technology because it effectively reduces the negative effects of scaling. A study is being done to analyze the differences in the work functions of metal gates to evaluate the effectiveness of the proposed construction. The comparison evaluation shows that the suggested design can be used for both digital and analog tasks because it has a higher switching frequency and a better cut-off frequency. Apart from this, the proposed structure can also be implemented without making substantial changes to the conventional FD-SOI MOSFET fabrication process flow. Here, we are using n-type and p-type DIGPFDSOI MOSFETs to make a CMOS converter circuit. Sentaurus TCAD is used to simulate and analyze the performance of the proposed structure.

Sensitivity improvement in gate engineered technique dielectric modulated GaN MOSHEMT with InGaN notch for label-free biosensing

This paper focuses on the impact of gate-engineered dielectric-modulated GaN MOSHEMT with InGaN notch on sensitivity enhancement for label-free biosensing. The novelty of this study utilizes the charge-plasma effect induced by the dual metal gate (DMG) technology adopted to realize the effect of sensitivity on different biomolecules. Moreover, the presence of an InGaN notch enhances carrier confinement in the 2DEG, subsequently improving the threshold voltage and device sensitivity at the AlGaN/GaN interface. The maximum drain current, IDS of 4.602 A mm−1, transconductance, gm of 18 mS/mm, and sensitivity has been improved by around 61% for the Uricase biomolecule by introducing the dual metal gate technology. The work function difference of the two metal gates suppresses the Short Channel Effects (SCEs) and hot carrier effects in DMG MOSHEMT, thereby screening the drain potential variations by the gate near the drain. In addition, increased carrier transport efficiency results from a more consistent electric field along the channel. All the simulations are carried out using the Sentaurus TCAD simulator, and the results imply the feasibility of gate-engineered GaN MOSHEMT for label-free biosensing.

The Effect of a Dual Oxide - Dual Gate Material and a Sensitivity Analysis on the Performance of a Junctionless Tunnel FET

The Effect of a Dual Oxide - Dual Gate Material and a Sensitivity Analysis on the Performance of a Junctionless Tunnel FET

Impact of Dual-Gate Configuration on the Endurance of Ferroelectric Thin-Film Transistors With Nanosheet Polycrystalline-Silicon Channel Film

This work explores the characteristics of ferroelectric thin-film transistors (FeTFTs) utilizing an asymmetric dual-gate (DG) structure in both single-gate (SG) and DG operation modes. In the transfer characteristics, DG mode exhibits a memory window (MW) of 1.075 V, smaller than SG mode’s MW of 1.402 V, attributed to the back-gate bias effect causing a reduction in the device’s threshold voltage. However, DG mode demonstrates superior endurance characteristics with 106 cycles compared to SG mode’s 105 cycles. Additionally, the increase in erase pulse voltage (VERS) exacerbates the polycrystalline-silicon channel lattice damage of FeTFT, resulting in subthreshold swing (SS) degradation. Nevertheless, the extent of SS degradation from DG mode operation is significantly lower than that of SG mode, contributing to the superior endurance of DG mode. The elevation of program pulse voltage (VPRG) induces imprint and charge-trapping effects in the top-gate ferroelectric dielectric, leading to reduced endurance. Due to the use of SiO2 as the back-gate dielectric in FeTFT, DG mode exhibits lower impacts of charge-trapping effects from the top-gate ferroelectric dielectric layer, resulting in better endurance compared to SG mode. The asymmetric DG structure provides greater tolerance in the selection of VPRG and VERS.

Enhancing Reliability of Short-Channel Dual Gate InGaZnO Thin Film Transistors by Bottom-Gate Oxide Engineering

Enhancing Reliability of Short-Channel Dual Gate InGaZnO Thin Film Transistors by Bottom-Gate Oxide Engineering

The improvement of device linearity in AlGaN/GaN HEMTs at millimeter-wave frequencies using dual-gate configuration

The linearity performance of the AlGaN/GaN high-electron-mobility-transistors (HEMTs) is critical for circuit applications especially at millimeter-wave frequencies. In this paper, we propose a new dual-gate (DG) configuration for linearity improvement at millimeter-wave frequencies. Using 2D simulation, we observed the improvement in device linearity by placing the additional DC gate in the source-gate access region. Adjusting the bias voltage of the DC gate modulates the horizontal electric field in the channel and controls the acceleration behavior of the channel electrons. Furthermore, such bias adjustment enhances the electron density in the channel to compensate for the transconductance (Gm) degradation. Both of these contribute to the flattening of the Gm profile for linearity improvement. The proposed DG configuration improves the C/I ratio by 10 dB compared to the conventional single gate (SG) device at 38 GHz. Additionally, a 60 % improvement in the cutoff frequency (fT) and maximum oscillation frequency (fmax) is obtained compared to the traditional DG configuration where the second gate is placed in the gate-drain drift region. This is mainly due to the reduction in gate capacitances from the redistribution of the electrons in the device. Such superior characteristics have shown great potential of the proposed device for high linearity applications at millimeter-wave frequencies.