Inflammation contributes to Alzheimer's disease (AD), but its stage-specific and amyloid-dependent patterns remain unclear. We analyzed 964 participants from the Bio-Hermes cohort (cognitively normal [CN]=404, mild cognitive impairment [MCI]=302, mild AD=258). Plasma levels of 32 cytokines, neurofilament light chain (NfL) and glial fibrillary acidic protein (GFAP) were quantified alongside core AD biomarkers. Associations with cognition, amyloid, apolipoprotein E (APOE) ε4, and clinical outcomes were assessed using analysis of covariance, partial correlations, and regression models. Twenty-four cytokines, NfL, and GFAP differed across cognitive groups. Amyloid stratification revealed a core amyloid-independent profile (14 cytokines + NfL) and a broader amyloid-specific profile including GFAP, interleukin (IL)-1β, and IL-18, implicating microglial inflammasome and astrocytic activation. Stage-dependent patterns suggested inflammation may act as early driver, concurrent process, or late amplifier. Paradoxical associations (e.g., eotaxin-2, IL-2R with better memory) and APOE ε4-linked immune differences indicated context-dependent roles. This exploratory study reveals biologically plausible, inflammatory heterogeneity in AD and highlights plasma cytokine profiles as candidate biomarkers and therapeutic targets, warranting investigation.

This letter presents a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 6$</tex-math> </inline-formula> amplifier multiplier chain (AMC) covering 87127 GHz, comprising a high-harmonics-rejection frequency tripler, a wideband driver amplifier (DA) with frequency selectivity, and an output power enhancement frequency doubler. A high-order high-pass filter (HO-HPF) with third-harmonic impedance matching is integrated at the output of the tripler to reject the unwanted harmonics by over 35 dBc. A multifunctional resonator is integrated at the DA output to achieve higher output power and wider operating bandwidth and is applied to the doubler input to weaken the influence of Miller effect. The <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 6$</tex-math> </inline-formula> AMC delivers a measured 8.6-dBm peak output power and better than 35-dBc harmonic rejection over 87127 GHz. Among the reported silicon-based W-band or D-band AMCs with extracted harmonic higher than 3, the AMC demonstrates the highest output power, the widest 3-dB operating bandwidth, and a comparable harmonic rejection.

The exponential growth of data center traffic, driven by artificial intelligence (AI) and high-performance computing, demands optical interconnect solutions that overcome the limitations of current packaging integration methods. The conventional bonding process often suffers from substantial parasitic effects, which degrade signal integrity and limit both bandwidth scalability and energy efficiency. Here, we present a monolithically integrated electronic-photonic transceiver fabricated for a 45nm CMOS-SOI platform, featuring a co-designed Mach-Zehnder modulator (MZM), driver amplifier, Ge-Si photodetector (PD), and transimpedance amplifier (TIA) within a single chip. By eliminating bonding interfaces in optoelectronic integration, the transmitter achieves a 64 Gbaud four-level pulse amplitude modulation (PAM-4) data transmission below the 5.8% overhead hard-decision (HD) forward error correction (FEC) bit error rate (BER) threshold of 3.8 × 10-3, while the receiver achieves a 64Gbaud PAM-4 data transmission below the 6.7% overhead KP4-FEC threshold of 2.4 × 10-4. The integrated tranceivers consume the total power consumption of 3.07pJ/bit at 128Gb/s. This work highlights the potential of silicon-based monolithic optoelectronic integration techniques for high-speed optical communication and interconnection, offering remarkable enhancements in system performance and scalability.

A broadband high gain driver amplifier with gain compensation for current-reuse

ABSTRACTA GaN‐on‐SiC‐based broadband driver amplifier operating in the C‐ and X‐bands from 5 to 12 GHz has been demonstrated. The MMIC has a typical small signal gain of 29.7 dB with a ±1.4 dB gain ripple. The input and output return losses are better than 10.5 and 8.8 dB, respectively. The average P is approximately 2.65 W with an OIP3 of 37.7 dBm, while the large signal gain is 22 dB. This design is distinguished by its low output power ripple and the low large signal gain fluctuations observed across the full frequency range of interest. Consistent load impedance matching at the output stage for the whole frequency range enabled an output power ripple less than ±1.1 dB and a large signal gain ripple less than ±0.6 dB at 10 dBm input power. This allowed for an output power density of at least 2.68 W/mm across the broad frequency range of 5–12 GHz. The typical power‐added efficiency is 26.4%. To the best of the authors' knowledge, this DA design exhibits the best combination of gain, output power density, gain ripple, output power ripple and output return loss in this frequency band.

This paper proposes a method for enhancing seismometer detection capabilities in the low-frequency range (on the order of mHz) by utilizing the seismometer’s Position output(PosOut) replacing the traditional broadband velocity output(VelOut). Theoretical analysis of Equivalent Input Noise(EIN) and noise transfer functions for two output configurations (VelOut and PosOut) reveals that while forward-path noise remains unaffected by the output change, the integrator and amplifier driver noises are significantly influenced. As a result, PosOut exhibits lower EIN at low frequencies but higher noise at higher frequencies. This is primarily due to the integrator shifting from the feedback path to the forward path, along with changes in the closed-loop system’s frequency response. Based on these findings, several noise optimization strategies are proposed. To validate the theoretical predictions, simulations based on the parameters of a commercial seismometer were conducted, confirming the noise shaping behavior under both output configurations. Experimental validation using four 3T seismometer further supports the theory, showing that the EIN of the PosOut is lower than that of the VelOut below 0.02 Hz, with PSD reductions of 7.5 dB to 10 dB at 1 mHz. The results indicate that the PosOut provides a significant advantage in detecting weak low-frequency signals, and offers a promising approach for both future seismic sensor designs and signal processing applications focused on low-noise, low-frequency detection.

This brief presents a fully integrated CMOS <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times 4$ </tex-math></inline-formula> MIMO RF transceiver (TRX) with single-channel bandwidth (BW) of 400 MHz in the 6 GHz band (5.925-7.125 GHz). In the receiver (RX) frontend, an improved noise-canceling low noise amplifier (LNA) and a cross-coupled transconductance <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$(G_{M})$ </tex-math></inline-formula> with IIP2 enhancement is implemented. In the transmitter (TX) frontend, a power amplifier driver (PAD) is integrated with cascade AM-PM distortion compensation to eliminate the AM-PM distortion. A hierarchical LO distribution network is employed in the 1-to-4 LO distribution chain to enhance the consistency among the LO branches. The single-chip TRX is reconfigurable for TDD/FDD operation, with the RX exhibiting a noise figure of 3.5-4.1 dB, a gain control range of 45 dB with 1 dB step and ±0.2 dB gain flatness. The TX output spectrum exhibits >32 dBc signal to noise ratio (SNR). The RX and TX error vector magnitudes (EVMs) are −30.2 dB and −30.5 dB, respectively, with 160 MHz BW 256QAM. A TX-to-RX PHY data-rate of 8.8 Gbps based on <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$4\times 4$ </tex-math></inline-formula> MIMO is achieved, with other major parameters comparable to the prior arts without resorting to digital calibration circuits.

In this letter, we present a high-speed, low-power bootstrapped class-B driver amplifier for liquid crystal on silicon (LCoS) applications. The amplifier, incorporating a dynamically adjustable bootstrapping control circuit, doubles the voltage driving range compared to traditional circuits, significantly enhancing system flexibility and performance in high-resolution environments. The design drives a 120-pF capacitive load with a slew rate of 13.65 V/µs and a settling time of 0.685 µs, while consuming only 7-µA quiescent current from a 5-V supply. Fabricated using a 0.18 µm high-voltage complementary metal-oxide-semiconductor (HV CMOS) process, the driver can power multiple pixel columns. Measurement results confirm the circuit's effectiveness in supporting holographic projection and display for LCoS technologies.

In this paper, a bidirectional RF front-end based on the WIN Semiconductor’s 100 nm GaAs pHEMT process that can support the extension of E-band vector network analyzers (VNA) is proposed. For E-band VNA extensions, an amplifier multiplier chain (AMC) with high output power and high harmonic rejection characteristics is required to effectively drive the following bidirectional passive mixer. In this design, the AMC includes a 20–30 GHz frequency doubler, an E-band frequency tripler, and an E-band balanced power amplifier. The frequency doubler features a push-push architecture to effectively improve the rejection characteristics of odd harmonics. Following this stage is a frequency tripler based on an antiparallel diode pair (APDP) topology, which includes a pair of power enhancement T-lines to improve the output power of the AMC. The output of the AMC is a balanced power amplifier with source degeneration inductors to enhance the amplifier’s bandwidth and stability. To further expand the bandwidth of the AMC, driver amplifiers with an integrated RC negative feedback network are included. Additionally, a compact matching network with bandpass characteristics is integrated between the doubler and tripler to enhance harmonic rejection performance. Measurement results indicate that the peak output power of the E-band AMC is 20.9 dBm, and the harmonics rejection is better than 25 dBc. The intermediate frequency bandwidth of the bidirectional RF front-end covers 100 MHz–8 GHz, and the corresponding up-conversion gain and down-conversion gain are better than -8.2dB and -8 dB, respectively.

This study examines the complex relationship between power prices and energy sources in Germany’s electricity market through an innovative combination of multifractal detrended cross-correlation analysis (MFDCCA) and copula modeling. Analyzing hourly data from 2015 to 2023, we investigate production values from conventional sources (lignite, hard coal, natural gas) and renewables (offshore/onshore wind, pumped storage hydropower). Our copula analysis reveals distinct patterns: offshore wind shows minimal monthly correlation with prices, while onshore wind exhibits strong seasonal negative correlation patterns. The MFDCCA uncovers deeper structural relationships, with fossil fuels displaying persistent long-range correlations and strong multifractal characteristics. Natural gas emerges as both a price driver and volatility amplifier, while wind generation contributes to price fluctuations at scale. Base load sources like lignite and hard coal demonstrate steady correlation structures, aligning with merit order theory. These findings gain particular relevance as Germany’s power market opens to smaller stakeholders, including private households accessing day-ahead prices. Our results suggest that while merit order theory remains fundamentally valid, modern energy markets require more sophisticated modeling approaches to capture their full complexity.

A V-band injection locking tripler with 26.8% locking range and 7.3-dBm output power in 65 nm CMOS

Measurement of power supply for design of experimental cyclotron in Yogyakarta (DECY-13), i.e. RF-generator 77.78 MHz, especially driver amplifier as important part, has been carried out, in order to minimize the reflected power. Starting from direct digital synthesizer (DDS) as exciter of the radio frequency (RF) wave, having power up to 20 W, the signal sent then to the driver, that has an amplifying factor of around 50. Output of driver works as input for final power of designed DECY-13, which needs about 10 kW of RF power supply for operating the cyclotron. Using network analyzer to get the best position of the RF-power-coupler, it was found the value of dee impedance equals to (50.9 - j0.3) Ω. The signal detected has the behavior as capacitively having value of around 6 nF, that showed by smith chart. An output of 0.8 W by DDS has resulted of 300W to the driver. By a pure resistance 50 Ω dummy load, the system can achieve final power of almost 10 kW.

This letter introduces a fully integrated broadband dual-mode reconfigurable driver amplifier (DA). DA can operate in analog DA mode (ADA-mode) and digital DA mode (DDA-mode) to meet different requirements for linearity and efficiency in various scenarios. A broadband reconfigurable output network enables the DA to operate from 2-4.5GHz providing impedance matching, power combining and harmonic rejection. The DA offers a maximum gain of 12dB with a 5-bit digital-control gain step in 1.6V supply. Measurement results demonstrate that the DA achieves an OP1dB of 8.5dBm with a drain efficiency of 13.1% in ADA-mode. In DDA-mode, the DA achieves a maximum output power of 10dBm with a drain efficiency of 30.8%. The gain error of proposed DA is less than 0.3dB. The DA is fabricated in 40nm CMOS process, and the active area is 0.16mm2.

This paper discusses the design of a driver amplifier operating in the Ku-band using a 130 nm SOI CMOS process. The amplifier consists of two stages: a cascode amplifier in the first stage for high gain, and a CS amplifier in the final stage for high OP1dB. In the cascode amplifier structure of the first stage, a series inductor is added between the CS and CG amplifiers to simplify input matching. This modification shifts the maximum Gm point of the cascode amplifier to a lower frequency, resulting in a high gain at the target frequency. The measured amplifier achieves a maximum gain of 13.7 dB and an OP1dB of −0.3 dBm. It consumes 12 mW of power at 1.2 V and occupies an area of 0.188 mm2, excluding the DC and RF pads.

This paper presents an S-band power amplifier (PA) operating in the 2.9~3.2 GHz range for 2nd harmonic-based target detection radar. The input and output matching networks utilize transmission lines and λ/4 open stubs at 2nd harmonic frequencies to effectively match the load impedance to the optimal power matching contours at fundamental frequencies while achieving high 2nd harmonic suppression characteristics. This design achieves these goals without simultaneously introducing additional insertion losses at the input and output. Single measurements of the fabricated PA demonstrate a maximum saturated power exceeding 40 dBm, power gain ranging from 11.6 to 13.3 dB, and 2nd harmonic suppression level of 58.6 dBc or better across the 2.9~3.2 GHz range. When employed as a driver amplifier in the transmitter system, the PA exhibits a 2nd harmonic suppression level of 60 dBc or better within the 3.0~3.2 GHz range, affirming its suitability for 2nd harmonic-based target detection radar applications.

In this paper, behavioral modeling of a driver amplifier is implemented by using S2P and S2D model setup. By using the standard silicon-based driver amplifier for obtaining the measured results of Scattering (S)- parameters and large signal parameters for temperatures 25°C and 85°C. These parameters are imported into the S2P and S2D models to perform the small signal and large signal analysis at 3 GHz frequency for temperatures 25°C and 85°C. Then, the simulated results are compared with the measured results to verify the efficient utilization of behavioral models. The novelty of this work deals with the simulation study of the characteristics of a silicon-based driver amplifier, which are obtained directly from the measurements. This proposed method is essential for performing hetero-integration of transceiver design, which can be further utilized to improve the efficiency of transceiver for high-frequency band. At last, the study of relative error performance analysis between measured and simulated results of different parameters is carried out and calculated value of NMSE (in %) for S11, S12, S21, S22, gain, pout, 1 dB compression point, ACP, 3rd harmonics, 4th harmonics, and 5th harmonics are 0.0083, 0.0055, 0.0086, 0.011, 0.0844, 0.814, 0.926, 0.71, 0.22, 0.012 and 0.070 respectively.

In order to meet the increasing demands of wireless communication for ISM bands, a 433 MHz transmitter RF front-end is designed using a 55 nm low-power CMOS technology. The circuits consist of an active mixer, a driver amplifier and a class-E power amplifier (PA). A double-balanced Gilbert active mixer is designed to realize binary phase-shift keying (BPSK) modulation. The driver is used to preamplify the modulated RF signals. The class-E PA adopts a parallel four-branch cascode structure to control the output power level. The load network of the PA is implemented through an off-chip circuit, in which a finite DC-feed inductance load network is selected to reduce the power loss. The mixer and driver are designed with a 1.2 V supply voltage, while the PA is operated at a 1.8 V supply voltage. The area of the chip is 0.206 mm × 0.089 mm, and the measured results show that it achieves a maximum output power of 2.7 dBm, with a total power consumption of 6.72 mW. At a drain efficiency (DE) of 34.5%, an S22 less than −10 dB over the frequency ranges from 393.79 MHz to 455.70 MHz can be measured for the PA. With 192 kbps BPSK data modulated at 433 MHz, the measured EVM is about 0.83% rms.

Filamentation has extensively been explored and is well understood at repetition rates &amp;lt;1 kHz due to the typical availability of multi-mJ laser systems at a moderate average power. The advent of high-power Yb-lasers opened new possibilities for filamentation research. However, so far, high average power Yb systems have mostly been explored to increase the driving pulse energy to several hundreds of mJ and not at significantly higher repetition rates. In this paper, we study, for the first time, long filaments at unprecedented high repetition rates of 10, 40, and 100 kHz using a 500-W Yb-doped thin-disk amplifier driver operating with sub-700 fs pulses. We compare the filament length, density hole, and fluorescence at a constant peak power but different repetition rates and find a strong dependence on filament length and density depletion with repetition rate. Our analysis reveals the emergence of a significant stationary density depletion at repetition rates of 40 and 100 kHz. The corresponding reduction in the breakdown threshold by increasing the laser repetition rate observed in our study signifies a promising avenue for enhancing the efficiency and reliability of electric discharge triggering in various scenarios. Using capacitive plasma probe measurements, we address the limitations of fluorescence imaging-based measurements and demonstrate a systematic underestimation of filament length. This work contributes to a deeper understanding of the interplay between laser repetition rates, filamentation, and heat-driven density depletion effects from high-repetition-rate high-power laser systems and will contribute to guiding future research, making use of filaments at high repetition rates.

The widening application of advanced digital infrastructure requires the development of communications technologies with increased data transmission rates. However, ensuring that this can be achieved in an energy-efficient way is challenging. Here we report an integrated complementary metal–oxide–semiconductor/silicon-photonics-based transmitter in which a switching current is applied to the passive-equalization-network-guided silicon Mach–Zehnder modulator, rather than driving a standard Mach–Zehnder modulator with a traditional voltage swing. This approach allows the total electrical energy to be selectively distributed to different frequency components by choosing an appropriate inductance and near-end termination impedance values. With the approach, we achieve 112 gigabaud—112 gigabits per second on–off keying and 224 gigabit per second pulse-amplitude modulation with four levels—transmission with energy efficiencies below picojoules per bit, and without the need for signal-shaping functions in the data source. We also investigate the bit error rate for different electrical and optical power conditions at 100 gigabaud, including the electrical power consumption of the driver amplifier.

A high-efficiency uniform/selective heating microwave oven was developed. Because the power amplifier requires high-efficiency characteristics to function as a microwave source, a free-standing Gallium Nitride (GaN) substrate was applied in this study. By applying a harmonic tuning circuit, an output power of 71 W and PAE of 73% were achieved in pulsed operation, and an output power of 63 W and PAE of 69% were achieved in CW operation. Moreover, we fabricated a prototype PA module that consists of an oscillator, a driver amplifier, PA, and other RF circuits. The output power was controlled by pulse width modulation to maintain high efficiency regardless of output power. We evaluated the arrangement of antenna polarizations to isolate each antenna. By suppressing the interference of output from adjacent antennas, it is possible to irradiate the object on the top surface of the antenna, thereby demonstrating heating characteristics with small temperature unevenness. The prototype microwave oven successfully demonstrated uniform/selective heating.