Diode Clamped Research Articles

Research on commutation identity between matrix converter and three-level inverter

The commutation strategy is the important content of matrix converter industrial application, for it not only affects the converter safe operation, but also is closely related to the input and output performance. In this paper, the matrix converter and the three-level inverter are compared on the perspective of three-level, the relationship between them is studied, and the logical correspondence of switch tubes in two topologies is established. By analyzing the switching sequence of the three-level inverter and equivalent the clamping diode, the two-step voltage-controlled commutation strategy is obtained, which proves the equivalence between the matrix converter and three-level inverter.

Analysis of Three Phase Nine Level Diode Clamped Multi Level Inverter

Compared to conventional inverter (square wave) multi-level inverter offers quality power owing to different voltage levels utilization in average and high voltage. Besides it also reduces Total Harmonic Distortion in the distributed system and dv/dt across power switches. This advantage is transcendently appropriate for cascaded diode connected converter that can be worked to create more number of levels using asymmetrical voltage source because of their integrated arrangement. However, this benefit no longer exist because it requires many dc links (batteries or rectifiers) which is costlier. Substitute method of implementing single low voltage floating DC link is to recompense voltage distortion using Neutral-Point-Clamped (NPC) converter. This NPC output and controlled floating single DC-link voltage along with controlled PWM strategy reduces the THD. This improves the bandwidth and make simpler the current control scheme. These motivated the study and analyze the performance of a Diode Clamp based three phase nine level multilevel inverterusingnovel PWM approaches in MATLAB 2014b and PROTEUS for hardware development. Thus low power prototype is developed and its performance is shown.

Design and Analysis of STATCOM for Reactive Power Compensation using Three Phase Multilevel Inverter

This paper proposes the concept of reactive power compensation with the aid of STATCOM (static synchronous compensators) and three phase multilevel inverter. The classification of multilevel inverters under three major types which are H-bridge inverter, flying capacitors-based inverter and diode clamped multilevel inverter. Among these multilevel inverters, the diode clamped type is stressed in this paper due to its capability to process 3-phase output in the absence of any input. Here the reactive power is compensated using 7-level based multilevel inverter with diode clamps are made utilizing the capacitors banks, diodes and switches which would therefore abates the voltage stresses and harmonics resulting in higher efficiency of the power system. Besides the functioning of multilevel inverter, STATCOM is also utilized to improve the regulation of reactive power flow and thereby, enhances the stability under transient condition of a power system. Subsequently, the compensated seven level output is procured by the sinusoidal PWM technique.

Harmonic spectra of BLDC motor supplied by a solar PV multilevel inverter

<p>The multilevel inverters have been used especially in renewable energy aspects in order to assess total harmonic distortion (THD). THD is considered to produce a good quality of current signal of BLDC motor drive. In this paper, a solar PV inveter fed brushless DC (BLDC) motor drive is discussed considering two topologies of three phase multilevel inverters. These topologies are flying capacitor and clamped diode inverters. The inverter efficiency and output power have an effectiveness on THD values. A boost dc to dc converter using incremental conductance maximum power point tracking (INC-MPPT) is implemented with a solar PV. The mathematical model of the proposed systems ares tudied via simulation using Matlab/Simulink. The simulation results of a BLDC motor based on two multilevel inverters are compared with each other considering the THD and the utilization of the dc-bus voltage, the comparition verified that the clamped diode inverter has a better harmonic spectra.still the overshoot is a little bit high in the two types of inverter that are proposed. </p>

Online monitoring of IGBT junction temperature based on Vce measurement

In this paper, an online junction temperature monitoring method based on the on-state voltage under high collector current density measurements for IGBT power modules is proposed. Unlike the conventional junction temperature monitoring method, the presented method can extract the junction temperature during operation without altering the modulation strategy or topology of the converter. The proposed method is verified by simulations and the JEDEC-51 standard recommended approach. To accurately extract the on-state voltage during operation, a measurement circuit that combines the advantages of both the active MOSFET clamp and the diode clamp is designed and tested. It has been shown to have good accuracy and a rapid response time. After the calibration results are obtained, the presented method is applied to a three-phase voltage source converter controlled by a closed-loop SVPWM modulation strategy.

A method to improve the reliability of three-level inverter based on equivalent input disturbance and repetitive control combinations

The research and application of three-level inverters and related technologies are the mainstream development of modern power electronics technology. However, due to the influence of nonlinear load and dead zone effect, the output voltage waveform will be severely distorted. In this paper, based on the harmonic problem appearing in the voltage, it is proposed to apply the repetitive control with equivalent input disturbance (EID) in the diode clamp type three-level inverter to obtain a smooth and stable output voltage waveform. The effectiveness of the control method is verified by simulation and experiment. The results show that this combined control method can effectively suppress the periodic and non-periodic disturbances in the system and improve the reliability of the whole system.

Comprehensive Analysis, Design, and Experiment of Shoot-Through Faults in MMC Based on IGCT for VSC-HVDC

Modular multilevel converter (MMC) based on integrated gate commutated thyristor (IGCT) with high reliability, low cost, and voltage drop is a promising choice for high-voltage dc transmission based on the voltage-source converter. This article gives a comprehensive analysis, design, and experiment of shoot-through faults in IGCT-MMC. First, the designed structure of the submodule based on the IGCT (IGCT-SM) is introduced and an equivalent circuit is established with the accurate estimation of the stray inductances. Then, the failure processes of devices and the behavior of the clamping diode are discussed in detail. Meanwhile, the mechanical stress of the connecting copper bar is analyzed during shoot-through faults. After that, an experimental platform is built for performing the shoot-through faults. Both tests with switching action and without switching action are carried out under the dc-link capacitor and voltage with 10 mF and 2.5 kV. The results show that although IGCT cannot turn off the fault current, it can withstand the fault current. The whole structure maintains stable without any cracked housing package or copper bars under the surge current of 266 kA/0.40 ms. The 24-h short-circuit test under 3.15 kA shows that failed IGCT has an extremely low on-state voltage of not more than 1.2 V and is suitable for bypassing the faulty submodule when a destroyed shoot-through fault occurs.

Isolated High Step-Up Dual-Flyback DC–DC Converter with a Resonant Voltage Multiplier

This article proposes an isolated high step-up dual-flyback DC–DC converter with a resonant voltage multiplier. The proposed converter achieves galvanic isolation and high voltage gain by adopting dual-flyback structure and voltage multiplier. The energy of the leakage inductors is recycled and the maximum voltage of main switch is clamped to low voltage by the clamping diode. Also, the diodes of voltage multiplier and the output diode have low voltage stress. To alleviate the surge current and reverse-recovery losses at the voltage multiplier, current resonance is utilized at the voltage multiplier. Experiments conducted on a 120 W 24 V/200V laboratory prototype are provided to verify the analysis and performance of the proposed converter.

New Simplified and Generalized Three-Dimensional Space Vector Modulation Algorithm for Multilevel Four-Leg Diode Clamped Converter

This article aims to propose a new simplified and generalized three-dimensional space vector modulation (3DSVM) for four-leg multilevel diode clamped converter (FL-DCC). The idea is to use the three-dimensional space vector diagram of the multilevel FL-DCC in <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">αβγ</i> space, while all calculation stages of the 3DSVM algorithm will be carried out in a new frame called <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ρστ</i> . The proposed 3DSVM algorithm provides, for any inverter level, 1) simple way to calculate the duration time; 2) automatic generation of the adjacent switching states; 3) balancing the dc capacitor voltages, and 4) switching sequence definition without prism and tetrahedron identification stage. All 3DSVM steps are implemented in only one sector, thanks to the proposed new reference voltage vector. Such feature makes possible to build a generalized 3DSVM that can be implemented with minimum computational burden in simple embedded digital platforms. Simulation and experimental results are provided to demonstrate the proposed concept.

Measuring and Separating Conducted Three-Wire Emissions From a Fault-Tolerant, NPC Propulsion Inverter With a Split-Battery Using Hardware Separators Based on HF Transformers

Conducted emissions on the traction battery's power cables in EVs must be limited to avoid unwanted electromagnetic interference (EMI). When designing an EMI filter, it is advantageous to have information of the common mode (CM) and differential mode (DM) noise levels. This article deals with the measurement and separation of the dc side's three-wire DM/CM noise of a fault-tolerant three-level neutral-point-clamped (NPC) inverter with a split-battery system. Two hardware separators, based on small-circuit highfrequency transformers, were developed to identify the dc side's CM, line-DM, and phase-DM noise levels. Their characterized CM and DM rejection ratios for the frequency range from 150 kHz to 110 MHz are at least $-$ 33 and $-$ 21 dB, respectively. The separated noise of the NPC inverter was measured, using an inductive load, when operating the inverter with three-level and two-level modulation, resembling normal operation and a possible operation under fault, respectively. A simple three-wire CM model of the used testbed and the DM power module oscillation were derived to validate the separated noise's resonance peaks/valleys. It has been seen that the CM noise is dominant, especially below 10 MHz, except for the power module oscillations. Furthermore, when using the two-level modulation, in the case of a clamping diode fault, the noise levels are increased by about 3 dB.

A SVPWM Control Strategy for Capacitor Voltage Balancing of Flying Capacitor Based 4-Level NPC Inverter

A Space Vector Pulse Width Modulation (SVPWM) control strategy is implemented for capacitor voltage balancing of Flying Capacitor (FC) based 4-level Neutral Point Clamped (NPC) inverter. This flying capacitor based 4-level NPC inverter is developed for medium voltage and high power applications. This system includes 6 power switching devices, 2 clamping diodes and 2 flying capacitors per leg. The flying capacitors ensure to operate inverter normally and all the switching devices share the voltage stresses in identical manner. Also it controls the voltage across each capacitor and maintained at Vdc/3 times of applied dc voltage. The proposed SVPWM method takes advantage of utilizing redundancy switching states to control and balance the voltage across the capacitor using nearest switching state vector selection method. Moreover, this system provides reduced total harmonic distortion (THD), and minimized voltage stress. The control technique is implemented without using any look-up tables or effective logic tables or trigonometric functions. The simulation and experimental results of this proposed verified are verified using Matlab-simulink and FPGA controller respectively.

Open-Switch and Open-Clamping Diode Fault Diagnosis for Single-Phase Five-Level Neutral-Point-Clamped Inverters

In this article, a fast and efficient open-circuit switch and clamping diode fault diagnosis for neutral-point-clamped inverters is proposed. Multilevel converters employed in safety-critical applications should include fault-tolerant capability, where fault diagnosis plays a vital role. The proposed fault diagnosis algorithm is based on failure mode analysis, which is a logic-based approach. The required signals and measurements are available in the healthy control system. Furthermore, component modeling, load parameters, and complicated calculations are not required. The fault detection and identification of the faulty switch or clamping diode are carried out based on the available data such as a switching pattern and terminal voltage. Although switches are more fragile than clamping diodes, clamping diodes are also subjected to breakdown. Hence, it is also crucial to achieve a clamping diode fault diagnosis strategy. Moreover, for the fault detection procedure, a voltage quantifier is proposed to avoid any misdiagnosis arising from measurement errors and voltage drop in the circuit. The simulation and experimental results are presented to validate the effectiveness of the proposed approach.

A Novel Multilevel DC-Link Three-Phase T-Type Inverter

This research proposes a four-level T-type inverter that is suitable for low-power applications. The presented topology outranks other types of inverters in terms of a smaller number of semiconductor devices, absence of passive components such as clamping diodes and flying capacitors, low switching and conduction losses, and high efficiency. The proposed topology is free from voltage deviation and unbalanced voltage occurrences that are present in other multilevel converters having clamping diodes or flying capacitors. The proposed inverter can extend to N levels using unequal dc-link voltage sources for medium-voltage application. The inverter employs the simple fundamental frequency staircase modulation technique. Moreover, this paper presents a current commutation strategy to prevent the occurrences of short circuit and minimizing the number of required switching devices and switching transitions, resulting in improving the efficiency of the inverter. This paper also analyses the theoretical converter losses showing lower switching and conduction losses when compared to existing four-level inverters. The experimental validation of the proposed inverter shows its operating feasibility and a low output voltage THD.

Secondary‐side phase‐shifted full‐bridge converter with reset winding

A resonant inductor and two clamping diodes are introduced into the secondary phase shift full-bridge converter (SPS-FBC), which can well suppress voltage spike across the rectifiers. However, the resonant inductor and two clamping diodes will bring some other problems. In this study, an auxiliary winding in series with the resonant inductor is added to the SPS-FBC to reset the clamp diode current rapidly. The auxiliary winding not only reduces the circulation losses of the switches and the clamping diodes, but also makes the clamping diodes naturally turn-off and avoids the reverse recovery even when the output filter inductance and magnetising inductance are relatively large. The principle of operation and performance are illustrated and verified on a 1.5 kW experimental circuit. In addition, the efficiency and losses of the converters with/without reset winding are compared and analysed. The efficiency of the converter with reset winding is significantly improved over the entire operating range and the peak efficiency is 96.60% at full load.

Clamping Diode-Based Auxiliary Circuit for Suppression of Voltage Ringing in EV Charger

With the technological advancement in the electric vehicle (EV), EV chargers become more prominent. As the dc–dc power conditioning unit plays an important role in on-board chargers. In this article, an isolated full-bridge dc–dc converters (FBDC) with diode clamping circuit operating with modified pulsewidth modulation (MPWM) is proposed. The proposed configuration eliminates the voltage ringing at the primary and secondary end of the high frequency transformer (HFT), as well as voltage ringing across the rectifier diodes. The proposed configuration saves the overrating of the system rectifier output stage as compared to conventional FBDC. The MPWM provides zero voltage switching during full-load operation. The theoretical methodology first verified on matlab /Simulation, later a 500 W, 80 kHz laboratory prototype is developed for validating the results with 92.10% efficiency.

Design of a novel high holding voltage LVTSCR with embedded clamping diode**Project supported by the National Natural Science Foundation of China (Grant No. 61504049) and the China Postdoctoral Science Foundation (Grant No. 2016M600361).

In order to reduce the latch-up risk of the traditional low-voltage-triggered silicon controlled rectifier (LVTSCR), a novel LVTSCR with embedded clamping diode (DC-LVTSCR) is proposed and verified in a 0.18-μm CMOS process. By embedding a p+ implant region into the drain of NMOS in the traditional LVTSCR, a reversed Zener diode is formed by the p+ implant region and the n+ bridge, which helps to improve the holding voltage and decrease the snapback region. The physical mechanisms of the LVTSCR and DC-LVTSCR are investigated in detail by transmission line pulse (TLP) tests and TCAD simulations. The TLP test results show that, compared with the traditional LVTSCR, the DC-LVTSCR exhibits a higher holding voltage of 6.2 V due to the embedded clamping diode. By further optimizing a key parameter of the DC-LVTSCR, the holding voltage can be effectively increased to 8.7 V. Therefore, the DC-LVTSCR is a promising ESD protection device for circuits with the operation voltage of 5.5–7 V.

Theoretical Analysis of LC Filter to Three Level Diode Clamped Inverters in Low/Medium Voltage Applications

The employing of power electronic devices for converters plays a vital role in the conversion of AC to DC vice versa. Applications of these converters more demand in renewable energy, hybrid vehicles, Drives, HVDC, etc. In renewable energy, especially a solar-based power generation stations require inverter stations. These inverters stations have the multilevel inverters. Multilevel inverters are emerging day by day in the sector of the renewable energy sector. The increasing level of multilevel inverters can be effectively utilized in low and medium voltage applications to get the desired voltage and frequency. But output voltage is not in sinusoidal. However, most of the loads require a pure sinusoidal form of voltage. To get sinusoidal voltage across loads a high switching frequency is required to switch the MOSFETs or IGBTs. Along with a suitable value of LC, filters make the sinusoidal nature of waveform with less total harmonic distortion (THD) levels. To get a sinusoidal wave, a proper theoretical analysis of filters is required. In this paper theoretical analysis has been done for LC filters and checked with simulation results for various loads. The performance of theoretical LC filters values checked using diode clamped multi-level inverters have been examined through MATLAB/SIMULINK by POD PWM by POD PWM.

New improved two-phase interleaved converter with clamp circuit and diode capacitor cell

This paper introduces a new improved two-phase DC–DC interleaved converter with clamp circuit and diode capacitor cell with coupled inductor for DC micro grid. The key focus of this research is to amend voltage gain and to cut down the stress of the switches. The diode capacitor arrangement with coupled inductor used to attain twice the voltage gain. The capacitors are connected end to end at the output to dismiss the voltage ripple. The gain of the modified converter is improved by secondary winding of coupled inductor. The leakage energy of the inductance is recycled and voltage spikes of power switches during turn off operation are suppressed by clamp circuit. The theoretical analysis of the modified converter is verified through simulation. A prototype of 150 W is constructed to demonstrate the efficient operation of the converter.

Enhancing the Performance of Multilevel Inverters using Modified SVPWM Techniques

In this paper, two types seven-level multilevel inverters in three phase configuration, Cascaded H-bridge Multilevel Inverter (CMLI) and Diode Clamped Multilevel Inverter (DCMLI) are simulated and compared the results for three different carrier PWM techniques. Here, Carrier based Sinusoidal Pulse Width Modulation (SPWM), Third Harmonic Injected Pulse Width Modulation (THIPWM) and Modified Carrier-Based Space Vector Pulse Width Modulation (SVPWM) are used as modulation strategies. These modulation strategies include Phase Disposition technique (PD), Phase Opposition Disposition technique (POD), and Alternate Phase Opposition Disposition technique (APOD). In all the modulation strategies, triangular carrier and trapezoidal triangular carrier signals are compared with reference signal for generation of control pulses. The simulations have been carried out for seven-level CMLI and DCMLI using MATLAB/Simulink. The detailed analysis of results in terms of %THD and utilization of DC-link voltage has been presented in this paper. By increasing the performance of inverters the utilization of input energy is reduced, then the corresponding energy sources can be reduced.

Multiwinding Flyback Clamp Snubber for 10 kV IGCT With Reduced Voltage Stress on Clamp Recovery Diodes

About 10 kV integrated gate-commutated thyristor (IGCT) has the potential to push wind turbine systems to higher power and voltage ratings. Converters employing IGCTs need snubber and overvoltage protection circuit to limit the rate of current rise and peak overvoltage across IGCT during turn on and turn off state, respectively. The conventional resistor-capacitor-diode (RCD) snubber, which is used in such power converters, dissipates a significant amount of power. This article proposes an enhanced scheme of the flyback clamp snubber comprising a flyback transformer with multiwinding secondary wound on a magnetic core. The flyback snubber not only meets all of the IGCTs requirements during on and off -state but also significantly saves power. Unlike the basic concept of flyback clamp snubber, the new scheme has equal voltage stress across the clamp diodes which recover the stored energy of the di/dt snubber into dc-link capacitor. Simulation and experimental results of 10 kV IGCT with conventional RCD and flyback clamp snubbers turn out the benefit of the system.