Digital Chip Research Articles

Versatile digital polymerase chain reaction chip design, fabrication, and image processing

We present a family of digital polymerase chain reaction (dPCR) chips made of silicon that are (9 × 9) mm2 in size, have a unique layout design, and have between 26,448 and 1,656,000 reaction wells. The chip layout was split into six fields sized 4200 × 2785 μm2 that contain reaction wells with a gap of a few μm separating the fields from each other. We also developed a universal fluorescence imaging method capable of processing images from those chips. It comprised automatic image acquisition, image stitching, alignment mark registration, rotation correction, determination of reaction wells’ positions, and result processing. The chip design, with fully automated image processing, provided a fast and reliable system for the absolute quantitative analysis of dPCR. Combined with ease-of-use, this family of dPCR chips offers a pathway to enable fast and affordable digital microfluidic diagnostic applications.

Driving and sorting of the fluorescent droplets on digital microfluidic platform

In this paper, we present a digital microfluidic droplet sorting platform to achieve automated droplet sorting based on fluorescent detection. We design and fabricate a kind of digital microfluidic chip for manipulating nano-liter-sized liquid droplets, and the chip is integrated with a fluorescence-initiated feedback system for real-time sorting control. The driving and sorting characteristics of fluorescent droplets encapsulating fluorescent-labeled particles are studied on this platform. The droplets dispensed from on-chip reservoir electrode are transported to a fluorescence detection site and sorted according to their fluorescence signals. The fluorescent droplets and non-fluorescent droplets are successfully separated and the number of fluorescent particles inside each droplet is quantified by its fluorescent intensity. We realize droplet sorting at 20 Hz and obtain a linear relationship between the fluorescent particle concentrations and the fluorescence signals. This work is easily adapted for sorting out fluorescent-labeled microparticles, cells and bacteria and thus has the potential of quantifying catalytic or regulatory bio-activities.

Efficient thermal analysis method for large scale compound semiconductor integrated circuits based on heterojunction bipolar transistor**Project supported by the Advance Research Foundation of China (Grant No. 9140Axxx501), the National Defense Advance Research Project, China (Grant No. 3151xxxx301), the Frontier Innovation Program, China (Grant No. 48xx4), and the 111 Project, China (Grant No. B12026).

In this paper, an efficient thermal analysis method is presented for large scale compound semiconductor integrated circuits based on a heterojunction bipolar transistor with considering the change of thermal conductivity with temperature. The influence caused by the thermal conductivity can be equivalent to the increment of the local temperature surrounding the individual device. The junction temperature for each device can be efficiently calculated by the combination of the semi-analytic temperature distribution function and the iteration of local temperature with high accuracy, providing a temperature distribution for a full chip. Applying this method to the InP frequency divider chip and the GaAs analog to digital converter chip, the computational results well agree with the results from the simulator COMSOL and the infrared thermal imager respectively. The proposed method can also be applied to thermal analysis in various kinds of semiconductor integrated circuits.

Digital Microfluidic Biochips Online Fault Detection Route Optimization Scheme

Digital microfluidic biochips(DMFBs) have been widely used in biology, medicine and chemical experiments. These areas all have high requirements on the reliability of experimental results. Therefore, it is necessary to conduct chip failure detection during the experiment. In this work, based on Employed particle swarm optimization algorithm, the fault detection route optimization of direct-addressing and pin-constrained digital microfluidic chips are respectively studied. Combining the employed search operator of Artificial Bee Colony algorithm and Particle Swarm Optimization, the method can improve the searching accuracy of the algorithm while exploiting the ability of algorithm exploration. The simulation experiment is carried out by using the multi-element biochemical test chip model. The results show that the proposed method can shorten the fault detection path and improve the fault detection efficiency.

Securing Medical Devices Against Hardware Trojan Attacks Through Analog-, Digital-, and Physiological-Based Signatures

Corruption of data in embedded and medical devices can cause serious harm if not quickly detected. In this paper, we emphasize the part of the attack surface which entails inserting malicious hardware circuitry (Hardware Trojans) during the manufacturing process of a digital microchip. The Hardware Trojan (HT) is composed of a few gates and attempts to modify the functionality of the chip. Such types of extremely small HTs are hard to detect using other conventional offline HT detection methods, such as side-channel analysis and digital systems test techniques. In our approach, however, we focus on an online method for rapidly detecting HTs at runtime by checking for correct functionality of the underlying hardware. We present an architecture that addresses these threats by splitting the design into a two-chip approach where we generate signatures deep in the hardware during data harvesting, and we then check for these signatures during data processing and encryption for transmission. In addition, we take advantage of known physiological relationships between medical data to ensure the integrity of the data that is processed by the hardware. Our experimental results demonstrate the effectiveness of our HT detection architecture and show that not only can we detect such types of attacks but also that we can distinguish these attacks from actual health problems. Our synthesis results show that our architecture minimally impacts performance and area especially in light of the fact that most of our techniques rely on digital logic modules which are already typically present in modern digital chips for test and other purposes.

Equivalent-accuracy accelerated neural-network training using analogue memory

Neural-network training can be slow and energy intensive, owing to the need to transfer the weight data for the network betweenconventional digital memory chips and processor chips. Analogue non-volatile memory can accelerate the neural-network training algorithm known as backpropagation by performing parallelized multiply-accumulate operations in the analogue domain at the location of the weight data. However, the classification accuracies of such in situ training using non-volatile-memory hardware havegenerally beenless than those of software-based training, owing to insufficient dynamic range and excessive weight-update asymmetry. Here we demonstrate mixed hardware-software neural-network implementations that involve up to 204,900 synapses and that combine long-term storage in phase-change memory, near-linear updates of volatile capacitors and weight-data transfer with 'polarity inversion' to cancel out inherent device-to-device variations. We achieve generalization accuracies (on previously unseen data) equivalent to those of software-based training on various commonly used machine-learning test datasets (MNIST, MNIST-backrand, CIFAR-10 and CIFAR-100). The computational energy efficiency of 28,065 billion operations per second per watt and throughput per area of 3.6 trillion operations per second per square millimetre that we calculate for our implementation exceed those of today's graphical processing units by two orders of magnitude. This work provides a path towards hardware accelerators that are both fast and energy efficient, particularly on fully connected neural-network layers.

A UVM simulation environment for the study, optimization and verification of HL-LHC digital pixel readout chips

The operating conditions of the High Luminosity upgrade of the Large Hadron Collider are very demanding for the design of next generation hybrid pixel readout chips in terms of particle rate, radiation level and data bandwidth. To this purpose, the RD53 Collaboration has developed for the ATLAS and CMS experiments a dedicated simulation and verification environment using industry-consolidated tools and methodologies, such as SystemVerilog and the Universal Verification Methodology (UVM). This paper presents how the so-called VEPIX53 environment has first guided the design of digital architectures, optimized for processing and buffering very high particle rates, and secondly how it has been reused for the functional verification of the first large scale demonstrator chip designed by the collaboration, which has recently been submitted.

Design of thermally aware ultra low power clock generator for moderate speed VLSI chip applications

ABSTRACTSub-threshold operation of devices provides a promising approach to satisfy the ultra-low power demand of handheld products. However, in this domain, the drive current exponentially depends on temperature which makes the sub-threshold circuits more prone to temperature variations. This paper proposes a scheme to improve the thermal stability of an ultra low power clock generator circuit which is vital for reliable operation of portable synchronous digital VLSI chip applications. In this work, combination of temperature monitoring circuit and control circuit has been incorporated to develop a thermally robust clock generator. A novel control strategy is developed, wherein the control voltage is adaptively altered to combat the exponential change in the clock period with the variation in temperature, without use of any passive components like resistors and capacitors. Simulation results shows that the proposed circuit gives constant clock period against a wide range of temperature variations. The proposed oscillator operates at 0.37V, consumes 1.5µW power and provides a temperature coefficient of 290ppm/°C over a temperature range from 10°C to120°C without any external trimming.

Highly sensitive detection and mutational analysis of lung cancer circulating tumor cells using integrated combined immunomagnetic beads with a droplet digital PCR chip

Circulating tumor cells (CTCs) have become an important biomarker for liquid biopsy to monitor tumor progression and indicate response to therapies. Many epithelial cellular adhesion molecule (EpCAM) dependent CTC isolation methods have been developed, which have a limitation for low EpCAM expressed tumor cells. In an effort to overcome these drawbacks, we developed combined immunomagnetic beads (EpCAM, Mucin1 and epidermal growth factor receptor) to sensitively isolate CTCs for immunofluorescence analysis and genetic characterization. With this combined immunomagnetic beads, 93.35% H446 cells from spiked blood sample can be recovered. We were able to detect CTCs in 127 among 143 patients included in the study (88.8%). Some CTC clusters were captured with the combined magnetic beads system. In 17 of them, CTCs after chemotherapy significantly decreased compared to that before chemotherapy (4.42 (± 3.94) vs. 12 (± 7)/mL, P = 0.002). For subsequent genetic characterization of CTCs, 2 of 6 samples, using a droplet digital PCR (ddPCR) chip, have detectable EGFR L858R mutation in the cells enriched with the combined immunomagnetic beads. In conclusion, this method integrating the combined immunomagnetic beads and the ddPCR chip for CTCs detection can be of potential application in terms of diagnosis, therapeutic evaluation and personalized medicine in lung cancer.

Coherent beam combination of four holmium amplifiers with phase control via a direct digital synthesizer chip.

We present the coherent beam combination of four 2100 nm holmium amplifiers with their phase controlled through acousto-optic modulators driven by the RF output of direct digital synthesizer chips. Phase alignment was achieved through the use of a field programmable gate array based stochastic parallel gradient descent algorithm.

Application of digital holographic microscopy and microfluidic chips to the measurement of particle size distribution of fly ash after a wet electrostatic precipitator

In-line digital holographic microscopy is used to obtain a particle size distribution of fly ash after wet electrostatic precipitators. A polydimethylsiloxane microfluidic chip with a cross section of 50 × 200 µm2 is fabricated to offer a suitable experimental environment and constant background. Equivalent Charge Coupled Device pixels are calibrated to be 0.1016 µm, leading a 35.4-times magnification. A sample containing standard particles of 2 µm is first analyzed to confirm the validity and stability of the digital holographic microscopy under flowing condition. The average diameter is reconstructed to be 2.03 µm, leading to a relative standard deviation of 1.5%. Then samples acquired after the wet electrostatic precipitator of a coal power plant is analyzed. Large amounts of holographic pictures are taken and reconstructed to obtain a particle size distribution from 0.5 µm to 3.52 µm. Finally the obtained results are compared with that from a laser particle size analyzer. The acceptable deviation indicates that the method is feasible and accurate to measure fly ash after wet electrostatic precipitators as well as other microparticles.

Ultrasensitive quantification of tumor mRNAs in extracellular vesicles with an integrated microfluidic digital analysis chip.

Extracellular vesicles (EVs) present a promising liquid biopsy for cancer diagnosis. However, it remains a daunting challenge to quantitatively measure molecular contents of EVs including tumor-associated mRNAs. Herein, we report a configurable microwell-patterned microfluidic digital analysis platform combined with a dual-probe hybridization assay for PCR-free, single-molecule detection of specific mRNAs in EVs. The microwell array in our device is configurable between the flow-through assay mode for enhanced hybridization capture and tagging of mRNAs and the digital detection mode based on femtoliter-scale enzymatic signal amplification for single-molecule counting of surface-bound targets. Furthermore, a dual-probe hybridization assay has been developed to enhance the sensitivity of the digital single-molecule detection of EV mRNAs. Combining the merits of the chip design and the dual-probe digital mRNA hybridization assay, the integrated microfluidic system has been demonstrated to afford quantitative detection of synthetic GAPDH mRNA with a LOD as low as 20 aM. Using this technology, we quantified the level of GAPDH and EWS-FLI1 mRNAs in EVs derived from two cell lines of peripheral primitive neuroectodermal tumor (PNET), CHLA-9 and CHLA-258. Our measurements detected 64.6 and 43.5 copies of GAPDH mRNA and 6.5 and 0.277 copies of EWS-FLI1 fusion transcripts per 105 EVs derived from CHLA-9 and CHLA-258 cells, respectively. To our knowledge, this is the first demonstration of quantitative measurement of EWS-FLI1 mRNA copy numbers in Ewing Sarcoma (EWS)-derived EVs. These results highlight the ultralow frequency of tumor-specific mRNA markers in EVs and the necessity of developing highly sensitive methods for analysis of EV mRNAs. The microfluidic digital mRNA analysis platform presented here would provide a useful tool to facilitate quantitative analysis of tumor-associated EV mRNAs for liquid biopsy-based cancer diagnosis and monitoring.

Design of an Integrated Circuit Chip Test Instrument

At present, the functions of all kinds of electronic products are becoming more complex and intelligent, the IC chip can be seen everywhere. How to accurately judge the IC chip is normal or not is particularly important. A new kind of digital chip testing instrument is designed based on HT46RU24 as technical core. By using the test code to control and test the operation conditions of hardware, and then comparing the test result with the correct value, the result of right or wrong is automatically judged. In addition, the instrument with a network communication interface, not only can work offline, but also can be connected to a computer. It is proved that the instrument has small size, light weight, convenient handling and high reliability.

High-Resolution Real-Time Visual Inspection System for Micro Assembly

For precise assembly of miniature parts, the precise inspection for parts’ posture and real-time servo control for assembly greatly depend on the performance of visual inspection system. This paper proposed a high-resolution real-time visual inspection system of micro assembly. The CMOS image sensor and high-speed digital signal processing chip were chosen to design the image acquisition module, image processing module and image display module. High-accuracy display on the common display device was implemented with the video encoding chip and FPGA. The test results showed that the processing speed with preprocessing could reach 3.5 frames per second with 5 mega-pixel resolution, and the display accuracy after threshold processing had little loss. Micro parts assembly experiment and high accuracy Peg-in-Hole assembly experiment are done to test the performance of the proposed visual inspection system. This visual inspection system can be used for high-resolution real-time micro assembly and other real-time visual servo control.

Optimal Don’t Care Filling for Minimizing Peak Toggles During At-Speed Stuck-At Testing

Due to the increase in manufacturing/environmental uncertainties in the nanometer regime, testing digital chips under different operating conditions becomes mandatory. Traditionally, stuck-at tests were applied at slow speed to detect structural defects and transition fault tests were applied at-speed to detect delay defects. Recently, it was shown that certain cell-internal defects can only be detected using at-speed stuck-at testing . Stuck-at test patterns are power hungry, thereby causing excessive voltage droop on the power grid, delaying the test response, and finally leading to false delay failures on the tester. This motivates the need for peak power minimization during at-speed stuck-at testing. In this article, we use input toggle minimization as a means to minimize a circuit’s power dissipation during at-speed stuck-at testing under the Combinational State Preservation scan (CSP-scan) Design-For-Testability (DFT) scheme. For circuits whose test sets are dominated by don’t cares, this article maps the problem of optimal X-filling for peak input toggle minimization to a variant of the interval coloring problem and proposes a Dynamic Programming (DP) algorithm (DP-fill) for the same along with a theoretical proof for its optimality. For circuits whose test sets are not dominated by don’t cares, we propose a max scatter Hamiltonian path algorithm, which ensures that the ordering is done such that the don’t cares are evenly distributed in the final ordering of test cubes, thereby leading to better input toggle savings than DP-fill. The proposed algorithms, when experimented on ITC99 benchmarks, produced peak power savings of up to 48% over the best-known algorithms in literature. We have also pruned the solutions thus obtained using Greedy and Simulated Annealing strategies with iterative 1-bit neighborhood to validate our idea of optimal input toggle minimization as an effective technique for minimizing peak power dissipation during at-speed stuck-at testing.

Poisson Plus Quantification for Digital PCR Systems

Digital PCR, a state-of-the-art nucleic acid quantification technique, works by spreading the target material across a large number of partitions. The average number of molecules per partition is estimated using Poisson statistics, and then converted into concentration by dividing by partition volume. In this standard approach, identical partition sizing is assumed. Violations of this assumption result in underestimation of target quantity, when using Poisson modeling, especially at higher concentrations. The Poisson-Plus Model accommodates for this underestimation, if statistics of the volume variation are well characterized. The volume variation was measured on the chip array based QuantStudio 3D Digital PCR System using the ROX fluorescence level as a proxy for effective load volume per through-hole. Monte Carlo simulations demonstrate the efficacy of the proposed correction. Empirical measurement of model parameters characterizing the effective load volume on QuantStudio 3D Digital PCR chips is presented. The model was used to analyze digital PCR experiments and showed improved accuracy in quantification. At the higher concentrations, the modeling must take effective fill volume variation into account to produce accurate estimates. The extent of the difference from the standard to the new modeling is positively correlated to the extent of fill volume variation in the effective load of your reactions.

Research on control law accelerator of digital signal process chip TMS320F28035 for real-time data acquisition and processing

TI C2000 series digital signal process (DSP) chip has been widely used in electrical engineering, measurement and control, communications and other professional fields, DSP TMS320F28035 is one of the most representative of a kind. When using the DSP program, need data acquisition and data processing, and if the use of common mode C or assembly language programming, the program sequence, analogue-to-digital (AD) converter cannot be real-time acquisition, often missing a lot of data. The control low accelerator (CLA) processor can run in parallel with the main central processing unit (CPU), and the frequency is consistent with the main CPU, and has the function of floating point operations. Therefore, the CLA coprocessor is used in the program, and the CLA kernel is responsible for data processing. The main CPU is responsible for the AD conversion. The advantage of this method is to reduce the time of data processing and realize the real-time performance of data acquisition.

Hardware Trojan Detection Based on Logical Testing

In recent years, hardware Trojans (HTs) have become one of the main challenging concerns within the chain of manufacturing digital integrated circuit chips. Because of their diversity in chips, HTs are difficult to detect and locate. This paper attempted to propose a new improved method for detection and localization of HTs based on the real-time logical values of nodes. The algorithm extracts the nodes with special attributes. At the next stage, the nodes with the greatest similarity in terms of logical value are selected as targets. Depending on the size of the circuit, the extraction continues until a sufficient number of similar nodes has been selected. The logical relationship between the candidate nodes yields a function, the logical values of which differ in the Trojan-free and Trojan-infected modes, thus detecting the potential Trojans. This method is scalable, overcoming the problems of noise and Process variation. The success rate of Trojan detection in this method is more than 80%. The most overhead is 13% for power consumption and 15% for area.

FPGA Alarm System Based on Multi Temperature Sensor

The purpose of this study is to achieve real-time acquisition and monitoring of temperature in large-scale industrial or agricultural production scene, and timely detect abnormal temperature. FPGA chip, multi temperature sensor and alarm control module three parts consist of FPGA alarm system obtained based on multi temperature sensor. Multi temperature sensor is used for the acquisition of relevant temperature signal in the production site, and the transmission of the collected data through the way of digital signal chip to the FPGA chip for further processing. The FPGA chip is responsible for the parameter setting, the temperature signal acquisition and the threshold comparison and so on, and according to the data processing result, it can send out the normal response control signal to the alarm module. The alarm module contains the pre-warning lights and the alarm device that it can receive the control signal and realize alarm response. The results showed that the test in planting flowers in greenhouse showed that the system is sensitive in response and small in error of temperature acquisition, in accordance with the requirements for use. As a result, the system can be widely used in the temperature monitoring in the production scene, suitable for being promoted in a variety of occasions needing for monitoring the temperature.

Molecular characterization of Mycobacterium avium subsp. paratuberculosis (MAP) isolates

Objective: Johne’s disease, caused by Mycobacterium avium subsp. paratuberculosis (MAP), is highly prevalent in domestic ruminants. In India, the exact prevalence of MAP genotypes still remains unknown limited, and the systematic disease control programs are also limited. This study was undertaken to study the molecular characterization of MAP isolates.Methods: About 22 MAP isolates were from cattle, sheep, and goat under gone the molecular characterization by three different methods (1) IS1311 polymerase chain reaction (PCR) with restriction enzyme analysis (REA), (2) GyrA and GyrB PCR with sequencing, and (3) digital microfluidic chip (DMC)-PCR. The study demonstrated that a) IS1311 PCR with REA (based on point mutations) identified all 22 MAP isolates as “intermediate type” irrespective of a host of origin and also belong to Indian Bison type. Molecular typing based on the gyrA and gyrB genes partial amplification and sequencing revealed that the MAP isolates exhibited more lineages toward the reference Type III, Intermediate strain.Results: The MAP isolate of sheep origin showed more lineages toward the sheep type than the isolates of cattle and goats. This variation may be due to host-pathogen interactions and adaptation to different hosts and environmental conditions in the nature.Conclusions: The DMC-PCR, which is based on sequence difference at 5` end of IS900 of MAP, differentiated rapidly all the isolates as sheep type. The application of DMC-PCR to differentiate sheep and Intermediate types is limited as the Intermediate type (Type III) and sheep type (Type I) are very closely related to each other and all the MAP isolates were confirmed as Intermediate or Type III by three different methods which are commonly present in India, Spain, and Iceland.Keywords: Johne’s disease, Mycobacterium avium subsp. paratuberculosis, Polymerase chain reaction, Digital microfluidic chip-polymerase chainreaction.