Digit Position Research Articles

Multilevel Balanced Code with Redundant Digits

In this concise paper, several coding schemes are proposed for transmitting digital information over a cable with dc cutoff. The codes are composed of information digits and balance digits determined by the weight of the former. It is shown that the encoding and decoding circuits are quite simple, and that the dc component of the codes is negligibly small. Furthermore, the lowfrequency components of the spectrum can be made much smaller by changing the balance digit positions. Exploiting the fact that the weight of almost all codes is zero, and using the coding rule presented, block synchronization can be easily obtained and most transmission errors can be detected.

Row-column-wise shifting in a multidigit bidirectional shift register†

A novel method of digit shifting in a bidirectional shift register is described which provides substantial saving of components in terms of gates. In this method only the bits occupying the 1-position of the 8-4-2-1 code can shift in either direction. Bits of the same digit position are then made to change place among themselves. Eight clock pulses are required to shift the bits through one digit position, but the number of clock pulse requirement is independent of the number of digits involved in the shifting process. However, this shortcoming of speed reduction can be overcome by providing a separate clock for this purpose which may be several times faster than the system clock. The drastic reduction in component count and cost of the new method over the conventional one has also been illustrated. These together with the reduction of interconnecting leads and power dissipation leads to the possibility of fabricating multidigit bidirectional shift registers in monolithic integrated circuit packages.

Arithmetic Unit of a Computing Element in a Global, Highly Parallel Computer

The arithmetic unit of a digital computing element for a proposed globally controlled, highly parallel computer having up to thousands of such computing elements is described. Because operand words are regarded as circular, and any digit position may be designated as most significant during an operation, the atom of the computing element is the digit position logic, i.e., the computing elements are themselves composed of identical modules for each digit. The entire computing element, consisting of the arithmetic unit, an 8192 bit IGFET memory, and a special purpose input unit can be packaged on a 3.75 inch by 4.5-inch ceramic substrate using beam lead integrated circuits.

Error-locating codes--A new concept in error control

A new coding technique is proposed lying midway between error-detection and error-correction coding. The block of received digits is regarded as subdivided into mutually exclusive sub-blocks. Errors occurring within particular sub-blocks are detected at the receiver and, in addition, the receiver is able to determine, by using the code redundancy, which particular sub-blocks contain errors. Such {\em error-locating} codes permit the location of digit errors to within a sub-block of the received message block without, in general, permitting the precise determination of erroneous digit positions. Two families of such codes are described, both of them limited to locating a single erroneous sub-block. One family permits the detection of up to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t-1</tex> errors in any one sub-block of length <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</tex> . The second family locates up to two errors per sub-block, but is generally more efficient in its use of redundancy than the first family. Upper and lower bounds are given for the number of check digits required with any error-locating code. Codes meeting the lower bound exactly are termed {\em optimum} error-locating codes. All the codes of the second family, as well as some isolated examples of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t-1</tex> error-locating codes are optimum in this sense. The amount of redundancy required for such codes does not appear excessive and error location may provide an attractive alternative to conventional error detection in decision feedback communications.

An electroluminescent fixed store for a digital computer

The paper discusses a method of reading information from an electroluminescent digital store and describes in detail the operation of a matrix containing 1282 digit positions. The method of reading makes use of the non-linear electro-optical property of electroluminescent cells to provide modulation. By applying two sinusoidal excitation voltages, at frequencies f1 and f2 respectively, to the selected row and column of an electroluminescent array, only the cell at the intersection will emit light at the difference frequency (f1—f2). This difference frequency may be detected in the photo-current of a photo-multiplier observing the matrix. The information is stored in the form of a punched card or mask placed between the matrix and the photo-multiplier. At a particular operating frequency, the access time and reliability of the store are shown to be a function of the signal/noise ratio at the photo-multiplier output.