Dickson Charge Pump Research Articles

A 0.36-V 5-MS/s Time-Mode Flash ADC With Dickson-Charge-Pump-Based Comparators in 28-nm CMOS

Dickson charge-pump (CP) is proposed here to realize a voltage-to-time converter (VTC) within an array of time-domain comparators of a 54-level time-mode subthreshold flash ADC operating at 0.36V. Two identical CPs in each of the 54 ADC slices convert the input and reference voltages into variable-slope ramp signals fed into comparators for ‘flash’ quantization. Considering the fact that the comparator’s evaluation time gets severely degraded at subthreshold input voltages, the proposed ADC delivers the maximum bandwidth by means of the inherent input voltage boosting by the Dickson CPs. The proposed architecture quantizes the analog input signal into time with CPs and then into digital domain with latches and simple logic, without using any analog-intensive circuits such as amplifiers and current sources, thus yielding a digitally friendly implementation. Measurement results show peak ENOB of 5.04-bit, SNDR of 32.1dB at the peak, power consumption of $88~\mu \text{W}$ . The conversion rate of 5 MS/s is the highest among near- and subthreshold ADCs.

Linear distribution of capacitance in Dickson charge pumps to reduce rise time

SummaryThis paper introduces a design strategy to reduce rise time of charge pumps maintaining equal the silicon area, which is effective when the load capacitance is lower than the total charge pump capacitance. The strategy relies on an unconventional pumping capacitors sizing, which set them not equal and follows a linear distribution. The approach is based on a theoretical analysis and is validated through post‐layout simulations using a 130‐nm complementary metal‐oxide semiconductor (CMOS) standard technology. The simulations demonstrate the advantages of the proposed design strategy and the accuracy of the theory.

A Subthreshold Cross-Coupled Hybrid Charge Pump for 50-mV Cold-Start

In this article, a fully-integrated switched-capacitor DC-DC converter based on a Dickson charge pump able to work with input voltage levels that force the transistors working in subthreshold region is presented. The proposed topology exploits resistors in the charge transfer switch in order to overcome the limits of conventional solutions when working in the subthreshold regime. Post-layout simulations using a 28-nm FD-SOI technology show that the CP can boost an input voltage as low as 50 mV to a maximum output voltage of 270 mV, keeping a settling time about 25X lower than the conventional dual-branch cross-coupled charge pump and a voltage conversion efficiency higher than 76%. The proposed topology is particularly suited for the start-up of power management units supplied by thermoelectric generators.

On-Chip CMOS-MEMS-Based Electroosmotic Flow Micropump Integrated With High-Voltage Generator

The rapid development of microfluidic technology has increased the demand for the integration of driving circuits in the microfluidic devices. We have proposed a novel on-chip electroosmotic (EOF) micropump integrated with a high-voltage (HV) generator. The HV (49.8 V) generator is based on a Dickson charge pump, which is fabricated on a silicon-on-insulator (SOI) substrate by the standard CMOS process, and the isolation is achieved by MEMS post-processed deep trench isolation. The size of the 49.8 V generator is $425\times 353\,\,\mu \,\,\text{m}^{2}$ . The HV required for the successful operation of the micropump was generated by the integrated driving circuit with a low-voltage power supply. The maximum flow velocity and flow rate of the proposed EOF micropump were measured as 137 $\mu $ m/s and 167 nL/min, respectively when it was driven by the integrated 49.8 V generator. The efficiency of the micropump is demonstrated by comparing it with the previously reported micropumps. The proposed integration technique is reliable and effective, and potentially boosts the practical applications of lab-on-chip devices. [2019-0206]

Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area

In this brief an improved Dickson charge pump (DCP) topology exploiting a clock boosting is presented. An accurate while simple theoretical model for the dynamic behavior of the charge pump is carried out. Analytical comparison with the traditional DCP reveals that the proposed solution can achieve a rise time or area reduction between 10% and 60% at the cost of a slight circuit complexity. Finally, simulation results using a 65-nm CMOS technology show the accuracy of the analytical model as well as the advantages of the proposed solution.

A monolithic low-power-consumption driver circuit based on a Dickson charge pump for MEMS actuator applications

This paper introduces a monolithic high-voltage driver circuit for use in MEMS applications. The proposed design offers an output voltage which can linearly sweep from 0 V to 72.8 V under zero-load conditions. To minimize the power consumption of the driver circuit, an advanced charge recycling strategy and finger capacitor structure are implemented in the Dickson charge pump which acts as the high-voltage generator. At the maximum output voltage, the total power consumption of the driver circuit is only 2.337 mW.

Smart Textile Integrated Wireless Powered Near Field Communication Body Temperature and Sweat Sensing System

Near field communication (NFC) is a short-range wireless communication technique that has become an attractive device for healthcare and wellbeing monitoring. The work reported here demonstrates the development of a battery free wearable sensing system with temperature and sweat sensors embedded into and powered by a smart textile NFC antenna. The NFC antenna is seamlessly integrated with closed-body garments, and the sensor data can be easily acquired by NFC readers and smart phones in order to achieve real time and wireless monitor of health status in a convenient and nonintrusive way. A Dickson charge pump circuit has been designed and implemented in order to pump up the voltage and ensure a steady voltage supply for the sweat sensor. The maximum read range for accessing sensor data is 6 cm. The on-body measurement accuracy of the temperature sensor and sweat sensor are able to achieve ±0.14 °C and ±0.2%, respectively. The presented system can provide wearable battery-free ubiquitous wireless connectivity for point-of-care and any time healthcare and wellbeing monitoring.

A Hybrid Cockcroft–Walton/Dickson Multiplier for High Voltage Generation

This paper presents a voltage multiplier topology that is a hybrid between a Cockcroft–Walton multiplier and a Dickson charge pump. The Cockcroft–Walton structure exhibits significant output voltage drop under load as the number of multiplier stage increases. This is because all coupling capacitors are connected in series. Dickson charge pump mitigates this issue by connecting all capacitors in parallel. But this solution comes at the expense of large capacitor voltage stress at the last multiplier stage. The proposed hybrid structure arranges some capacitors in parallel and others in series, thereby achieving low output voltage drop and low capacitor voltage stress at the same time. We develop a model that predicts hybrid multiplier's performance and validates it experimentally. We also demonstrate a 60–2.25 kV dc–dc converter based on a 16-stage hybrid voltage multiplier which achieves a voltage gain of 12.8 while keeping the highest capacitor voltage stress to 660 V.

Design an Identification Function to Reduce the Computational Resources on the Testing Process of an Analog Electronic Circuit

In modern electronic circuits, imperfectness in the technological process can cause errors in reaching the correct values of the functional parameters. In order to solve this problem, a novel approach of analog and mixed-signal circuit testing methodology is used. The presented approach allows the testing complexity to be reduced and the testing time to be decreased. For this paper, selected signal features were designated from the transient output signal response. Using regression models with the extracted signal features, the functional parameters of a circuit were determined. An evolutionary determination of the regression models enabled the efficiency of the identification process to be maximized. The proposed methodology is presented for an exemplary CMOS Dickson charge pump circuit.

Analysis and design of the Dickson charge pump for sub-50 mV energy harvesting

This paper presents the analysis and design of a DC/DC boost converter operating from supply voltages around the thermal voltage (26 mV at room temperature), for energy harvesting applications. The boost converter described herein is aimed at starting up DC/DC converters, but its use can be extended to a conventional DC/DC converter in which the power conversion efficiency is not of major concern. Firstly, the operation of the Dickson charge pump for ultra-low voltage is described. Expressions for the output voltage, power conversion efficiency and input resistance are derived. The extremely low voltage operation, made feasible through an enhanced-swing ring oscillator and zero-VT transistors, is demonstrated via a prototype fabricated in 130 nm CMOS technology. For an input voltage of 17 mV, the converter delivers an output current of 10 nA at 1 V output and provides a current of 1 μA at a DC output of 1 V from an input voltage of 23 mV.

Micro-Energy Harvesting System Including a PMU and a Solar Cell on the Same Substrate With Cold Startup From 2.38 nW and Input Power Range up to 10 $\mu$W Using Continuous MPPT

This paper presents a power management unit (PMU) powered by a 1 mm $^{\boldsymbol{2}}$ solar cell on the same substrate to rise up the harvested voltage above 1.1 V. The on-chip solar cell and the PMU are fabricated in standard 0.18 $\mu$ m CMOS technology achieving a form factor of 1.575 mm $^{\boldsymbol{2}}$ . The PMU is able to startup from a harvested power of 2.38 nW without any external kick off or control signal. The PMU features a continuous and two-dimensional maximum power point tracking (MPPT) working in open-loop mode to handle a harvested power range from nW to $\mu$ W, by modifying both the charge pump topology and the switching frequency. The MPPT is based on four voltage level detectors that define five working regions depending on the illumination and on a self-tuning reference current for a fine adjustment of the switching frequency. The chip also includes an auxiliary charge pump to generate the voltage level necessary for the control circuit, implemented as a Pelliconi charge pump of eight stages with NMOS transistors in P-well as diodes. A Dickson charge pump with transmission gates as switches and with variable gain and capacitance per stage is also designed as the main charge pump. Finally, two relaxation oscillators are implemented to drive both charge pumps. This paper is accompanied by a video file demonstrating the PMU operation by powering an off-chip nor gate.

A Gain-Controlled, Low-Leakage Dickson Charge Pump for Energy-Harvesting Applications

This paper presents a single-stage power management unit to boost and regulate a low supply voltage for CMOS system-on-chip (SoC) applications. It consists of low-leakage, enhanced Dickson charge pump (DCP) that utilizes both stage and frequency modulation (FM) techniques to achieve high efficiency and lower area. In addition, the proposed design uses an enhanced stage-switch structure for the charge pump, which significantly reduces the cross-stage leakage. A stage number controller is used to control the gain of the charge pump by changing the number of stages based on the desired output voltage. FM is utilized to further fine-tune the output voltage through a closed-loop control based on a predetermined reference voltage. Silicon measurement results for the four-stage charge pump in 65-nm CMOS technology show a maximum end-to-end efficiency of 66% at an input voltage of 0.7 V and an output power of $27~\mu \text{W}$ . The proposed design achieved more than a $100\times $ reduction in leakage compared to traditional DCP. The system supports a range of load currents between 0.1 and $34~\mu \text{A}$ with a maximum operating frequency of 1.8 MHz. The proposed system supports an input voltage range of 0.55–0.7 V which makes it an excellent candidate for solar and thermal energy-harvesting applications targeting low-power internet-of-things SOC.

A low power RFID based energy harvesting temperature resilient CMOS-only reference voltage

In this work a low power consumption reference voltage in commercial 40 nm technology is proposed. It adopts a new approach to produce a temperature invariant reference voltage for outdoor RFID applications. To do so, the positive temperature coefficient (TC) of the produced output voltage of a Dickson charge pump is used to cancel out the negative temperature coefficient of the threshold voltage (Vth) of CMOS devices. The result is, according to the post-layout Cadence simulation, a 1.224 V reference voltage with a TC of 60 ppm°C−1 in the temperature range of −10 °C to 125 °C. The circuit consumes 7 nW with an active area of 0.00033 mm2.

On the Output Impedance and an Output Current–Power Efficiency Relationship of Dickson Charge Pump Circuits

This brief shows that the output impedance of Dickson charge pumps with an arbitrary number of stages defined by the total power loss in the switching devices and the output voltage is identical to the previous result calculated by the output current and voltage. A relationship between the output current and power efficiency is also given in a simple form.

Improved Efficiency and Voltage Gain Conversion Ratio using Inductor Model based modified Dickson Charge Pump

Improved Efficiency and Voltage Gain Conversion Ratio using Inductor Model based modified Dickson Charge Pump

Applicability of Dickson Charge Pump in Energy Harvesting Systems: Experimental Validation of Energy Harvesting Charge Pump Model

Applicability of Dickson Charge Pump in Energy Harvesting Systems: Experimental Validation of Energy Harvesting Charge Pump Model

FDSOI 28nm performances study for RF energy scavenging

This paper presents a study on an integrated technology: Fully-Depleted-Silicon-On-Insulator (FDSOI) at a 28nm node. FDSOI results are compared to another technology: Complementary-Metal-Oxide-Semiconductor (CMOS) 350nm. The aim of this work was to demonstrate the advantages of using FDSOI technology in RF energy scavenging applications. Characteristics of transistors are pointed out and results showed an improved 22%-output voltage gain for a series rectifier and a 13%-output voltage gain for a Dickson charge pump in FDSOI technology compared to CMOS, for an input voltage and power of 0.5 V and 0 dBm respectively. Those results allowed to prove that FDSOI 28nm is a better technology choice for energy scavenging and low-power applications.

Temperature Effects on the Efficiency of Dickson Charge Pumps for Radio Frequency Energy Harvesting

An experimental study is carried out to assess the effect of temperature on the conversion efficiency of ultrahigh-frequency energy harvesters based on diode-capacitor Dickson charge pumps, frequently used in self-energizing circuits, such as in radio frequency identification tags or in wireless sensor nodes. Using off-the-shelf Schottky diodes often adopted for this application, it is shown that the harvester conversion efficiency at 868 MHz is temperature dependent due to the changing rectification ratio, namely the ratio between the forward and the reverse current flowing through the low barrier height Schottky diodes, which both show a positive derivative with T. The experimental study, supported by SPICE simulations, has shown that a temperature variation might be particularly harmful at the lowest incident power regimes, when even a minimal drop in the conversion efficiency might determine the out-of-servicing of a wirelessly energized circuit.

High Efficiency Energy Harvesters in 65nm CMOS Process for Autonomous IoT Sensor Applications

Two integrated, highly efficient RF-to-dc rectifier circuits are presented. The rectifier circuits are based on improved Dickson charge pump models and are fabricated using 65-nm CMOS GlobalFoundries process. The designs utilize diode-connected metal–oxide–semiconductor field-effect transistors instead of the conventional Schottky diodes to provide a fully integrated circuits. A detailed analytical model that supports the improved circuit model is given. The measurement results of both rectifier circuits show good agreement with the simulation results. The fabricated rectifiers’ start to operate at −17.5-dBm input power. The tested frequency of operation of the rectifier circuits is 953 MHz (GSM900 band), however, other frequency bands such as 2.4 GHz (Bluetooth/WLAN) could be covered with proper impedance matching. The measured peak power conversion efficiency (PCE) of the implemented rectifiers are 84.37% and 56.16% at input power levels of −12.5 and −15 dBm, respectively. To the best of our knowledge, this is the highest achieved PCE for the class of rectifiers at such low input power level in the literature. High sensitivity and excellent PCE of the presented rectifiers are ideal for utilization in wireless sensor network, Internet of Things, energy harvesting, and biomedical applications.

A Sizing Methodology for Rise-Time Minimization of Dickson Charge Pumps With Capacitive Loads

A novel sizing methodology for Dickson charge pumps with pure capacitive loads is presented. The methodology is based on dynamic analysis to minimize the rise time of the charge pump up to 25% under a given circuit area. The methodology is validated through the implementation of a six-stage charge pump-based driver in 180-nm standard low-voltage CMOS technology. The driver is used for the excitation of ultrasonic transducers with 34 V at a resonance frequency of 220 KHz. A rise time of only 512 nS is achieved. The driver consumes 10.6 mA drawn from a 5-V supply at a pumping frequency of 50 MHz and occupies an area of 0.2 mm2.