Dead Time Setting Research Articles

Analysis on Position Estimation Error of Sensorless Control Based on Square-Wave Injection for SynRM Caused by Dead-Time Harmonic Current

Sensorless control based on high-frequency square-wave voltage injection (HFSVI) is one of the most common sensorless control methods for synchronous reluctance motors (SynRMs). However, the injection frequency for SynRMs cannot be too high due to various factors. As the injection frequency decreases, the dead-time harmonic current will greatly affect the separation of high frequency signals. This paper analyzes the effect of dead-time harmonic current on the HFSVI-based sensorless control performance of SynRMs and proposes a source of position estimation error. Then, a dead-time compensation method suitable for filter-free HFSVI is proposed. It can estimate current vector spatial orientation without any low-pass filters (LPFs) and effectively compensate the impact of dead-time setting. The correctness of the theoretical analysis and the feasibility of the proposed methods in this paper are verified by experiments.

Self-Adaption Dead-Time Setting for the SiC MOSFET Boost Circuit in the Synchronous Working Mode

Self-Adaption Dead-Time Setting for the SiC MOSFET Boost Circuit in the Synchronous Working Mode

Research on Frequency Tracking Technology of High Frequency Induction Equipment

With the development of luxury cruise ships and large offshore platforms, the use of high-frequency electromagnetic heating power sources to replace fireworks for thin steel plate leveling is a new development trend in the shipping and offshore industries. The technical difficulty of high-frequency induction power supplies is frequency track. The frequency tracking circuit in this article uses CD4046 as the core, which not only realizes frequency tracking but also realizes the dead time setting, ensures that the power supply can realize frequency scanning and maximum frequency tracking, and ensures that the circuit always works in resonance or quasi-resonance state, The output is more efficient at this time.

Analysis on the Influence of IGBT Dead Time Setting

The dead time setting of Insulated Gate Bipolar Transistor (IGBT) is usually determined by the calculation formula in Infenion technical documents. The parameters in the calculation formula are often obtained according to manual or empirical values, without considering actual application conditions, which inevitably leads to unreasonable setting. In this paper, several main factors affecting the dead time setting are analyzed. Based on the working principle of semiconductor devices, the influence laws of bus voltage, current and temperature on IGBT dead time setting are analyzed, and then the design experiment is carried out to verify.

Modeling and Implementation of Optimal Asymmetric Variable Dead-Time Setting for SiC MOSFET-Based Three-Phase Two-Level Inverters

Efficiency, power quality, and reliability of SiC MOSFET-based voltage-source converters are significantly affected by the dead-time settings. The conventional fixed dead-time setting can induce large output voltage loss and additional energy loss due to the output capacitance of the SiC MOSFETs and the SiC Schottky barrier diodes or the freewheeling of the diodes, which will be more serious under high switching frequencies. This paper analyzes and models the detailed switching process of the SiC MOSFET half-bridge circuit when various dead-time settings are adopted. Based on the models, an optimal asymmetric variable dead-time (OAVDT) setting is proposed, which can avoid the discharging loss of the output capacitance and redundant freewheeling loss of the diode. The OAVDT setting is realized by adjusting the optimal dead-time in real time after the active device is turned off , which does not require any additional hardware circuits. The OAVDT setting can also reduce the output voltage loss to a certain level compared to the fixed dead-time setting. A three-phase two-level SiC MOSFET inverter has been built in the lab to verify the proposed OAVDT setting. Experimental results show a decrease of power loss by 22.5% with reduced output voltage loss compared to the fixed dead-time setting of 0.28 μs when the output power is 8 kW and the switching frequency is 40 kHz. The proposed OAVDT setting shows clear advantages over that of fixed dead-time setting, especially at light load and high switching frequencies.

Design of Driving and protection circuit for Submodule based on cascaded H-bridge STATCOM

Driving and protection circuit is an important part of power electronics, which is related to safe and stable operation issues in the power electronics. The driving and protection circuit is designed for the cascaded H-bridge STATCOM in this paper. The circuit can realize flexible dead-time setting, operation status self-detection, fault priority protection and detailed fault status uploading. It can help to improve the reliability of STATCOM’s operation. Finally, the proposed circuit is tested and analysed by power electronic simulation software PSPICE (Simulation Program with IC Emphasis) and a series of experiments. Further studies showed that the proposed circuit can realize drive and control the H-bridge circuit, meanwhile it also can realize fast processing faults and have advantage of high reliability.

Model-Based Dead Time Optimization for Voltage-Source Converters Utilizing Silicon Carbide Semiconductors

Dead time significantly affects the reliability, power quality, and efficiency of voltage-source converters. For silicon carbide (SiC) devices, considering the high sensitivity of turn-off time to the operating conditions (> 5× difference between light load and full load) and characteristics of inductive loads (> 2× difference between motor load and inductor), as well as large additional energy loss induced by the freewheeling diode conduction during the superfluous dead time (∼15% of the switching loss), then the traditional fixed dead time setting becomes inappropriate. This paper introduces an approach to adaptively regulate the dead time considering the current operating condition and load characteristics via synthesizing online monitored turn-off switching parameters in the microcontroller with an embedded preset optimization model. Based on a buck converter built with 1200-V SiC MOSFETs, the experimental results show that the proposed method is able to ensure reliability and reduce power loss by 12% at full load and 18.2% at light load (8% of the full load in this case study).

Real-Time Adaption of Dead Time for Single-Phase Autoreclosing

An approach for a real-time adaption of the dead time for autoreclosing on high-voltage lines was proposed. The objective was the optimal adaption of the dead time of a currently running single-phase autoreclosing cycle by calculating the secondary arc current based on measurements. The algorithms for optimization were performed for real-time applications. For this purpose, the fault location plus the load currents of the parallel nonfaulty conductors were measured. The measurement and the calculation of the dead time took place during the fault and the dead-time period. In this way, an optimized dead-time setting with regard to the actual fault location and loading conditions were achieved. This approach results in an online determination of the minimum necessary dead time of a successful reclosing under consideration of the fault location and prevailing loading conditions. Analytical calculations and numerical examples as well as high-voltage field tests verified the results.

Investigation into the turn-off mechanism and time of IGBT based on voltage and current

Based on semiconductor physics and the essential structure of IGBT, the turn-off mechanism of IGBT is deeply discussed regarding the problem of turn-off time changing with voltage and current. The laws of turn-off time changing with voltage and current are deduced, i.e., the turn-off time increases with voltage increasing and decreases with current increasing. The physical mechanisms of the laws are found out. The simulation results and experimental results, demonstrate that the derived and the existing law are constant, thereby proving the correctness of the derived law. It is put forward that the law of IGBT turn-off time changing with current and voltage accords with the complex law of exponent and hyperbola. For further studying the IGBT turn-off mechanism and solving the engineering puzzles including the power electronic dead time setting, the present study is significant in theory and practical application.

Setting Program of Dead Time with No Dead-Time Effect Based on Single-Cycle Control

Based on the studies of the problems occurred in using single-cycle control method to eliminate the electric Power Harmonic, this article proposes a new kind of general dead-time setting method with no dead-time effect and testify the effect of single-cycle controlled three-phase APF, for the problem of the dead-time in bridge inverter.

Measurement of swtitching losses in power transistor structure

Testing device designed for experimental examination of processes in power electronics devices during various switching modes is described. Through the use of auxiliary circuits additional switching modes (ZVS, ZCS) are realized except hard switching, and turning-off with reduced current respectively. The device’s advantage is possibility of fine dead time setting, allowing us analyzing effects of this phenomenon on measurements of commutation losses. Ill. 12, bibl. 10 (in English; summaries in English, Russian and Lithuanian).

The importance of a correct dead time setting in isotope ratio mass spectrometry: Implementation of an electronically determined dead time to reduce measurement uncertainty

Dead time determinations on a mass spectrometry system with ion counting detection can either be done using an isotope ratio measurement approach or via electronic examination of individual components, e.g., the pulse amplifier. Depending on the dead time of each component in the signal chain, the electronically determined result may not represent the true value for the total system, i.e., there might be a series of hardware related dead times. However, a hardware set artificial dead time in the pulse counting system that is long enough might yield a system dead time that can be represented by this set dead time solely. It is shown in this work that a carefully chosen, artificially introduced set dead time yields a system that may be characterized to a much lower uncertainty than is possible using ratio-based measurement approaches. Ultimately, the impact of the dead time on the combined uncertainty of an isotope abundance ratio measurement may be negligible even at very high count rates, i.e., >1 Mcps. In other words, incorporating the dead time contribution in a combined uncertainty calculation would no longer be necessary.