Crystalline Gate Research Articles

High-performance flexible photodetectors based on GaTe nanosheets.

2D layered GaTe materials have attracted a great deal of attention for optoelectronic applications due to their direct band structure, whether in bulk or as a single layer. In this paper, for the first time, we have synthesized high quality, single crystalline GaTe nanosheets by employing a facile CVD method. The size of the GaTe nanosheets reached several tens of micrometers, and some of them even exceeded 100 μm. In particular, planar GaTe nanosheets were achieved on a mica substrate following a van der Waals epitaxial growth mechanism. Further, through a systematic comparison of the performances under various conditions, we found that adsorbates on the GaTe surface under ambient conditions strongly deteriorated the GaTe photodetector device performance. After removing the adsorbates in a ∼ 7 × 10(-5) torr vacuum, a flexible, fast response GaTe photodetector with a high photoresponse, high mechanical stability and an excellent linear input-output relationship was obtained. The results presented in this study suggest that the GaTe nanosheets grown by a CVD method are promising candidates for optoelectronic applications in the future.

Impact of the crystallization of the high-k dielectric gate oxide on the positive bias temperature instability of the n-channel metal-oxide-semiconductor field emission transistor

The positive bias temperature instability (PBTI) characteristics of the n-channel metal-oxide-semiconductor field emission transistors which had different kinds of high-k dielectric gate oxides were studied with the different stress-relaxation times. The degradation in the threshold voltage followed a power-law on the stress times. In particular, we found that their PBTI behaviors were closely related to the structural phase of the high-k dielectric gate oxide. In an amorphous gate oxide, the negative charges were trapped into the stress-induced defects of which energy level was so deep that the trapped charges were de-trapped slowly. Meanwhile, in a crystalline gate oxide, the negative charges were trapped mostly in the pre-existing defects in the crystallized films during early stage of the stress time and de-trapped quickly due to the shallow energy level of the defects.

Crystalline ZrO2-gated Ge metal-oxide-semiconductor capacitors fabricated on Si substrate with Y2O3 as passivation layer

By adopting an amorphous Y2O3 passivation layer, which provides a wide band gap and well passivates Ge surface without the presence of GeOx, a high-permittivity (κ) crystalline ZrO2/Y2O3 stack was explored as the gate dielectric for Ge metal-oxide-semiconductor (MOS) devices on Si substrate. The crystalline ZrO2 is a Ge stabilized tetragonal/cubic dielectric with the κ value of 36.1 and was formed by depositing a ZrO2/Ge/ZrO2 laminate and a subsequent 500 °C annealing. The high-κ crystalline ZrO2/Y2O3 gate stack shows promising electrical characteristics in terms of low interface trap density of 5.8×1011 cm−2 eV−1, negligible hysteresis, and leakage current of 5.6×10−4 A/cm2 at gate bias of flatband voltage (VFB) 1 V for equivalent oxide thickness of 1.13 nm. This gate stack not only demonstrates the eligibility for advanced Ge MOS devices but introduces a more reliable process to form a high-κ crystalline gate dielectric.

Tetragonal $\hbox{ZrO}_{2}/\hbox{Al}_{2}\hbox{O}_{3}$ Stack as High-$\kappa$ Gate Dielectric for Si-Based MOS Devices

Abstract-The combination of tetragonal ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> (t-ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> ) and amorphous Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> was explored as the gate dielectric for Si-based MOS devices. Because of the absence of a ZrSiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">4</sub> and/or ZrSi interfacial layer, the thermally stable t-ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /Si stack is more eligible than the Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> /t-ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /Si stack for the gate dielectric since it demonstrates larger capacitance, smaller hysteresis, better frequency dispersion, lower leakage current, and more robust reliability. By employing additional NH <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> plasma nitridation to well passivate the grain boundaries of the t-ZrO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> film, without compromising its κ-value, a greatly reduced leakage current of 2.9 × 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-8</sup> A/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> can be achieved at gate bias of flatband voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">fb</sub> )-1 V with an effective oxide thickness of 1.64 nm, which paves a new way to develop a high-performance crystalline gate dielectric for advanced MOS devices.

Ge-stabilized tetragonal ZrO2 as gate dielectric for Ge metal-oxide-semiconductor capacitors fabricated on Si substrate

A Ge-stabilized tetragonal ZrO2 (t-ZrO2) film formed by incorporating Ge atoms thermally driven from an underlying Ge layer into a ZrO2 film was investigated as the gate dielectric for Ge metal-oxide-semiconductor (MOS) capacitors fabricated on a Si substrate. A sole t-ZrO2 film on Ge is not eligible for the gate dielectric because of the poor interface quality. By using a thermally-grown ultrathin GeO2 film as an interfacial layer, the t-ZrO2/GeO2/Ge stack shows improved interface characteristics and a permittivity (κ) value of 36.6 for the t-ZrO2. In addition, the stack also demonstrates good leakage current since the amorphous GeO2 layer terminates grain boundary channels in the crystalline ZrO2. Further leakage current suppression can be achieved by a H2 annealing of the t-ZrO2/GeO2/Ge stack since the defects at grain boundaries can be effectively passivated, which makes a leakage current of 1.08×10−6 A/cm2 at VFB−1 V for effective oxide thickness of 1.66 nm and paves an alternative avenue to develop a high-performance crystalline gate dielectric for Ge MOS devices.

Tensile Strain in Si Due to Expansion of Lattice Spacings in CeO2 Epitaxially Grown on Si(111)

The strain in Si, on which a single-crystalline gate oxide was epitaxially grown, was investigated by evaluating lattice spacings in and Si. In-plane X-ray diffraction measurements and observations of electron diffraction patterns by a transmission electron microscope were performed to examine the lattice spacings precisely. It was found that the lattice spacings in epitaxial isotropically expanded by ∼1%, compared with those in bulk polycrystalline The oxygen-defect-induced state was observed in the valence bandedge by X-ray photoelectron spectroscopy measurements. The decrease of the coulombic interaction in ionic oxide due to the oxygen defects may induce the expansion of the lattice spacings in It was clarified that Si at 50 nm depth from the interface was tensile strained owing to the expansion of the lattice spacings in Oxygen defects in epitaxial crystalline gate dielectrics must be controlled by taking account of Si channel properties. © 2004 The Electrochemical Society. All rights reserved.

Band-to-band transitions and free exciton states in low-symmetry crystalline GaTe

In this paper we derived the selection rules for band-to-band transitions in low-symmetry crystalline GaTe and explained the low-temperature (2 K) absorption spectra at two different polarization configurations for this material. It is found that the top two valence bands of crystalline GaTe at the high symmetry Γ-point have one-dimensional degeneracy and are weakly separated (<0.5 meV). From this band structure, we re-analyzed the free exciton states in crystalline GaTe and found that the X 1 peak is composed of the heavy-hole (HH) and light-hole (LH) singlet excitons, while the X 2 peak is composed of the HH and LH triplet excitons.

Luminescence linewidth study of two free exciton peaks in crystalline GaTe

We study the low-temperature homogeneous photoluminescence linewidths for the free exciton singlet and triplet peaks in crystalline GaTe. Good agreement is obtained between the theoretical and experimental results. We found that the effective temperature for singlet excitons in GaTe is probably higher than that of triplet excitons at low temperatures and low excitation intensities.

Possibility of coherent light emission from excitons in crystalline GaTe.

Free exciton photoluminescence (PL) spectra of crystalline GaTe has been studied as a function of continuous wave (cw) argon laser excitation intensity at T=6 K. When the excitation intensities are low (P4 W ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}2}$), the integrated PL intensities of free excitons for both singlet and triplet states increase approximately linearly with increasing excitation intensity. From about 4 to 9 W ${\mathrm{cm}}^{\mathrm{\ensuremath{-}}2}$, the peak energy redshift, the linewidth broadening, and the sharp increase of the integrated PL intensity of the exciton peaks are observed. These results are explained tentatively as large coherent emissions from excitons of GaTe. \textcopyright{} 1996 The American Physical Society.

Free-exciton states in crystalline GaTe.

Polarized properties of both the singlet and triplet ground exciton states in the photoluminescence and transmission spectra of crystalline GaTe are explained based on the possible symmetry properties of the energy band edge of GaTe. Some experimental results about excited exciton states in GaTe are presented and discussed. The energy positions of exciton series in GaTe follow the three-dimensional direct allowed Wannier exciton formula just as in the the other III-VI layered compounds of GaSe and InSe. The nonthermalized, ``hot'' nature of excitons inside GaTe under higher optical excitation intensities is also discussed.

Temperature dependence of free-exciton photoluminescence in crystalline GaTe.

We present a photoluminescence study of the free-exciton singlet and triplet ground states in GaTe as a function of temperature from 5 to 40 K. Over the range 5-25 K, the temperature variation of excitonic-emission linewidth and peak energy comes mainly from exciton-acoustic-phonon interactions via the deformation potential. The contribution from exciton scattering by optical phonons of energy 14 meV begins at temperatures above ∼25 K. The exciton-optical-phonon interaction is the dominant scattering process above 30 K and effectively dissociates excitons since the energy of the optical phonon mode is close to the exciton binding energy. The luminescence thus decreases rapidly above 30 K and disappears at about 40 K