CPU Efficiency Research Articles

Cache write generate for parallel image processing on shared memory architectures

We investigate cache write generate, our cache mode invention. We demonstrate that for parallel image processing applications, the new mode improves main memory bandwidth, CPU efficiency, cache hits, and cache latency. We use register level simulations validated by the UW-Proteus system. Many memory, cache, and processor configurations are evaluated.

A Transformed Pressure Head‐Based Approach to Solve Richards' Equation for Variably Saturated Soils

This paper presents a new approach to solve Richards' equation. It introduces a nonlinear transformed pressure, Pt, as the dependent variable with the modified Picard method. The new approach was compared to, and contrasted with, two efficient existing methods: the ϕ‐based transformation method (Kirkland et al., 1992), and the h‐based modified Picard method (Celia et al., 1990). A total of 12 different one‐dimensional cases were considered (saturated, unsaturated, layered and uniform soil profiles, with pressure and flux type boundary conditions). The results show that the new method offers excellent CPU efficiency and, unlike the h‐based method, is numerically robust for all cases of variably saturated, heterogeneous media, and first or second type boundary conditions. The method does not require difficult numerical coding, and its CPU efficiency is not affected by complicated heterogeneous and hysteretic media. The Pt transformation is easy to incorporate into existing h‐based codes.

Algorithms for solving Richards' equation for variably saturated soils

Previous work has shown that a one‐dimensional water content‐based finite difference algorithm can offer improved CPU efficiency in modeling infiltration into very dry heterogeneous soil when compared to similar pressure‐based algorithms. The usefulness of the water content‐based method is limited, however, since it cannot be applied to saturated soils. In this paper we develop two new methods which retain the advantages of water content‐based methods while still permitting fully saturated conditions. In the first method we define a new variable for the transformed Richards equation which has the characteristics of water content when soil is unsaturated and of pressure when soil is at or near saturation. In addition to the transformed Richards' equation method, an improved pressure‐based method which uses flux updating is presented. Both methods are implemented in algorithms using a preconditioned conjugate gradient method equation solver. The performance of the algorithms is compared to that of an algorithm based on a mixed form of Richards' equation using modified Picard iteration. Two test cases are examined. The first test case examines two‐dimensional infiltration into very dry heterogeneous soil which remains unsaturated throughout the simulation period. The second test case examines a two‐dimensional developing perched water table. Results indicate that the new methods retain the advantages of the water content‐based method for fully unsaturated heterogeneous problems while allowing for fully saturated conditions. For the unsaturated problem the new algorithms were from 16 to 59 times faster than the algorithm based on the mixed form of Richards' equation using modified Picard iteration. For the saturated problem the new algorithms were from 6 to 25 times faster than the mixed base algorithm. Results also indicate that the performance of the mixed base algorithm could be significantly improved if a more effective adaptive time step were developed.

Vectorization of tree traversals

A simple method for vectorizing tree searches, which operates by processing all relevant nodes at the same depth in the tree simultaneously, is described. This procedure appears to be general, assuming that gather-scatter operations are vectorizable, but is most efficient if the traversals proceed monotonically from the root to the leaves, or vice versa. Particular application is made to the hierarchical tree approach for computing the self-consistent interaction of N bodies. It is demonstrated that full vectorization of the requisite tree searches is feasible, resulting in a factor ∼4–5 improvement in cpu efficiency in the traversals on a CRAY X-MP. The overall gain in the case of the Barnes-Hut tree code algorithm is a factor ∼2–3, implying a net speed-up of ≈400–500 on a CRAY X-MP over a VAX 11/780 or SUN 3/50.

A system for critical path analysis based on back annotation and distributed interconnect impedance models

This paper describes a VLSI CAD system that automatically selects optimal interconnect impedance models and embeds them into circuit simulation files each identified as a critical worst case timing path. The CAD system initially identifies pre-layout critical timing paths and back annotates these paths with post-layout interconnect impedances. Accurate post-layout resistive and capacitive interconnect impedances are automatically extracted, their magnitudes are compared to the path specific device dependent RC loads of each cell-to-cell node, and an approapriate RC lumped model is selected to optimally model the distributed nature of the RC interconnect impedance of that particular cell-to-cell node. These inter-connect RC impedance models are then back annotated into a SPICE formatted circuit simulation file for the precise determination of the timing behaviour of these critical paths. Therefore, timing accuracy and CPU efficiency are optimised on a node by node basis. This analysis system is tailored to support high performance circuits while maintaining automated layout database independence and maximal design flexibility.

Analysis of free-storage algorithms-visited

Most research in free-storage management has centered around strategies that search a linked list and strategies that partition storage into predetermined sizes. Such algorithms are analyzed in terms of CPU efficiency and storage efficiency. The subject of this study is the free-storage management in the Virtual Machine/System Product (VM/SP) system control program. As a part of this study, simulations were done of established, and proposed, dynamic storage algorithms for the VM/SP operating system. Empirical evidence is given that simplifying statistical assumptions about the distribution of interarrival times and holding times has high predictive ability. Algorithms such as first-fit, modified first-fit, and best-fit are found to be CPU-inefficient. Buddy systems are found to be very fast but suffer from a high degree of internal fragmentation. A form of extended subpooling is shown to be as fast as buddy systems with improved storage efficiency. This algorithm was implemented for VM/SP, and then measured. Results for this algorithm are given for several production VM/SP systems.

Hardware switch for DMA transfer to augment CPU efficiency

Direct memory access is used in many computer systems to transfer blocks of data between main memory and high-speed peripherals. Two methods are in common use: one where the CPU is halted and isolated from the memory bus, and one where DMA activity is interleaved with that of the CPU. In some cases, it would be better to transfer data blocks while the background CPU activity is not impaired. This paper discusses such a system, using two separate blocks of memory, controlled by a hardware switch. The configuration used involves a master and slave programs, and allows high-speed transfer without affecting the processor's activity

Performance evaluation studies for time-sharing computer systems

This paper reviews the work carried out in evaluating the performance of time-sharing computer systems in terms of performance measures such as response time, CPU efficiency. CPU productivity, etc. The review indicates that most of the work is limited to processor-sharing systems in which the quantum size tends to zero. Models with finite state-dependent quantum size needs to be developed further to be useful for system designers and operations managers of time-sharing systems. Other areas requiring further analytical work have been highlighted at the end of the paper.

A simulation approach to the comparative analysis of various job scheduling methods

A simulation approach to the comparative analysis of different job scheduling methods with regard to CPU efficiency, the job throughput, and the job waiting time is presented. The job-processing simulation model is implemented in PL/1. In order to consider several possible dynamic situations for the job-scheduling methods, we simulated the job starting from its entry at the RJE (remote job entry) terminal until the job leaves the system, which includes an IBM 370/158 and AMDAHL 470 V/7. In particular, a Fourier series is used to predict the required CPU time for the job and to assign dynamically the internal priority for CPU scheduling. A detailed summary of conclusions that can be drawn from the simulation is given.

Changes of source coding to produce a 43 percent increase in CPU efficiency in the program for “reduction to the magnetic pole using a fast fourier series algorithm”

Changes of source coding to produce a 43 percent increase in CPU efficiency in the program for “reduction to the magnetic pole using a fast fourier series algorithm”

Feedback coupled resource allocation policies in the multiprogramming-multiprocessor computer system

This paper presents model studies of some integrated feedback-driven scheduling systems for a multiprogrammed computer system. This abstract can present only the conclusions of the studies and little of the supporting data and detail. The basic format of the analysis is to fix a size for the local buffers and a total size for the collection buffers, to define a set of algorithms for the determination of the data removal quanta to the local buffers, the allocation of space in the collection buffers, and the look-ahead mechanism for input and then to evaluate the relative merits of the various strategies by the resulting CPU efficiency. Three feedback algorithms are studied as examples in this work.