Computer Performance Evaluation Research Articles

Multivariate rational approximants for multiclass closed queuing networks

Closed Markovian networks of queues with multiclass customers and having a product form equilibrium state probability distribution are useful in the performance evaluation and design of computer and telecommunication systems. Therefore, the efficient computation of the normalizing function, the key element of the solution in product form, has attracted considerable effort. We consider a network that consists of one infinite-server (IS) station and one processor-sharing (PS) or FCFS single-server station. We use multivariate Newton-Pade approximants computed from data for small numbers of customers in each class, to estimate the normalizing function for a larger population in the network. The effectiveness and tremendous gain in computing time of this procedure are illustrated through various numerical experiments.

Integrated Computational Life-Cycle Assessment of Buildings

A computational tool has been developed for the environmental evaluation of building designs. Construction and operation of buildings is a major cause of resource depletion and environmental pollution. Computational performance evaluation tools can support the decision making in the area of environmentally responsive building design and play an important role in environmental impact assessment, especially when a life-cycle assessment approach is used. For comprehensive environmental impact analysis to be realized in a computational support tool for the building design domain, such tools must have the following three characteristics: (1) An analysis method that considers the life cycle of building construction, operation, and decommissioning; (2) a representation that is able to accommodate the data and computability requirements of the analysis method and tool; and (3) be integrated within a multiaspect design analysis environment that can provide data on environmentally relevant building operation criteria. This paper describes a computational tool, ECOLOGUE, developed in response to these requirements. However, limitations remain in terms of data availability and the precision of the environmental impact assessment methods.

A framework for computer performance evaluation using benchmark sets

Benchmarking is a widely used approach to measure computer performance. Current use of benchmarks only provides running times to describe the performance of a tested system. Glancing through these execution times provides little or no information about system strengths and weaknesses. A novel benchmarking methodology is proposed to identify key performance parameters; the methodology is based on measuring performance vectors. A performance vector is a vector of ratings that represents delivered performance of primitive operations of a system. In order to measure performance vectors, a geometric model is proposed which defines system behavior using the concepts of support points, context lattice, and operating points. In addition to the performance vector, other metrics derivable from the geometric model include the variation in system performance and the compliance of benchmarks. Using this methodology, the performance vectors of the Sun SuperSPARC (desktop workstation) and the Cray C90 (vector supercomputer) are evaluated using the SPEC benchmarks and the Perfect Club, respectively. The proposed methodology respects several practical constraints and issues in benchmarking. The instrumentation required is minimal. The benchmarks used are realistic (not synthetic) in order to reflect the delivered (not peak) performance. Finally, operations in the performance vector are not measured individually since there may be significant interplay in their executions.

Performance Evaluation of Computer and Telecommunications Systems

Performance Evaluation of Computer and Telecommunications Systems

A generalized analysis technique for queuing networks with mixed priority strategy and class switching

A very well-known and popular technique for the performance evaluation of current computer, communication and operating systems is analytical modeling based on queuing networks because they are easy to understand and use compared to other modeling techniques. For so called product form queuing networks efficient exact and approximate analysis algorithms exist but most queuing networks of realistic systems do not fulfill the requirements of product form queuing networks. To solve this kind of networks Markovian analysis or discrete event simulation is used. The disadvantage of these techniques is that they are very time consuming to prepare, implement and run, especially when we want to analyze the system on a wide range of parameter values. Problems that appear very often in realistic systems are priorities with and without preemption, mixed priorities and class switching. These problems appear in many fields of computer and telecommunications systems. In this paper we show how to transform a queuing network that cannot be solved because of the above restrictions into a network that can be solved using a standard analysis technique (like MVA, SCAT, Convolution). The applicability of the technique is shown on an example of Cellular Mobile Communications Networks with Multimedia Services.

Performance Evaluation of Computer and Telecommunication Systems

Performance Evaluation of Computer and Telecommunication Systems

Performance Evaluation of Computer and Telecommunication Systems

Performance Evaluation of Computer and Telecommunication Systems

TELPACK: an advanced teletraffic analysis package

The performance evaluation of computer and communication networks gives rise to teletraffic problems of potentially large dimensionality. We summarize a unifying system theoretic approach to efficient solution of a diversity of such problems, and introduce TELPACK, a publicly available software that implements this approach.

Parametric Simulation Of A Dataflow Performance Model

Conventional performance evaluation models for multiprocessor systems cannot be directly applied to express the behavior of a dataflow computer architecture because of the different characteristics of the architectures. The conventional performance models do not take into account all the important architectural characteristics in formulating the performance of the target systems. Even though some queuing models have been proposed for the performance evaluation of the dataflow computers, they do not include such important performance factors as firing rules, organization of processing elements, and thread-scheduling overheads. The authors propose a novel performance evaluation model based on dataflow semantics, and present the simulation results using the parametric values of the important performance factors. The proposed model not only offers solutions for most problems appearing in the conventional performance evaluation models, but also provides more expressive power than the previous ones.

A comparative workload-based methodology for performance evaluation of parallel computers

A practical methodology for evaluating and comparing the performance of distributed memory Multiple Instruction Multiple Data (MIMD) systems is presented. The methodology determines machine parameters and program parameters separately, and predicts the performance of a given workload on the machines under consideration. Machine parameters are measured using benchmarks that consist of parallel algorithm structures. The methodology takes a workload-based approach in which a mix of application programs constitutes the workload. Performance of different systems are compared, under the given workload, using the ratio of their speeds. In order to validate the methodology, an example workload has been constructed and the time estimates have been compared with the actual runs, yielding good predicted values. Variations in the workload are analysed in terms of increase in problem sizes and changes in the frequency of particular algorithm groups. Utilization and scalability are used to compare the systems when the number of processors is increased. It has been shown that performance of parallel computers is sensitive to the changes in the workload and therefore any evaluation and comparison must consider a given user workload. Performance improvement that can be obtained by increasing the size of a distributed memory MIMD system depends on the characteristics of the workload as well as the parameters that characterize the communication speed of the parallel system.

Multiresolution analysis and denoising of computer performance evaluation data with the wavelet transform

The Wavelet Transform Analysis (WTA) offers the possibility to decompose a time series into both time and scale components. The paper applies Wavelet Transform to analyze computer performance measurement data. This type of data forms a time series that is treated and analyzed as any other signal. A noise reduction technique that detects noise components by analyzing the evolution of the Wavelet Transform modulus maxima across scales is adapted in order to improve the quality of computer performance data. This method allows to effectively remove the induced noise from measurement inaccuracies and transient random events.

CISC, RISC and DSP processors in real-time signal processing and control

This paper presents an investigation into the performance evaluation of advanced complex instruction set computer (CISC) processors, reduced instruction set computer (RISC) processors and digital signal processing (DSP) devices in the real-time implementation of signal processing and control algorithms. The algorithms considered are of varying degree of regularity relative to one another. These include a fast Fourier transform algorithm, a second-order correlation algorithm, two adaptive filtering algorithms, a simulation algorithm of a flexible manipulator system and simulation, identification and active vibration control algorithms of a flexible beam system. The algorithms are implemented on an 80486DX2 CISC processor, an 80386DX CISC processor, a SPARC TMS390S10 RISC processor, a T805 RISC processor, an 80i860 RISC processor and a TMS320C40 DSP device. The hardware and software resources and capabilities of the processors and the characteristics of the algorithms are discussed to provide a matching between the algorithms and the architectures. Finally, a comparison of the results of the implementations, on the basis of real-time computation performance, is made and discussed.

SPEC as a performance evaluation measure

Potential computer system users or buyers usually employ a computer performance evaluation technique only if they believe its results provide valuable information. System Performance Evaluation Cooperative (SPEC) measures are perceived to provide such information and are therefore the ones most commonly used. SPEC measures are designed to evaluate the performance of engineering and scientific workstations, personal vector computers, and even minicomputers and superminicomputers. Along with the Transaction Processing Council (TPC) measures for database I/O performance, they have become de facto industry standards, but do SPEC's evaluation outcomes actually provide added information value? In this article, we examine these measures by considering their structure, advantages and disadvantages. We use two criteria in our examination: are the programs used in the SPEC suite properly blended to reflect a representative mix of different applications, and are they properly synthesized so that the aggregate measures correctly rank computers by performance? We conclude that many programs in the SPEC suites are superfluous; the benchmark size can be reduced by more than 50%. The way the measure is calculated may cause distortion. Substituting the harmonic mean for the geometric mean used by SPEC roughly preserves the measure, while giving better consistency. SPEC measures reflect the performance of the CPU rather than the entire system. Therefore, they might be inaccurate in ranking an entire system. To remedy these problems, we propose a revised methodology for obtaining SPEC measures. >

Hypercube communication delay with wormhole routing

We present an analytical model for the performance evaluation of hypercube computers. This analysis is aimed at modeling a deadlock-free wormhole routing scheme prevalent on second generation hypercube systems. Probability of blocking and average message delay are the two performance measures discussed. We start with the communication traffic to find the probability of blocking. The traffic analysis can capture any message destination distribution. Next, we find the average message delay that consists of two parts. The first part is the actual message transfer delay between any source and destination nodes. The second part of the delay is due to blocking caused by the wormhole routing scheme. The analysis is also extended to virtual cut-through routing and random wormhole routing techniques. The validity of the model is demonstrated by comparing analytical results with those from simulation.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Application of a parallel computer to simulation of ion trajectories in an ion cyclotron resonance spectrometer

AbstractA parallel computer was used to calculate ion trajectories in the cell of an ion cyclotron resonance spectrometer. Computation was carried out 512 ions simultaneously. Ion‐cloud evolution in a non‐uniform electric field and ion/neutral collision processes were introduced to demonstrate the capability of parallel computation. The performance evaluation of a parallel computer was fulfilled.

A production-based approach to performance evaluation of computing technology

Computer performance evaluation methods have traditionally focused on purely technical factors and emphasized the analysis of isolated operating details, often on the component device level. To improve a system's cost performance ratio, however, we must understand how purely technical factors contribute to computer system productivity from a production perspective (e.g., the system's ability to process transactions, given resources consumed). A new methodology to evaluate the efficient use of computing technology is presented in this article. A production system model to specify transformation of computing technology resources (e.g., CPU cycles, I/O activity, memory utilization) via an assumed (but unknown) production function into products (e.g., executable programs) and computing services (e.g., transactions processed) is introduced. Computing technology is evaluated in terms of its ability to generate outputs (products and services), given inputs (resources) used. Conditions of relatively most efficient use of computing technology in comparison to relatively least efficient use are identified.

Performance Evaluation of Computer Aided Screening System Using Probability Model

Performance Evaluation of Computer Aided Screening System Using Probability Model

System and real performance evaluation of computer

The purpose of this paper is to review some methods for efficiency evaluation of universal computer systems. This paper is continued of [1] and concerns the measurements and analytical modeling for performance evaluation on system and real levels.

Block coding capacity of high bit rate digital subscriber lines by the structured channel signaling technique

Self near-end crosstalk (NEXT) is assumed to be the dominant source of impairment, and the subscriber loop configuration is governed by carrier serving area (CSA) design rules. The structured channel signaling (SCS) technique decomposes the physical channel into multiple parallel independent signaling subchannels by exploiting the combined eigenstructure of the channel and the correlation of the (NEXT) interference. Computer performance evaluation studies reveal two distinct patterns. For a given loop configuration, as the block length increases, the coding gain usually increases, and for a fixed block code length, the coding gain degrades as the loop length (including bridged taps) increases. For loops at the extreme range of a CSA, block codes of at least 20 symbols are required to achieve a performance commensurate with that of a decision feedback equalizer (DFE) composed of an optimal nine-tap minimum mean-square error (MMSE) feedforward filter and an ideal feedback canceler.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A markov process model for software reliability analysis

AbstractSoftware reliability is a rapidly developing discipline. In this paper we model the fault‐detecting processes by Markov processes with decreasing jump intensity. The intensity function is suggested to be a power function of the number of the remaining faults in the software. The models generalize the software reliability model suggested by Jelinski and Moranda (‘Software reliability research’, in W. Freiberger (ed.), Statistical Computer Performance Evaluation, Academic Press, New York, 1972. pp. 465–497). The main advantage of our models is that we do not use the assumption that all software faults correspond to the same failure rate. Preliminary studies suggest that a second‐order power function is quite a good approximation. Statistical tests also indicate that this may be the case. Numerical results show that the estimation of the expected time to next failure is both reasonable and decreases relatively stably when the number of removed faults is increased.