Compact Bipolar Transistor Model Research Articles

Experimental Determination, Modeling, and Simulation of Nonlinear Thermal Effects in Bipolar Transistors under Static Conditions: A Critical Review and Update

This paper presents a comprehensive overview of nonlinear thermal effects in bipolar transistors under static conditions. The influence of these effects on the thermal resistance is theoretically explained and analytically modeled using the single-semiconductor assumption. A detailed review of experimental techniques to extract the thermal resistance as a function of backside temperature and/or dissipated power from DC measurements is provided; advantages, underlying approximations, and limitations of all methods are clarified, and guidelines for their correct application are given. Accurate FEM thermal simulations of an InGaP/GaAs and a Si/SiGe HBT are performed to verify the accuracy of the single-semiconductor theory. The thermal resistance formulations employed in the most popular compact bipolar transistor models for circuit simulators are investigated, and it is found that they do not properly describe nonlinear thermal effects. Alternative implementations of the more accurate single-semiconductor theory are then proposed for the future versions of the compact models.

Implementation of Delay-Time-Based Nonquasi-Static Bipolar Transistor Models in Circuit Simulators

We found that for a correct simulation of nonquasi-static (NQS) effect in compact bipolar transistor models, a dynamic or small-signal transit time must be used instead of the classical dc transit time. It is shown that the dynamic transit time is slowed down compared with the dc transit time of the intrinsic device owing to the bias-dependence of the latter. Since the instance value of the dynamic transit time is needed at the operating point, a formerly proposed scaling technique is used. The model shows perfect agreement with a widely accepted theoretical approach as well as with numerical device simulation.

Modeling of MOS-Side Carrier Injection in Trench-Gate IGBTs

A compact trench-gate insulated-gate bipolar transistor model that captures MOS-side carrier injection is developed. The model retains the simplicity of a 1-D solution to the ambipolar diffusion equation, but at the same time, captures the MOS-side carrier injection and its effects on steady-state carrier distribution in the drift region and on switching waveforms.

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part II: parameter extraction and experimental results

A compact bipolar transistor model was presented in Part I that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM but at the same time, from a computational point of view, suitable for simulating large circuits. In Part II, a parameter determination procedure is described and demonstrated for a variety of SiGe process technologies.

A computationally efficient physics-based compact bipolar transistor model for circuit Design-part I: model formulation

A compact bipolar transistor model is presented that combines the simplicity of the SPICE Gummel-Poon model (SGPM) with some major features of HICUM. The new model, called HICUM/L0, is more physics-based and accurate than the SGPM and at the same time, from a computational point of view, suitable for simulating large circuits. The new model has been implemented in Verilog-A and, as compiled code, in various commercial circuit simulators. In Part I, the fundamental model formulation is presented along with a derivation of the most important equations. Experimental results are shown in Part II.

Implementation of nonquasi-static effects in compact bipolar transistor models

Large-signal implementation of nonquasi-static (NQS) effects in bipolar transistors is reviewed. An approach is proposed to introduce first-order NQS correction to typical quasi-static phenomenological models. Both charge- and noncharge-conserving implementations are considered. The resulted large-signal equivalent-circuit model compares well with the two-dimensional physical model in simulating HBT transient response under high-current operations. The present approach advances the state-of-the-art by allowing arbitrary bias dependence of transit times in large-signal NQS models.

Staying current with HICUM

This article provides an overview on the basic operation principle of the advanced physics-based compact bipolar transistor model HICUM (high-current model), which keeps pace with the rapid progress in high-speed circuits for wireless and fiber-optic communications. HICUM uses the small-signal parameters, such as the depletion capacitances and the transit times, as basic variables, which are described accurately as a (nonlinear) function of bias, temperature, and geometry. This results in not only continuously differentiable relations for charges and transfer current but also accurate modeling of the large-signal switching behavior, including harmonic distortion at high frequencies. A few examples are presented to provide a feeling for the model's capabilities in an industrial environment.

Characterization and modeling of avalanche multiplication in HBTs

The accurate modeling of weak avalanche breakdown of HBTs in compact bipolar transistor models for circuit simulation is presented. Based on various device electrical characteristics that are grouped into three classes, a modified VBIC avalanche multiplication model is proposed. By simply replacing one constant avalanche model parameter with current linear dependence, the new model predicts well broad behaviors of breakdown from weak avalanche up into high level injections.

VBIC95: an improved bipolar transistor model

A new compact bipolar transistor model for circuit simulators that has already received widespread support in the industry, is considered. The model, VBIC95, was constructed to be the industry standard replacement for the aging SPICE Gummel-Poon model (SGP). Users of the 20-year-old SGP model have found it to be inadequate in representing, many of the physical effects important in modern bipolar transistors used in analog and mixed-signal microcircuits. VBIC95 advantages include: 1. Improved static temperature modeling; 2. Correct implementation of the Early effect; 3. An improved forward-biased junction capacitance option; 4. Inclusion of overlap capacitance; 5. Null high-current modeling (updated with NPN V/sub sat/ equations); 6. Improved high-level diffusion capacitance modeling; 7. Inclusion of substrate transistor with R/sub c/ and variable Beta; 8. Approximate accounting for distributed effects in the input circuit; 9. Consistent treatment of excess phase in transient and small signal analyses; 10. Models weak avalanche effect; 11. All equations differentiable to a high order; 12. Distributed input impedance models AC emitter crowding; and 13. No special test structures required thus minimizing problems with extracting the new model parameters from old data.

A compact bipolar transistor model for very-high-frequency applications with special regard to narrow emitter stripes and high current densities

In advanced silicon bipolar technologies very narrow emitter stripes can be realized. As a consequence, the transistors in high-frequency (h.f.) ICs should be operated at high current densities in order to obtain maximum operating speed. Therefore, in this paper a semi-physical compact transistor model is presented which is proven to be well suited for simulating analog h.f. ICs up to f T even in the high-current region. It is based on an improved version of the transistor model HICUM which has first been described in[1,2] and which was successfully applied for designing high-speed digital circuits. The model presented here, however, is not only superior in very-high-frequency applications but also in modeling narrow-emitter transistors. These advantages are obtained by accurately taking into account non-quasi-static transistor behavior, h.f. emitter current crowding, and emitter-periphery effects, as well as by improving the operating point dependence of basic parameters. Due to the physical nature of the model, the elements of the equivalent circuit can easily be calculated for arbitrary transistor geometries at arbitrary operating points and temperatures from a single set of specific electrical and technological data. This makes the model very well suited for circuit optimization. The compact model, which has been implemented in SPICE, was successfully verified by means of two-dimensional device simulations based on the doping profile of a real self-aligned double-polysilicon transistor. In order to be sure that verifying the compact model by device simulations replaces the measurements correctly, the model parameters were determined by device simulation too, but applying the methods used for experimental parameter extraction.

Compact bipolar transistor model for circuit simulation

The Gummel-Poon model is improved for more accurate bipolar transistor circuit simulation. In the present model, the junction capacitance model accounts for more physical effects and, with the aid of a two-dimensionational device simulator (PISCES), the junction voltage nodes are more explicitly and accurately defined than by the Gummel-Poon model. To demonstrate its applications in computer-aided circuit design, the present model is implemented in a circuit simulator (SLICE) and subsequently verified using PISCES similation.

Avalanche multiplication in a compact bipolar transistor model for circuit simulation

A simple weak avalanche model valid in a wide range of voltages and currents, is presented. The proposed model is derived by using the base-collector depletion capacitance for predicting the avalanche current. The model needs only one additional transistor parameter; the extraction method and temperature dependence of this parameter are discussed. The decrease in avalanche current for high collector current densities may originate from internal device heating, a voltage drop in the epilayer, or mobile carriers in the depleted part. From experimental results it is concluded that, below a critical hot-carrier current, the decrease in avalanche current due to mobile carriers is negligible.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Modeling of bipolar transistor using integral charge-control model with application to third-order distortion studies

A compact bipolar transistor model [integral charge-control model (ICM)] has recently been developed that intrinsically includes many high-level effects (for example, conductivity modulation, base push-out effect, Early effect, and impact ionization). This paper presents a detailed characterization of a high-frequency silicon bipolar transistor using the ICM, with sufficient accuracy to allow calculation of intermodulation distortion. A set of electrical measurements for extracting ICM model parameters is described, and the method of extraction is discussed in detail. Finally, calculated values of second- and third-order distortion produced signals are compared with measured values and are found to be in good agreement, which demonstrates the accuracy of the ICM.