Common-mode Noise Research Articles

Design and Assessment of a New Active CM Filtering Architecture for PWM Inverter-Fed Motor Drive Systems

The stepwise common-mode (CM) voltage at the output of inverters causes electromagnetic interference (EMI) and damage to motor bearings. This article proposed a new output active CM filter (ACF) to compensate for the steep rising/falling edges of CM voltage for EMI reduction and bearing protection. An input ACF is also necessary to attenuate the CM noise injected into the grid. Hence, a holistic assessment of input and output ACFs for inverter-fed motor drive systems has been demonstrated. The motor drive system satisfies the CM EMI standard with this new active CM filtering architecture. Ferrite materials and winding configurations of the CM transformer used in the output ACF have been investigated. Moreover, the relationship between the input and output ACFs has been discussed. This article aims to provide new perspectives and implementation guidelines for the ACFs in motor drive systems.

Balanced Detection for Performance Enhancement in a Pulse-Coded Brillouin Optical Time Domain Analyzer

A pulse-coded Brillouin optical time domain analyzer (BOTDA) so far uses the single-sideband photo detection. Here, thanks to a specially designed Brillouin gain extraction scheme, the dual-sideband balanced photo detection is successfully employed in a pulse-coded BOTDA. Compared with the single-sideband detection, the balanced detection can effectively eliminate common-mode noises existing in the two sidebands of the commonly used dual-sideband probe. In addition, the signal-to-noise ratio (SNR) at the far fiber end can be enhanced by 1.5 dB. The two benefits are experimentally demonstrated in a 117.46-km Golay-coded BOTDA, resulting in the reduction of the Brillouin frequency shift (BFS) measurement uncertainty from 30 km to the far fiber end.

Design Compact Absorptive Common-Mode Noise Suppression Filter with Series Unified Circuit

In the PCB process, overcoming common-mode noise radiation is critical. In past years, most studies have focused on a common-mode noise filter (CMNF) that can solve electromagnetic interference in high-speed digital systems by blocking and absorbing common-mode noise radiation. Unfortunately, connecting with any reflective common-mode noise filter (R-CMNF) and reducing the area of an absorptive common-mode noise filter (A-CMNF) are the most troublesome tasks in the PCB process. A novel equivalent circuit is proposed in this research to minimize the complexity of the design and improve accuracy. Detailed analyses of this proposed approach are entirely depicted in this article. The experiment result shows that 9% of fractional bandwidth centered at 2.25 Hz can achieve at least 90% absorption efficiency. With our proposed method, the area of A-CMNF is smaller than in state-of-the-art research.

Interseismic Strain Accumulation between the Colorado Plateau and the Eastern California Shear Zone: Implications for the Seismic Hazard near Las Vegas, Nevada

ABSTRACTCrustal deformation in the central Basin and Range between the Colorado plateau and the Eastern California Shear Zone is active but slow, making it a challenge to assess how strain is distributed and crustal motion transferred. However, knowledge of strain rates is very important, particularly for addressing the seismic hazard for both the Las Vegas urban area and the site of the proposed Yucca Mountain nuclear waste repository, in southern Nevada. Global Positioning System (GPS) data provide important constraints, particularly now that the GPS network in the area has substantially expanded in recent years. However, because deformation is slow, it is important to mitigate any transient tectonic and nontectonic signals to obtain the most accurate long-term interseismic motion and robust estimation of strain rates. We use data from all GPS stations in the region including both long-running continuous and semicontinuous stations. We model and remove postseismic displacements at these stations using source parameters for 41 events, dating back to the 1700 Cascadia megathrust earthquake, which contribute significantly to the deformation field within the central Basin and Range. We also remove correlated noise from the time series with the common-mode component imaging technique. We find that removal of both the postseismic transients and common-mode noise substantially reduces the uncertainties and spatial variation in the velocities. We find east–west extension across the Las Vegas Valley of 0.5–0.6 mm/yr. The interseismic strain rate field, calculated with the final velocities, reveals higher strain rates through southern Nevada than in previous studies, with rates within Las Vegas Valley of 8.5±2.4×10−9 yr−1. Our results also confirm shear along the Pahranagat shear zone, but the estimated amplitude is strongly affected by postseismic relaxation.

Buck Converter Current Measurement Using Differential Amplifier

The accuracy of the measured current is a preeminent parameter for Current Control based Power Converter applications to ensure genuine operation of the designed converter. The current measurement accuracy can be affected by several parameters which includes the type of technology used, components used for the selected technology, aging, usage, operating and environmental conditions. The effect of gain resistors and their manufacturing tolerances on differential amplifier-based buck converter current measurement is investigated in this work. The analysis mainly focused on the output voltage variation and its accuracy with respect to the change in gain resistance tolerances. The gain resistors with 5%, 1%, 0.5% and 0.1% manufacturing tolerances taken for the worst-case analysis and the calculated performance results are compared and verified with the simulation results. The Operational amplifiers (Op-Amp) for high frequency power converter applications must operate in a high frequency noise environment and the intended current measuring system must manage common mode noise disturbances paired with the signal to be measured. Based on the Common Mode Rejection Ratio (CMRR) the common mode voltages and noise signals will effectively get filtered out. Lesser CMRR results in lower common mode signal rejection, resulting in poor precision and noise rejection. In differential amplifiers, the CMRR predominantly depends on gain resistors. So, the variations in Common Mode Rejection Ratio due to gain resistor tolerances also analyzed and compared with the output voltage variations. Besides the effects of resistor tolerances, this paper also examines the effect of Op-Amp offset voltage on output accuracy specifically for low magnitude input currents. The obtained results from this analysis clearly shows that the gain resistors with 0.1% tolerance gives maximum accuracy with improved CMRR and accuracy at low magnitude input currents will get well improved by using Op-Amps with Low Offset voltage specifications.

Magnetic Design of a 3-Phase SiC-Based PV Inverter With DC-Link Referenced Output Filter

The use of Silicon carbide (SiC) devices represents an improvement in terms of size, weight and efficiency of power converters. However, SiC-based solutions present high dv/dt and di/dt on the switching events, increasing the common-mode noise injected into the grid. To reduce the common-mode noise, three-phase inverters with a DC-link referenced output filter are widely considered in photovoltaic (PV) inverters connected to the grid. However, if the filter is DC-link referenced the inductor ripple is larger, and this must be considered for the AC inductor filter design. This work shows, on a PV inverter, the impact of that DC-link referenced filter on the current ripple of the inductor, and the improvement achieved with the use of SiC devices, increasing the switching frequency. A comparison in terms of weight, size, losses and materials costs is presented for different core materials and configurations.

A Novel Interleaved Parallel Cascaded Three-Level PFC With Low Inductance Volt-Second and Low Common-Mode Noise

Interleaved parallel cascaded multilevel technology is an attractive approach for converters to achieve high efficiency, high-power density, and high modularity. In this letter, a novel single-phase interleaved parallel cascaded three-level (IPC-TL) power factor correction (PFC) converter is proposed. It is formed by cascading two interleaved parallel totem-pole PFC cells. The proposed topology exhibits the merits of lower inductance volt-second and inductor current ripples, lower common-mode noise, and lower control cost, compared with the traditional IPC-TL topology. A laboratory-scale experimental prototype is developed to verify the effectiveness of the proposed topology.

Electrothermal System Design and Evaluation of Low EMI and Thermally Balanced 150 kW T-Type Traction Inverter

Power electronics switching devices utilized in traction, propulsion, and power generation applications require advanced thermal management systems and extensive electromagnetic interference filtering components. The traditional indirect cooling methods exhibit limited ability to target switching location hotspots, causing limited cooling capabilities and thermal imbalance. Additionally, they rely on metallic structures directly integrated with module base plates, allowing for an accentuation of common-mode noise. These effects present themselves concurrently, creating reliability concerns while requiring further noise filtering. This work demonstrates the integration of a nonmetallic jet impingement cooler for direct base plate thermal management of a 150 kW silicon-carbide inverter. The use of nonmetallic structures manufactured through additive techniques limits low-induction capacitance pathways by 99%, leading to a 25 dB reduction in common-mode noise. Impingement jets focused on module hotspots reduce maximum device temperatures and increase thermal uniformity. Finally, by attaching individual jet coolers to each power module, hydraulic circuit networks are used to demonstrate thermal balancing between power devices for optimal current sharing.

Integrated CM Inductor for Both DC and AC Noise Attenuation in DC-Fed Motor Drive Systems

Using passive electromagnetic interference (EMI) filter to suppress the common mode (CM) noises on the dc and ac side of motor drive systems is a common filtering method. Shrinking the volume of CM inductors is the key to the miniaturization of EMI filters. In order to reduce the volume, this article proposes a new method to integrate the dc and ac CM inductors by magnetic coupling. The principle of the filter and the design constraints of coupled CM inductors are analyzed. The filter volume reduction advantage gained by using the proposed method is illustrated. A model is built to describe the relationship between the coupling coefficient and filtering performance. Finally, the procedures for design of coupled inductors are addressed and the results are verified by experiments. In the comparative case study, the volume of coupled inductor is 90% of that of discrete inductor.

A 12-Bit Low-Input Capacitance SAR ADC With a Rail-to-Rail Comparator

The input capacitance of the SAR ADC is considered as a drawback in many applications. In this paper, a 12-bit low-power SAR ADC with low-input capacitance SAR based on separated DAC and sample-and-hold blocks (SB) structure is proposed. The SB structure suffers from variation of the input common-mode voltage of the comparator causing nonlinear input-referred offset and kickback noise. Here, a closed loop low-power rail-to-rail offset cancellation technique for the comparator based on the body voltage tuning is proposed. In order to stabilize the closed loop structure, the open loop gain is controlled by adapting the gain of the preamplifier. Using this structure, the rail-to-rail offset is kept lower than 110 μV and the overall power of the comparator is 1 pJ/Conv. Complementary-clocked dynamic branches are exploited at the input the comparator to decrease the common-mode dependent kickback noise error to less than 1 LSB. The bootstrapped switch’s controlling signal is also modified to achieve less than 1 LSB error and 18.9% less power consumption. The proposed ADC is designed in standard 180 nm CMOS technology with a 1.8 V supply voltage and shrinking the input capacitance to 2 pF, which leads to 41 nW power consumption in the input voltage supply. Electrical simulations including PVT, Monte-Carlo, and post-layout parasitic extraction were run to ensure the effectiveness of the approach. The ADC features an ENOB of 11.1-bit and the sampling rate of 1 MHz with a power consumption of 117.9 μW including the input power supply which are competitive with the state-of-the-art, and demonstrate the virtue of the proposed approach.

Hierarchical Software-Defined Control Architecture With MPC-Based Power Module to Interface Renewable Sources and Motor Drives

A hierarchical control architecture is designed with model predictive control (MPC)-based power module for generalized renewable applications including single/three-phase grid, solar, battery, electric motor, etc. The hierarchical control architecture is composed of three layers: (1) Central control layer for mode recognition of different types of interfaced load/source, reconstruction of power converter topologies, high level current/voltage/power control, generating references for local power module control and grid services for utility support; (2) Local module control layer for implementing MPC algorithm to track references from central controller with improved dynamic performance, stabilizing common-mode voltage, collecting ADC samplings and generate PWM signals for local power switches; (3) Application layer for the interface with different types of renewable loads/sources including single/three-phase grid, solar, battery, electric motor and so on. The merits of the designed control architecture include: (1) the reconfigurability to be suitable for different types of applications; (2) all non-isolated topologies with common-mode noise attenuation capability for renewable energy interfaces; (3) improved dynamic performance by local MPC power module; (4) high accuracy and robustness of the multi-layer MPC-based control without being influenced by the parametric modeling error from various interfaced applications; (5) grid services for abnormal condition utility support. The experimental results verified the proposed hierarchical control architecture.

Low-Loss Segmented Shielding Technique for PCB-Winding Planar Transformers

Printed-circuit-board (PCB) winding planar transformers have been widely adopted in isolated high-efficiency and high-power-density converters. Inserting the shielding layer is an effective method to attenuate the common-mode noise induced by the large interwinding capacitance of PCB winding. This letter identifies that a part of the magnetic flux will pass through the shielding layer due to the planarized structure of the planar transformer. Furthermore, the generation mechanism and the distribution of eddy current and related loss in the shielding layer are revealed. In order to reduce the eddy current loss in the shielding layer, a segmented shielding technique is proposed. The shielding layer is divided into multiple segments to reduce the coupled flux and the eddy current loss in each segment of the shielding layer. The experimental results on a 300 kHz 1000 W/28 V output resonant converter validate that, compared with the conventional shielding method, the proposed shielding technique can improve the efficiency by 0.15% at full load.

Implementation of Effective Scale Factor Matching and Axial Centripetal Error Compensation for a Rotating Accelerometer Gravity Gradiometer

Rotating accelerometer gravity gradiometer (RAGG) is the only gravity gradient measuring device in the world to achieve commercial applications. When the parameter consistency among multiple accelerometers of the RAGG is not sufficient, its combined output cannot effectively suppress common-mode noise in the environment. A method for suppressing RAGG’s linear and angular motion noise is presented in this article by projecting the parameters, including scale factor, misalignment angle, second-order terms, and cross-coupling terms, onto the Cartesian coordinate system of the turntable plane. Proposing the algorithm implementation scheme of three effective scale factor solver loops, and for further canceling the motion residual error, high-precision gyroscope compensation loops are introduced. The added error compensation loop obtains the angular acceleration by differencing the angular velocity measured by the gyroscope, which in turn adjusts the loop parameters. Experimental results show that with the proposed method, the noise suppression of linear motion common-mode acceleration reaches 6.5 orders of magnitude, that is, the noise level <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$2.7 \times {10^{ - 8}} {\mathrm{ g/}}\sqrt {{\mathrm{Hz}}} $ </tex-math></inline-formula> of the accelerometer at the rotation frequency, and the angular motion common-mode acceleration noise is suppressed by six orders of magnitude, and the noise level <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$6.8 \times {10^{ - 8}} {\mathrm{ g/}}\sqrt {{\mathrm{Hz}}} $ </tex-math></inline-formula> of the accelerometer at the swing frequency is also obtained.

Performance analysis of comparators

This article reviews the innovative and improved structure of three comparators, and summarizes the optimization ideas to further optimize the design parameters of the comparators in the future. The Triple-Tail Dynamic Comparator proposes a multi-stage design to break connection between speed and noise. The Dynamic Bias Latch-Type (DB) Comparator takes an innovative approach to reducing energy consumption by stabilizing the source node voltage of the input pairs. The floating inverter amplififier (FIA)-based pre-amplififier further improves the energy efficiency based on the design of the low-power comparator, and also optimizes parameters such as common-mode output voltage and noise.

Polarization-multiplexed, single-cavity dual-comb fiber laser based on a birefringent crystal and a saturable absorber.

We introduce a calcium carbonate birefringent crystal into an Er-fiber laser mode-locked by a saturable absorber, where dual-comb ultrashort pulses with orthogonal polarization have been obtained. The two ultrashort pulse trains from the laser exhibit polarization contrast ratios of 30 dB and 20 dB, indicating that the dual-comb mode-locking is due to the polarization-multiplexing mechanism. The dual-comb ultrashort pulses have central wavelengths of 1564.41 nm and 1564.51 nm, and pulse durations of 825 fs and 805 fs respectively. The optical spectra and pulse durations of the asynchronous ultrashort pulses are nearly identical, so that the output of the laser could be directly used for dual-comb applications. Besides, the repetition-rate difference of the two mode-locked pulses is 673 Hz, while its drift is only 0.093 Hz within 2 hours' time. The low drift of the repetition-rate difference manifests the single-cavity dual-comb Er-fiber laser has a high stability and high common-mode noise suppression. At last, we have tested the dual-comb fiber laser in a ranging experiment, where clear interferogram signal can be observed. The experimental results prove that this single-cavity dual-comb Er-fiber laser based on the birefringent crystal and saturable absorber can be a potential source for spectroscopy, optical imaging, absolute distance measurement and other dual-comb applications.

Enhanced Impedance Measurement to Predict Electromagnetic Interference Attenuation Provided by EMI Filters in Systems with AC/DC Converters

Due to the widespread integration of renewable energy sources connected to AC and DC power systems by means of power electronics converters, electromagnetic noise propagates along lines, and metallic earth-return structures. EMI filters are commonly used to mitigate the common mode and differential mode noise at the interface of distribution lines, and their suppression characteristics are usually assessed in standard test setups, the impedances of which are, however, scarcely representative of real-world applications. In this paper, an online, inductively coupled impedance measurement method is proposed. A sensitivity analysis to highlight the benefits of the proposed setup and experimental verification is performed. The proposed method enables non-intrusive impedance measurement in energized systems, including power converters. These measures, in turn, allow the evaluation of modal insertion losses of EMI filters in real-world operating conditions. The three-phase example considered in this study shows significant deviations from manufacturer specifications, thus justifying the need for more advanced estimation techniques.

Analysis and Measurement of Differential-Mode Magnetic Noise in Mn-Zn Soft Ferrite Shield for Ultra-Sensitive Sensors.

The magnetic noise generated by the ferrite magnetic shield affects the performance of ultra-sensitive atomic sensors. Differential measurement can effectively suppress the influence of common-mode (CM) magnetic noise, but the limit of suppression capability is not clear at present. In this paper, a finite element analysis model using power loss to calculate differential-mode (DM) magnetic noise under a ferrite magnetic shield is proposed. The experimental results confirm the feasibility of the model. An ultrahigh-sensitive magnetometer was built, the single channel magnetic noise measured and the differential-mode (DM) magnetic noise are 0.70 fT/Hz1/2 and 0.10 fT/Hz1/2 @30 Hz. The DM magnetic noise calculated by the proposed model is less than 5% different from the actual measured value. To effectively reduce DM magnetic noise, we analyze and optimize the structure parameters of the shield on the DM magnetic noise. When the outer diameter is fixed, the model is used to analyze the influence of the ratio of ferrite magnetic shielding thickness to outer diameter, the ratio of length to outer diameter, and the air gap between magnetic annuli on DM magnetic noise. The results show that the axial DM magnetic noise and radial DM magnetic noise reach the optimal values when the thickness to outer diameter ratio is 0.08 and 0.1. The ratio of length to outer diameter is negatively correlated with DM magnetic noise, and the air gap (0.1-1 mm) is independent of DM magnetic noise. The axial DM magnetic noise is less than that of radial DM magnetic noise. These results are useful for suppressing magnetic noise and breaking through the sensitivity of the magnetometer.

PCB Winding Coupled Inductor Design and Common-Mode EMI Noise Reduction for SiC-Based Soft-Switching Three-Phase AC–DC Converter

This article presents a PCB winding coupled inductor design for both high efficiency and effective common-mode (CM) noise reduction in a silicon carbide (SiC)-based soft-switching three-phase ac–dc converter. A balance technique is applied to reduce the CM noise, creating a return path with additional inductors. The inductors in the main circuit and return path are coupled in one core and implemented with PCB windings. A winding interleaving structure with strong coupling between the main inductors is selected to minimize the winding loss and to improve the converter efficiency; however, the interwinding capacitance brought on by the winding interleaving worsens the CM noise. An inductor model including the capacitance is introduced, and its impact on the CM noise is analyzed. A novel inductor structure is proposed to scale back the interwinding capacitance and to enhance the CM noise reduction capability. Experiments with a SiC-based 25-kW soft-switching three-phase ac–dc converter prototype validates the performances of the proposed PCB winding coupled inductors.

A Low Inductance, High Power Density 3L-TNPC Power Module for More-Electric Aircraft Applications

Three-level T-type neutral-point-clamped converters (3L-TNPCs) are widely used in propulsion converters in more-electric aircraft (MEA) applications as higher efficiency, improved output total harmonic distortion (THD), and lower common-mode noise. However, such topology suffers from high stray inductance because of complicated power loop. Its power module current density is also less than the two-level (2L) converter as the increased switch counts. To solve the issue, this article proposes a novel hybrid-structure-based full SiC-MOSFET 3L-TNPC power module. The module has a printed circuit board (PCB) stacked on top of the substrate, with bare dies soldered on direct bond copper (DBC) and connected to PCB by bonding wires. Such a structure allows the power loop on both the substrate and PCB. This reduces the stray inductance by enhanced mutual inductance cancellation. The heat from dies can be directly dissipated through the substrate and the proposed base-plate-embedded cooling system, enhancing thermal conductivity by 55%. Based on the structure, a 1.2-kV, 300-A 3L-TNPC module is fabricated with a stray inductance of 2.5 nH. Because the stray inductance is 68% smaller than a state-of-the-art module, faster driving speeds can be used with limited voltage overshoots. As a result, the switching loss of the module is reduced by 62.5% compared with the same bare die at a state-of-the-art module’s power loop at 800 V, 450 A. Eventually, impedance characterization by impedance analyzer, double-pulse tests, and continuous tests are performed for experiment evaluation.

Quantitative analysis of common‐mode current in flyback converter with balance winding

AbstractThe balance winding of the transformer is a compact and flexible technique for the common‐mode (CM) noise reduction of isolated power converters. A proper design of the grounding and turn number of the balance winding will generate an inverse displacement current to balance the CM noise flowing through the transformer. However, a trial and error process to find the optimum design is necessary for practical applications due to the unexplored source of calculation errors. In this paper, a quantitative analysis method of CM currents flowing through all the paths between windings is proposed for error quantifications. Based on an interleaved transformer, the capacitances are extracted with the help of electric field simulations, and the contribution of each path to the CM noise is analysed. Although the paths between adjacent layers are dominant in the CM noise, it is proved that ignoring non‐adjacent inter‐layer paths will lead to calculation errors due to the high voltage difference even with low capacitances. As both the application and verification of the proposed quantitative analysis method, the accurate evaluation of noise reduction effects and determination of the optimum balance winding turns can be achieved in experiments.