class-F Power Amplifier Research Articles

A simplified adaptive sparse digital pre‐distorter for joint mitigation of frequency‐dependent transmitter impairments

The interplay between the unavoidable various nonlinearities of the direct conversion transmitter, such as local oscillator leakage, power amplifier (PA) nonlinearities, and in-phase and quadrature (I/Q) branch imbalance, and so forth will degrade the communication system performance seriously. To overcome these nonlinear interactive effects, an accurate adaptive sparse behavioral model is proposed for the joint compensation of the transmitter impairments in this article. First, a three-input nonlinear joint compensation model, which is composed of the nonlinear frequency-dependent cross terms between the I and Q branches as well as the magnitudes of the input signal, is developed. Second, to prune the redundant terms and reduce the computational complexity of the full three-input model, an efficient robust quasi-newton–based adaptive greedy algorithm is developed. To verify the performance of the proposed method, the different imperfect transmitters based on single-device GaN Class-F PA and GaN Doherty PA are used for experimental verification and analysis. Experiment results show that the proposed method can efficiently construct a sparse joint compensation model with improved modeling and distortion mitigation capability than the reported I/Q imbalance model, where nonlinear distortion and I/Q imbalance characteristics in the transmitter can be almost completely removed.

A 3.5-GHz Class-F Power Amplifier with Current-Reused Topology in 0.13-μm CMOS for 5G Application

In this paper, a 3.5-GHz class-F Power Amplifier with current-reused topology in 0.13-[Formula: see text]m CMOS for 5G application is presented. This proposed circuit has a two-stage structure by a current-reused topology driving to improve gain and the stability of PA. An output matching network is constructed by an open-circuited third harmonic resonator that can integrate the current and voltage waveform in the time domain adopted to improve the output power and reduce power consumption. The simulation results show that the proposed PA provides a 13[Formula: see text]dBm output power with a PAE of 50.5% and a small signal gain of 32.5[Formula: see text]dB that is higher than reported for a two-stage design in CMOS at the 3.5-GHz frequency, while the minimum output return loss ([Formula: see text]) is [Formula: see text]14.4[Formula: see text]dB with a minimum value of [Formula: see text]24.67[Formula: see text]dB. Many experiments are carried out to prove that the proposed PA has higher gain and higher efficiency compared to the traditional class-F power amplifier and is suitable for 5G short-range applications. Finally, the layout occupies a compact chip area of [Formula: see text][Formula: see text]mm2, including testing pads.

A concurrent dual-band continuous Class-F power amplifier with intermodulation impedance tuning: Analysis and design technique

In this paper, first the behaviour of dual-band continuous class-F (Class-CF) power amplifiers under concurrent input drive at both bands are studied. Then, a novel structure including second and third harmonic control networks as well as intermodulation tuning network intended for higher concurrent-mode efficiency is proposed accompanied by a detailed design methodology. The study has revealed that the performance of concurrent Class-CF dual-band power amplifiers (DB-PAs) under overdrive condition strongly depends on the design space factor. The impact of the device nonlinear output capacitance on the concurrent mode efficiency is also evaluated. To authenticate the validity of the proposed methodology, a Class-CF concurrent dual-band PA operating at 1.842 and 2.655 GHz bands is implemented. Experimental results exhibit output powers of 41.7 and 40.5 dBm and efficiencies of 75% and 72% at the lower and upper bands, respectively, while 62% concurrent-mode efficiency is obtained.

Design of a high efficiency class-F power amplifier with large signal and small signal measurements

In this paper, a modified class-F power amplifier is designed and implemented with new method at 900 MHz frequency. The meandered line compact microstrip resonant cell (MLCMRC), with simple structure is proposed to use as a harmonic control circuit (HCC). The proposed MLCMRC correctly acts as open-circuit at third and fifth harmonics and acts as short-circuit at second and fourth harmonics. In this design, the proposed PA is integrated with simple MLCMRC, while the large conventional matching lines are omitted, which leads to harmonics suppression, size reduction, and PAE improvement at same time. The proposed class-F power amplifier is characterized by small-signal and large-signal measurements to evaluate its performance. The maximum obtained gain for the proposed PA is 18.5 dB. Also, this design can obtain 74% PAE under 15 dBm input power, which shows 5% and 10% improvement in the maximum gain and PAE, respectively compared to the conventional class-F PA. Moreover, the applied MLCMRC resulted in the 36% size reduction, compared to the same PA without MLCMRC.

Design of a Compact 2.4 GHz Class-F Power Amplifier with High Power Added Efficiency

ABSTRACTDesign of a compact 2.4 GHz class-F power amplifier (PA) with high power-added efficiency (PAE) using a novel harmonic control circuit (HCC) is reported. The main aims of the proposed PA are to obtain compact size and high PAE. The proposed HCC consists of an input matching circuit, a lampshade compact microstrip resonant cell (LCMRC) and output matching network (OMN). The HCC input matching circuit is employed to reduce the capacitive and inductive effects of the transistor. A part of the input matching circuit is replaced with a LCMRC to have more suppression at the third harmonic (7.2 GHz). The HCC OMN consists of two transmission lines for matching fundamental harmonic. The optimum values of the circuit parameters are obtained by harmonic balanced analysis at a drain voltage of 3 volts. The measured values of PAE and output power at 2.4 GHz are 83% and 23.65 dBm, respectively under 10 dBm input power. Furthermore, the fabricated amplifier occupies an area of 45 × 35 mm2 only.

Simplified First-Pass Design of High-Efficiency Class-F−1 Power Amplifiers Based on Second-Harmonic Minima

This paper investigates the source and implication of efficiency minima that is typically observed during the second-harmonic load–pull of transistor amplifiers. The study starts with the theoretical derivation of time-domain voltage and current waveforms as a function of conduction angle ( $\alpha$ ) at the second-harmonic efficiency minima, where the output power and drain efficiency (DE) are at minimum. Thereafter, this paper unfolds a systematic re-engineering approach that is developed to recover the performance degradation and to exploit the region of efficiency minima in favor of design and implementation of high-efficiency inverse class-F power amplifiers (PAs). Interestingly, the inferences drawn from the in-depth analysis are shown to provide a simplified first-pass design approach that guarantees inverse class-F PA operation without an a priori knowledge of device parasitic elements. Theoretical postulations and simulation results are experimentally validated using an on-wafer active harmonic load–pull and a prototype design using 1.95-mm NXP gallium nitride die at a frequency of 2.6 GHz. The designed PA delivers an output power of 40 dBm with DE of 76% and gain of 12 dB at 3-dB gain compression. The measurement results confirm the theoretical framework reported in this paper.

Analysis of Class-F Power Amplifiers With a Second-Harmonic Input Voltage Manipulation

In this brief, analysis of class-F high-efficiency power amplifiers (PAs) when adding a second-harmonic input voltage to the gate node of the transistor is derived. The theoretical formulations of the drain current, output power, and drain efficiency are elaborated for this case. Based on them, the maximum output power and drain efficiency can be obtained from the closed-form solution set of the initial amplitude and phase of second-harmonic input voltage component. Calculations show that, with a proper second harmonic voltage adding to the input of the transistor, the performance of class-F PAs can be improved evidently. Besides, to validate the theoretical analysis, a simulation using a real GaN transistor has been presented. The relative errors of drain efficiency and output power between the results of theory and simulation are only 1.3% and 2.4%, respectively. To the best knowledge of the author, this is the first full theory to illustrate the performance enhancement of class-F PAs with a second-harmonic input voltage manipulation.

Novel DC-biasing circuits with arbitrary harmonics-control capability for compact high-efficiency power amplifiers

AbstractThe next generation mobile communication systems impose challenging performance, size, and cost requirements on the power amplifiers (PAs). This paper presents novel DC-biasing circuits, which are compact and yet can control the harmonics almost arbitrarily. The proposed circuit consists of a composite right-/left-handed (CRLH) transmission line (TL) stub, of which the size and harmonics-control function can be tuned by modifying the dispersion diagram of the stub line. As a proof of concept, a compact 2-GHz 7-W GaN HEMT class-F PA using the versatile CRLH-TL stubs was fabricated, demonstrating 85.8% drain efficiency and 77.3% power-added efficiency.

Addition of an ECTI 2011 Conference Paper: “Design and Implementation of a 1 GHz Ga HEMT Class-F Power Amplifier for Transistor Model Evaluation”

Design and Implementation of a 1 GHz Ga HEMT Class-F Power Amplifier for Transistor Model Evaluation

Design of Highly Linear Broadband Continuous Mode GaN MMIC Power Amplifiers for 5G

In this paper, we present a design approach for broadband harmonic-tuned monolithic microwave integrated circuit (MMIC) power amplifiers (PAs). Two harmonic matching networks are proposed for the realization of continuous class-B and class-F modes in an integrated PA. A design procedure is developed for integrated PAs using these matching networks to achieve high linearity, broadband operation, and compact chip area, in the presence of parasitic components and the physical limitations of the MMIC process. Two proof-of-concept fully integrated PAs are implemented in a 0.25-μm GaN-on-SiC process. Output power of 34.2-36.4 dBm with 40% to 49% power-added efficiency (PAE) is achieved in 4.2-7.0 GHz (51.6% fractional bandwidth), from the continuous class-B PA with only 1.5-mm 2 chip area. Furthermore, the continuous class-F PA achieves 36.2 dBm output power and 52% PAE at 5.0 GHz. The PAs are also characterized using QAM signals with wide bandwidth, in order to evaluate their performance for 5G wireless applications. For a 64-QAM signal with 100-MHz bandwidth and 8 dB peak-to-average power ratio (PAPR), the continuous class-B PA achieves 29.3 dBm average output power, 28% average PAE, and -25 dB (5.5%) error vector magnitude (EVM). The continuous class-F PA, tested using a 200 MHz 256 QAM signal with 8.5 dB PAPR, provides an average output power of 28.5 dBm, average PAE of 27%, and -28 dB (4%) EVM, without any pre-distortion.

A 2.4 GHz CMOS Class-F Power Amplifier With Reconfigurable Load-Impedance Matching

A novel reconfigurable CMOS class-F power amplifier (PA) at 2.4 GHz is proposed in this paper. It is able to match the output load variations mainly due to the effect of hand and head on a mobile phone. The effect of load variation on power-added efficiency (PAE), output power, and distortion is compensated by reconfiguring the output network using an impedance tuner. The tuner controls the output matching at fundamental frequency without affecting the class-F harmonic tuning up to 3rd harmonic. To the best of our knowledge, this is the first design of a CMOS class-F PA addressed to compensate the effect of load variation. Measurement results for $50~\Omega $ load impedance show a maximum PAE of 26% and maximum output power of 19.2 dBm. The measured total harmonic distortion is 4.9%. Measurement results for load values other than $50~\Omega $ show that PAE increases from 6.5% (not-tuned PA) up to 19.9% (tuned PA) with the same output power (19.2 dBm). Tuning also reduces the adjacent-channel leakage ratio by 5 dB and the spectral regrowth of a Wi-Fi signal at the PA output. The size of the fabricated chip is 1.6 mm $\times1.6$ mm.

High efficiency class-F power amplifier integrated with microstrip asymmetric lowpass filter

In this paper, a novel approach is presented to design a class-F power amplifier (PA) integrated with microstrip asymmetric lowpass filter (LPF). Use of an asymmetric LPF with very good specifications and nonreciprocal frequency response, in the case of a PA, which input and output ports are fixed, can improve the PA characteristics, significantly. The results of this structure is accessing to a high output power and the suppressed unwanted harmonics, which can guarantee a high power added efficiency (PAE) in comparison to the conventional class-F PA. The advantages of this method show the attenuation of nth harmonics, high output power with low DC voltage source, high PAE and good linearity. Experiments have been carried out at 1.8 GHz and showed a maximum PAE value of nearby 75% with about 27.2 dBm output power, under 19 dBm corresponding input power.

A modified class-F power amplifier with miniaturized harmonic control circuit

In this paper, a modified class-F power-amplifier (PA) for GSM applications is designed, simulated and tested. In this design, novel symmetrical meandered lines compact microstrip resonant cell (SMLCMRC), is proposed as a new harmonics control circuit (HCC), which resulted in size compression, power added efficiency (PAE) enhancement, power gain improvement, and better linearization in the PA. In this work both of the conventional class-F amplifier and proposed amplifier with SMLCMRC is designed at 1.8 GHz. The measurements show that the proposed PA with SMLCMRC has 72.54% maximum PAE, 17.13 dB gain and the 1 dB compression point (P1dB) is about 35.1 dBm. These results show, 16.5% improvement in PAE, 1.33 dB increment in gain and 1.1 dB improvement in linearity operating range of proposed amplifier compared to the conventional PA.

Investigation of load modulated inverse Class-F power amplifier with extended conduction angle

A novel design space of load modulated (LM) inverse Class-F power amplifiers (PAs) with extended conduction angle is proposed. The effects of the driven level factor β and the biasing operation factor ρ on the third-harmonic generation are discussed. The harmonic generation mechanism shows that the knee voltage effects are the source of third-harmonics for LM inverse Class-F PAs. The definition of the inverse Class-F mode is consistently valid under the circumstance of load modulation in a limited output power back-off (OPBO) range. Meanwhile, the conduction angle θ0 can be extended from π/2 to a limited value (<110°) to keep the standard waveforms of inverse Class-F mode and maintain high efficiency. After introducing the “continuous concept” and the second harmonic manipulation method, the mathematical design space of inverse Class-F PAs with extended conduction angle is derived. Calculation shows that the purely conductive load modulation can enable high back-off efficiency operation for LM inverse Class-F PAs. As proof of concept, a demonstrator amplifier is fabricated and measured. The experimental results show that the power added efficiency (PAE) with optimum Vctrl is improved by 5% over an OPBO range of 6 dB compared with the same PA with fixed Vctrl.

Design of Ultrawideband High-Efficiency Extended Continuous Class-F Power Amplifier

Total bandwidth of existing wireless communication technologies covers a wide frequency range of over one octave. But most existing power amplifier configurations cannot meet this requirement while at the same time maintaining a high efficiency. Therefore, a new structure that can achieve multioctave bandwidth is proposed in this paper together with the design methodology. The difficulty in realizing a bandwidth larger than one octave lies in the overlapping of fundamental and harmonic frequencies. Regarding this problem, the continuous class-F mode is extended to allow a resistive second harmonic impedance, rather than the pure reactive one. With the relaxed design requirements and overlapping design space of fundamental and second harmonic frequencies, harmonic tuning and fundamental frequency matching networks can be designed separately. More importantly, broadband matching for fundamental frequencies can be implemented simply by considering only three fundamental frequency points using the multiple frequencies matching method. To verify the validity of the proposed methodology, a multioctave power amplifier was designed, fabricated, and measured. Measured results verify a wide bandwidth of 128.5% from 0.5 to 2.3 GHz. Over this frequency range, drain efficiency was larger than 60% with output power greater than 39.2 dBm and large signal gain larger than 11.7 dB.

Novel Integrated Class F Power Amplifier Design for RF Power Infrastructure Applications

This paper presents a comprehensive study of the impact of resistive harmonic loading on the design of integrated Class-F power amplifiers (PAs). The proposed time-domain waveform-based analysis allows for an evaluation of the performance of Class-F PAs while controlling both second and third harmonics simultaneously. The voltage mapping is presented to include the impact of the resistive second harmonic impedance in the design of Class-F PAs. Besides, drain current formulations as a function of conduction angle are used to evaluate the harmonic coefficients under the impact of resistive third harmonic impedance. As such, the combination of resistive second and third harmonics is modeled to study its impact on efficiency and optimum impedance in the Class-F PAs. For practical validation, the derived knowledge is applied to propose a novel integrated Class-F PA that absorbs the output capacitance into the match while maintaining a purely resistive load at the fundamental frequency. The output match is fabricated on a highly integrated NXP Laterally Diffused MOSFET (LDMOS) process. At 1.8 GHz, using NXP 5-mm LDMOS die, the integrated Class-F achieves a drain efficiency ranging from 52% to 61% at 5-W output power based on two different design topologies. Both prototypes demonstrate excellent isolation at the second and third harmonics. Measurement results confirm the theoretical framework reported in this paper.

Design of High Efficiency Broadband Continuous Class-F Power Amplifier Using Real Frequency Technique With Finite Transmission Zero

In this paper, a new methodology using a distributed ladder structure with finite transmission zero at finite frequencies is proposed for designing a broadband high-efficiency continuous Class-F (CCF) power amplifier (PA). The approach of realizing finite transmission zeros in Richard domain using Real Frequency Technique is first presented. By applying the proposed approach, the characteristics of the driving point impedance (DPI) of the proposed structure can be deduced and obtained in theory. Furthermore, the synthesis methods in Richard domain are extended to synthesize the DPI of the proposed structure. Four types of distributed elements are investigated to synthesize the DPI of the proposed structure. This proposed structure can improve the performance of the CCF PA when the bandwidth approaches an octave as the finite transmission zero can be used to control the second harmonic impedance of the lower frequency which is near the upper frequency of the operation band. To verify the validity of the proposed method, a broadband high-efficiency CCF PA working from 1.15 to 2.2 GHz is designed. Experimental results show that the fabricated PA achieves 11.3–13.7 dB power gain and 40.5–43.2 dBm output power in the operation band. And the PA has also achieved a high-efficiency characteristic of 70%–83% drain efficiency (DE) over the whole operation bandwidth.

A Precise Harmonic Control Technique for High Efficiency Concurrent Dual-Band Continuous Class-F Power Amplifier

In this paper, a design approach for a high-efficiency concurrent dual-band power amplifier (PA) with precise harmonic control up to third order is proposed. With the precise harmonic control approach, the high-efficiency performance of the PA can be improved at two arbitrary wide interval frequencies. Based on the inherent impedance matching flexibility of the continuous Class-F (CCF) operating mode, the design spaces of fundamental and harmonic impedances of the PA are largely expanded. The optimal impedances of a CCF PA mode at the internal current-generator (I-gen) plane and package plane are investigated, respectively, and a novel dual-band matching network topology is designed to simultaneously present required load impedances at the fundamental and harmonic impedances of both operation frequencies. First, a harmonic control network is designed to control the harmonic impedances precisely for CCF operation. Then, the fundamental impedances are synthesized using the real frequency technique. To verify the validity of proposed methodology, a dual-band CCF PA operating at 2.6 and 3.5 GHz is designed, fabricated, and measured. The measurement results show that the peak drain efficiency is 76.7% with an output power 42.4 dBm at the lower band and 72.8% with an output power 41.1 dBm at the upper band.

Усилители мощности инверсного класса F – эффективное средство улучшения энергетических характеристик радиопередатчиков

This paper describes energy characteristics of inverse class-F power amplifier with limited quantity of harmonics and defines load characteristics for this type of amplifiers. As a result of the research, allowed ranges of parameter values for class and scheme are defined, where high energy characteristics are saved.

High-Efficiency Filter-Integrated Class-F Power Amplifier Based on Dielectric Resonator

In this letter, a high-efficiency filter-integrated class-F power amplifier (PA) is presented. High-Q-factor dielectric resonator (DR) filter is employed as the output matching network of the class-F PA. Theoretical analysis is carried out to guide the impedance transformation from $50~\Omega $ to that desired by the transistor at the operating frequency and the harmonic ones. Two transmission zeros are generated by the DR filter for realizing good skirt selectivity. Besides, metal cavity of the DR filter acts as heat sink for the transistor. For demonstration, a filter-integrated PA operating at 1.88 GHz is implemented. Comparison is made to show the advantages of this letter.