Use Of Circuits Research Articles

DNA G-Wire Formation Using an Artificial Peptide is Controlled by Protease Activity.

The development of a switching system for guanine nanowire (G-wire) formation by external signals is important for nanobiotechnological applications. Here, we demonstrate a DNA nanostructural switch (G-wire <--> particles) using a designed peptide and a protease. The peptide consists of a PNA sequence for inducing DNA to form DNA–PNA hybrid G-quadruplex structures, and a protease substrate sequence acting as a switching module that is dependent on the activity of a particular protease. Micro-scale analyses via TEM and AFM showed that G-rich DNA alone forms G-wires in the presence of Ca2+, and that the peptide disrupted this formation, resulting in the formation of particles. The addition of the protease and digestion of the peptide regenerated the G-wires. Macro-scale analyses by DLS, zeta potential, CD, and gel filtration were in agreement with the microscopic observations. These results imply that the secondary structure change (DNA G-quadruplex <--> DNA/PNA hybrid structure) induces a change in the well-formed nanostructure (G-wire <--> particles). Our findings demonstrate a control system for forming DNA G-wire structures dependent on protease activity using designed peptides. Such systems hold promise for regulating the formation of nanowire for various applications, including electronic circuits for use in nanobiotechnologies.

Analysis of harmonic contents of switching waveforms emitted by the ultra high speed digital CMOS integrated circuits for use in future micro/nano systems applications

In this paper we outline the influence of transistor model quality and input signal on the estimates of higher order harmonic contents of switching waveforms emitted by the high performance and low power digital integrated circuits. Accurate estimates of higher order harmonic contents are essential in the design and development of highly integrated wireless communication systems. Harmonic contents are used to design tapered buffer chains, but the design quality is influenced by the device model discontinuities. We used Cadence Spectre and Matlab to analyze the spectrum of different flip flop and latch structures. They showed steep spectrum roll-off after the knee frequency. As a concrete example, various kinds of latches and flip-flops, which have the fastest switching capability, are evaluated by using BIM3v3 and BSIM4 transistor models.

Chip implementation of supervised neural network using single-transistor synapses

In this work, the newly developed neural chip applied in analog inputs for on-chip training and recognition is presented. We have designed the neural chip using single-transistor synapses which are capable of storing analog weights. The neural chip includes the interface circuit, power switches, analog synaptic array (7 × 4 synapses), and transresistance amplifiers (TR_AMPs) for on-chip training and recognition. Voice signals were acquired using analog signal processing and conditioning circuits for use in verifying the chip's pattern recognition functionality. The experimental results reveal that the synaptic weights of the neural network have adapted with training and have gradually converged to the targets afterwards. Upon system convergence, the recognition rates of the targeted speaker and the three others were evaluated. By using very small amount of synapses, as few as 28 synapses, the system's successful recognition rate for the targeted speaker is 93.5% for 200 tests; whereas, the rate for the other speakers is approximately 6.3% for 600 tests.

9‐4: Simple Gate Driver Circuit with Inserted Stage for In‐Cell Touch TFT‐LCD Applications

This work proposes a new gate driver circuit for use in in‐cell touch panels driven with the time division driving method. The charges are stored in the inserted stage of the gate driver circuit during the suspended display operation for activating the following stage. According to the measured transfer characteristics of the amorphous indium‐gallium‐zinc‐oxide thin‐film transistor (a‐IGZO TFT), stable and uniform output waveforms can be generated after the touch sensing period.

Positive Feedback Genetic Circuit Incorporating a Constitutively Active Mutant Gal3 into Yeast GAL Induction System.

The GAL expression system is the most frequently used induction technique in the yeast Saccharomyces cerevisiae. Here we report a simple but powerful genetic circuit for use with the GAL induction system. Briefly, an artificial positive feedback circuit was incorporated into the GAL regulatory network. We selected green fluorescent protein (GFP) as a reporter of GAL1 induction, and designed a strain that expressed a constitutively active Gal3 mutant protein (Gal3c) under control of the GAL10 promoter. In the resulting strain, GAL1 and GAL10 promoters regulate the expression of GFP and GAL3c, respectively. Because Gal3c sequesters the Gal80 repressor away from the Gal4 transcriptional activator in the same manner as the galactose-bound Gal3, the expressed Gal3c protein provokes further expression of GFP and Gal3c, yielding further enhancement of GAL induction. Thus, this GAL3c-mediated positive feedback circuit permits substantially enriched induction of a target gene at extremely low concentrations, or even in the absence, of galactose, while maintaining the strict glucose-mediated repression of the target.

An Examination of the Federal Circuit's Use of Rule 36 Summary Affirmances

Recent commentary has questioned the validity of the Federal Circuit's use of Rule 36 affirmances in deciding appeals from the U.S. Patent and Trademark office. One article in particular posits that 35 U.S.C. 144 and 15 U.S.C. 1071(a)(4) require the Federal Circuit to write an opinion in every appeal from the Federal Circuit and therefore the court's use of Rule 36 affirmances, particularly with appeals of cases from the America Invents Act, is improper. The present article presents a reasoned counterpoint to that argument. A complete analysis of the statutory text, the legislative history, the historical context of the statutes, and other considerations, including other applicable Federal Rules of Appellate Procedure, the delegation of authority under the Rules Enabling Act, and traditional deference afforded the judiciary in how it applies procedural rules, supports the conclusion that Rule 36 affirmances are entirely within the authority and discretion of the court. A contrary conclusion would rest on a slender reed of statutory text and would create a rare situation — perhaps the only instance — in which Congress has directly dictated procedure for the federal courts of appeal since the enactment of the Rules Enabling Act. To be clear, the question of what the Federal Circuit is permitted to do under the controlling statutes and rules is distinct from the normative question of what the court should do. Part 2 of this Article (forthcoming) explores the reasons for the substantial increase in Rule 36 affirmances, assesses the costs and benefits of Rule 36 affirmances, and examines possible alternatives to Rule 36 affirmances.

Silicon and Dopant Ink-Based CMOS TFTs on Flexible Steel Foils

ABSTRACTPolysilicon complementary metal oxide semiconductor (CMOS) thin film transistors (TFTs) are fabricated on large area, flexible stainless steel foils using novel ink depositions within a hybrid printed/conventional process flow. A self-aligned top gate TFT structure is realized with an additive materials approach to substitute the use of high capital cost ion implantation and lithography processes. Polyhydrosilane-based silicon ink is coated and laser crystallized to form the polysilicon channel. Semiconductor grade P-type and N-type unique dopant ink formulations are screen printed and combined with thermal drive in and activation to form self-aligned doped source and drain regions. A high refractory top gate material is chosen for its process compatibility with printed dopants, chemical resistance, and work function. Steel foil substrates are fully encapsulated to allow for high temperature processing. The resultant materials set and process flow enables TFT electrical characteristics with NMOS and PMOS mobilities exceeding 120 cm2/Vs and 60 cm2/Vs, respectively. On/Off ratios are &gt;107. Reproducibility, uniformity, and reliability data in a production environmental is shown to demonstrate high volume, high throughput manufacturability. The device characteristics and scheme enable NFC (13.56MHz) capable circuits for use in flexible NFC and display-based smart labels and packaging.

A Modified EXIT-to-ECMO with Optional Reservoir Circuit for Use during an EXIT Procedure Requiring Thoracic Surgery

A 34 year old mother with a history of polyhydraminos and premature rupture of membranes presented for an ex utero intrapartum treatment (EXIT) procedure to deliver her 34 week gestation fetus. The fetus had been diagnosed with a large cervical mass which significantly extended into the right chest. The mass compressed and deviated the airway and major neck vessels posteriorly. Imaging also revealed possible tumor involvement with the superior vena cava and right atrium. The plan was for potential extracorporeal membrane oxygenation (ECMO) during the EXIT procedure (EXIT-to-ECMO) and the potential for traditional cardiopulmonary bypass (CPB) for mediastinal tumor resection. A Modified EXIT-To-ECMO with Optional Reservoir (METEOR) circuit was devised to satisfy both therapies. A fetal airway could not be established during the EXIT procedure and so the EXIT-to-ECMO strategy was utilized. The fetus was then delivered and transferred to an adjoining operating room (OR). Traditional cardiopulmonary bypass with a cardiotomy venous reservoir (CVR) was utilized during the establishment of an airway, tumor biopsy and partial resection. The patient was eventually transitioned to our institution's standard ECMO circuit and then transferred to the intensive care unit. The patient was weaned from ECMO on day of life (DOL) eight and had a successful tumor resection on DOL 11. The patient required hospitalization for numerous interventions including cardiac surgery at 4 months of age. She was discharged to home at 5 months of age.

Analog maximum power point tracking for spacecraft within a low earth orbit

This paper describes the implementation of a reliable maximum power point tracking design as an analog circuit for use on a satellite relying on solar power generation within low Earth orbit. The environment in which such a spacecraft system would function is evaluated. A specific maximum power point tracking algorithm is selected with regards to environmental constraints. A further increase in reliability was achieved by only using carefully selected analog components that are suitable for use within a space environment. The system was prototyped, and its power conversion performance was characterized using a custom-built measurement setup. The system successfully tracked the maximum power point through all the performed measurements. The results from the measurements suggest that the prototyped system has a nominal regulator efficiency of 88% and a nominal tracking accuracy of 96%.

Demonstration of Signal Transmission between Adiabatic Quantum-Flux-Parametrons and Rapid Single-Flux-Quantum Circuits Using Superconductive Microstrip Lines

We have been investigating interface circuits between rapid single-flux-quantum circuits and adiabatic quantum-flux-parametron (AQFP) circuits for use in high-speed low-power hybrid computing system. These interface circuits also enable us to use long-distance interconnections between AQFP gates. In this study, we fabricated and demonstrated AQFP circuits, including long interconnections of passive transmission lines (PTLs), in which the interface circuits were used to convert the signal currents of the AQFP gates into single-flux-quantum pulses traveling along PTLs. The length of each PTL was approximately 4.3 mm. During low-speed measurements, correct operations with wide bias margins were confirmed.

Radio frequency energy harvesting from a feeding source in a passive deep brain stimulation device for murine preclinical research

This paper presents the development of an energy harvesting circuit for use with a head-mountable deep brain stimulation (DBS) device. It consists of a circular planar inverted-F antenna (PIFA) and a Schottky diode-based Cockcroft-Walton 4-voltage rectifier. The PIFA has the volume of π × 102 × 1.5 mm3, resonance frequency of 915 MHz, and bandwidth of 16 MHz (909–925 MHz) at a return loss of −10 dB. The rectifier offers maximum efficiency of 78% for the input power of −5 dBm at a 5 kΩ load resistance. The developed rectenna operates efficiently at 915 MHz for the input power within −15 dBm to +5 dBm. For operating a DBS device, the DC voltage of 2 V is recorded from the rectenna terminal at a distance of 55 cm away from a 26.77 dBm transmitter in free space. An in-vitro test of the DBS device is presented.

Equivalent circuit analysis of radiative coupling in monolithic tandem solar cells

As solar cell efficiency improves towards the Shockley-Queisser limit, so does the radiative efficiency of the cell. For tandem stacks of cells where energy conversion efficiency now exceeds 46%, radiative coupling between the cells is becoming increasingly important to consider in cell design, measurement, and performance prediction. We show how an equivalent circuit model can capture the complex radiative interactions between cells in such tandem stacks, allowing more insight into the impact on cell performance. The circuit's use is demonstrated by deriving results relevant to the critical step of eliminating coupling effects from measured cell spectral responses.

Design of CMOS Differential Transimpedance Amplifier

This paper explores the design of a differential transimpedance amplifier (TIA) integrated circuit for use in optical time domain reflectometer (OTDR) optical receivers (OR). All dependences between primary TIA design variables including OTDR laser pulse width, OR bandwidth, and TIA feedback resistance, are defined. Then, based on these dependencies, it is shown analytically that to achieve a stable system with no overshoots, the open-loop bandwidth of the fully differential amplifier (FDA) at the core of the TIA must exceed closed-loop TIA bandwidth by a factor of at least four. According to equations that are provided, it is shown that minimum amplifier noise occurs when detector and input transistor parasitic capacitances are equal. Schematics and short descriptions of all important TIA components, including the FDA and beta multiplier-based bias circuits, are given. The FDA has a bandwidth of 900 MHz. With a feedback resistance value of 20 kΩ the TIA has a closed-loop bandwidth of 125 MHz. TIA power consumption does not exceed 15 mW and at low bandwidths a variable feedback resistance allows the FDA to achieve up to 7 dB higher dynamic range. The area of the TIA integrated circuit is 100 µm × 250 µm excluding contact pads.DOI: http://dx.doi.org/10.5755/j01.eee.21.1.4548

Hybrid Silicon Photonic Circuits and Transceiver for 50 Gb/s NRZ Transmission Over Single-Mode Fiber

This paper presents a 50 Gb/s per lane hybrid BiCMOS and silicon photonic integrated circuit for use in fiber optic communications. Fine pitch copper pillars are used to integrate electronics and silicon photonics. The resulting device demonstrates the generation and detection of up to 56 Gb/s NRZ optical signals over 2-km standard single-mode fiber at 1310-nm wavelength. At 40 Gb/s, the link operates error free, and at 56 Gb/s well below KR4 RS-FEC operating BER. The power dissipation of TX including CW laser is 600 mW (450-mW driver, 150-mW CW laser), RX is 150 mW, resulting in total per channel of less than 750 mW.

Using the Zero-Resistance Spark Circuit on the Wire Cut Electric Discharge Machine to Realize Energy Savings

There is an increasing emphasis on the development green manufacturing technologies. To improve processing and energy efficiency of modern Wire Cut Electric Discharge Machines (WEDM), many studies have focused on the design of the device’s discharge circuit. Currently, most such circuits use a resistor to impose current-limitations. When current flows through this resistor, considerable electrical energy converted into heat. The generated heat increases the temperature in the discharge circuit, which negatively impacts processing and energy efficiency, even though the temperature rise could be controlled by arranging cooling devices around the discharge circuit. This study seeks to produce an improved discharge circuit for use in WEDMs. We use DC-DC and electronic voltage regulation technology to convert the energy originally dissipated in the resistor directly into the energy for use in machining. The Zero-Resistance Spark Circuit is the critical design to realize the energy saving effect. Experimental results indicate energy savings of 10 to 15%.

Packaging and design of a heterogeneous dual laser chip for a widely tunable spectrally pure optical RF source.

In this paper, we report the results of the efforts to extend our previous work through the packaging and redesign of a heterogeneously integrated silicon-photonic circuit for use in a modulation side-band injection-locked optical RF generation system. Towards that effort, we attempted to improve the RF spectrum coverage of our design by decreasing the laser cavity length. Despite the unintended formation of an additional parasitic cavity in that device, we demonstrated increased spectrum coverage between 5 and 50 GHz in a packaged module with an ∼ 1-Hz linewidth.

Fully-printed high-performance organic thin-film transistors and circuitry on one-micron-thick polymer films.

Thin, ultra-flexible devices that can be manufactured in a process that covers a large area will be essential to realizing low-cost, wearable electronic applications including foldable displays and medical sensors. The printing technology will be instrumental in fabricating these novel electronic devices and circuits; however, attaining fully printed devices on ultra-flexible films in large areas has typically been a challenge. Here we report on fully printed organic thin-film transistor devices and circuits fabricated on 1-μm-thick parylene-C films with high field-effect mobility (1.0 cm(2) V(-1) s(-1)) and fast operating speeds (about 1 ms) at low operating voltages. The devices were extremely light (2 g m(-2)) and exhibited excellent mechanical stability. The devices remained operational even under 50% compressive strain without significant changes in their performance. These results represent significant progress in the fabrication of fully printed organic thin-film transistor devices and circuits for use in unobtrusive electronic applications such as wearable sensors.

A selector-combiner circuit for multi-pixel CMOS photon detector

This paper presents a selector–combiner (SC) circuit for use as a constituent block for a multi-pixel complementary metal-oxide-semiconductor (CMOS) photon detector. The circuit essentially allows signal from pixels of interest to be summed and output. This pixel-selection configurability may enhance imaging performance and also produce different imaging effects for various analyses. A 9-to-1 SC circuit was designed and fabricated in an Austriamicrosystems (AMS) 0.35 µm process technology. The worst-case linear working range at the input was found to be between 1.50 and 1.80 V, occurring when all inputs were enabled. It exhibited an insignificant signal loss of about −0.96 dB when all inputs were enabled. The circuit has been proven to achieve a minimum bandwidth of 7.2 MHz. Simulated and experimental results have shown that signal addition can be performed effectively and the circuit is suitable to be integrated into a multi-pixel CMOS photon detector.

Design of the RF Circuit for a Coaxial Cavity High-Power Multiple-Beam Klystron

This paper presents the design methodology and detailed design of the interaction circuit for use in an L-band 10-MW MBK, which operating in the fundamental mode at a center frequency of 1.3 GHz. Coaxial cavities are adopted to give adequate space for the use of multiple large cathodes, which has a low cathode loading and thereby facilitate a long lifetime. The emphasis for the present design is on efficiency and high-peak output power. The initial design was carried out using the large signal code KLY. To calculate the beam-wave interaction characters conveniently with cavities present, we developed a 2-D single-beam equivalent design methodology, in which the multitunnel coaxial cavities are replaced by the conventional single-tunnel cylindrical cavities with transformed RF parameters. The 3-D PIC simulations with actual coaxial cavity geometries are carried out at last to check on the large signal and the 2-D PIC simulations. The 3-D simulation results indicate that the equivalent design methodology is effective. The final RF circuit consists of six coaxial cavities including a second-harmonic cavity to reduce the device length. The circuit has a predicted gain of 50 dB at a peak pulsed output power of 10.4 MW with a corresponding electronic efficiency of more than 68%. The design and test results of the output system with two windows are also presented.

Tunable Low Energy, Compact and High Performance Neuromorphic Circuit for Spike-Based Synaptic Plasticity

Cortical circuits in the brain have long been recognised for their information processing capabilities and have been studied both experimentally and theoretically via spiking neural networks. Neuromorphic engineers are primarily concerned with translating the computational capabilities of biological cortical circuits, using the Spiking Neural Network (SNN) paradigm, into in silico applications that can mimic the behaviour and capabilities of real biological circuits/systems. These capabilities include low power consumption, compactness, and relevant dynamics. In this paper, we propose a new accelerated-time circuit that has several advantages over its previous neuromorphic counterparts in terms of compactness, power consumption, and capability to mimic the outcomes of biological experiments. The presented circuit simulation results demonstrate that, in comparing the new circuit to previous published synaptic plasticity circuits, reduced silicon area and lower energy consumption for processing each spike is achieved. In addition, it can be tuned in order to closely mimic the outcomes of various spike timing- and rate-based synaptic plasticity experiments. The proposed circuit is also investigated and compared to other designs in terms of tolerance to mismatch and process variation. Monte Carlo simulation results show that the proposed design is much more stable than its previous counterparts in terms of vulnerability to transistor mismatch, which is a significant challenge in analog neuromorphic design. All these features make the proposed design an ideal circuit for use in large scale SNNs, which aim at implementing neuromorphic systems with an inherent capability that can adapt to a continuously changing environment, thus leading to systems with significant learning and computational abilities.