Programmed ribosomal frameshifting (PRF) is a translational mechanism that enables the ribosome to shift reading frames and access alternative coding sequences. PRF occurs naturally in a wide range of organisms, including viruses, bacteria, and eukaryotes, where it supports compact encoding and stoichiometric control of protein expression. Despite the great potential of PRF in synthetic circuit designs, a broader adoption of PRF in circuit designs has been hampered by rather strict sequence constraints and structural requirements. This work introduces a synthetic translational regulatory platform, protein-inducible ribosomal frameshifting (PIRF), by integrating aptamer-protein interactions with a - 1 PRF motif to enable regulated translation in Escherichia coli. PIRF modules respond to intracellular RNA-binding proteins such as PP7 and MS2, triggering frameshifting in a condition-dependent manner. PIRF could be used to program logic gate operations through frame-dependent translation and enable multilayered regulation in synthetic circuits. Further, the flexible PIRF designs enable reading frame-dependent control of fusion protein expression, protein aggregation, and periplasmic localization via strategic positioning of peptide tags and protein coding sequences. While PIRF enabled regulated frameshifting and could be flexibly reconfigured for a variety of circuits and applications, a measurable level of basal frameshifting was often observed, which may require additional strategies for further optimization in the future. Together, PIRF supports applications in programmable and logical control of downstream protein expression, including condition-dependent aggregation and regulated subcellular localization. PIRF provides a compact and genetically encoded strategy for programmable protein-level regulation, expanding the synthetic biology toolkit for translational control, biosensing and biotherapeutics.

Synthetic gene circuits often behave unpredictably in batch cultures, where shifting physiological states are rarely accounted for in conventional models. Here, we find that degradation-tagged protein reporters could exhibit transient oscillatory expression, which standard single-scale models do not capture. We resolve this discrepancy by developing Gene Expression Across Growth Stages (GEAGS), a dual-scale modeling framework that explicitly couples intracellular gene expression to logistic population growth. Using a chemical reaction network model with growth phase-dependent rate-modifying functions, GEAGS accurately reproduces the observed transient oscillations and identifies amino acid recycling and growth-phase transition as key drivers. We reduce the model to an effective form for practical use and demonstrate its adaptability by applying it to layered feedback circuits, resolving long-standing mismatches between model predictions and measured dynamics. These results establish GEAGS as a generalizable platform for predicting emergent behaviors in synthetic gene circuits and underscore the importance of multiscale modeling for robust circuit design in dynamic environments.

Phase-change random-access memory (PCRAM) is an emerging technology for next-generation memory owing to its high on/off ratio, simple fabrication, and excellent stability. However, its unipolar operation limits its ability to replicate the complex synaptic behaviors required for neuromorphic applications. Although unipolar PCRAM has been explored as a neuromorphic device, its performance is limited by the intricacies of peripheral circuit requirements. To achieve better bipolar operation, this study introduces a novel bipolar PCRAM structure by incorporating titanium interlayers into an SbTe-based PCRAM device. The integration of titanium as an atomic migration moderator reduces diffusion pathways, thereby stabilizing the operating voltage to approximately ±0.6 V while increasing endurance to more than 8 × 104 cycles. Furthermore, various synaptic behaviors such as potentiation, depression, and spike-timing-dependent plasticity were reliably mimicked. Neural network simulations performed with experimental data from the device achieved 88% classification accuracy on the Modified National Institute of Standards and Technology dataset, highlighting the feasibility of this architecture for real-world neuromorphic applications. The proposed bipolar PCRAM structure simplifies circuit design and offers a scalable approach for efficient neuromorphic computing.

Synthetic gene circuits are powerful tools for precisely programming gene expression and introducing novel cellular functions. However, their development and application in plants has lagged behind other systems, due mainly to the limited availability of modular genetic parts. We recently developed a CRISPR interference (CRISPRi)-based synthetic gene circuit system for programming gene expression in plants. Using a robust and high-throughput protoplast-based dual luciferase assay, we demonstrated the development, testing and functionality of these circuits in various plant species. Here we detail the key design principles and considerations for building and testing programmable and reversible CRISPRi-based gene circuits in plants. We also provide detailed procedures for isolating protoplasts from multiple plant species, including Arabidopsis thaliana, Brassica napus, Triticum aestivum and Physcomitrium patens. Furthermore, we provide step-by-step instructions for the 96-well plate-based protoplast transfection assay for testing genetic parts and synthetic circuits, using a dual luciferase assay. The detailed descriptions of these developed systems will enhance the efficiency and reproducibility of the construction, testing, and implementation of synthetic gene circuits in a variety of plant species. This protocol enables the design and testing of CRISPRi-based gene circuits in plants within ~4 weeks.

Reconfigurable field-effect transistors (RFETs), which allow postfabrication switching of device polarity, are promising candidates for compact and functionally flexible circuit design. Here, we demonstrate large-scale dual n-/p-channel RFETs based on homogeneous monolayer WSe2, integrated with a charge-trapping layer. Ambipolar transport is achieved by forming parallel n- and p-type conduction paths through selective doping. In addition, a multilayer gate dielectric stack (hBN/HfO2/Al2O3) enables complete nonvolatile switching between n- and p-type modes via charge-trapping. Exploiting this reconfigurability, we realize ternary content-addressable memory using only two RFETs (2T) per cell, where polarity combinations encode the three logic states ('0', '1', and 'X'). Furthermore, a full set of Boolean logic gates─including AND, OR, NAND, and NOR, is demonstrated using series and parallel 2T configurations. These results establish dual n-/p-channel WSe2 RFETs as scalable and functionally versatile building blocks for programmable logic and memory in future computing architectures.

Reporter systems in actinomycetes: Versatile tools for natural product discovery and production.

Controlling biofilm dynamics to unlock the future of biofilm-based biocatalysis.

With the advancement of flexible electronics and low-power circuit design, wearable sensing systems have emerged as a interdisciplinary research area within electronic and computer engineering. These kind of systems can support continual identification with non-disruptive, precise sensing of the physical signs of person with pliable, various type sensor arrays. Viewed from the perspective of the systems engineering approach, this paper classifies wearable device architectures into three mutually supportive electrical paths: the analog signal chain, the digital signal chain, and the energy self-sufficiency chain. At the signal chain level, it focuses on analog front-end design for flexible electrochemical, strain sensor, high-input-impedance Transimpedance Amplification design, differential anti-interference design, analog-to-digital conversion design to ensure that the signal-to-noise ratio and low-drift performance of the microampere-level signal are very high. In the digital chain the study is on the signal processing and information transmitting using an embedded MCU unit. Adaptive filtering, dynamic gain adjustment, and event-driven communication have achieved real-time, low-power data management: The energy chain combines biofuel cell (BFC) and power management unit (PMU), it's proposing the hybrid power chain, which would be combining NFC and the energy scheduling algorithm for autonomous power. Looking at it from the system level, it is hard to say that wearable electronics' core competitiveness comes from better analog, digital, but more likely the synergy between them: This provides a solution for field-effect transistors (FETs) and self-powered smart health trackers. It establishes a scalable implementation approach suitable for both low-power signal processing and energy-autonomous circuits.

Memristor-based spiking neuron circuit design for address-event representation edge motion tracking

Design of an Energy-Efficient Automatic Calibration Circuit for High Speed Photonic Cross-Coupled Memory

ABSTRACT Equivalent series resistance (ESR) is a critical factor limiting the performance and longevity of asymmetric supercapacitors (ASCs). Failed ASC analysis shows ESR imbalance as a major cause of degradation. This study uses statistical design of experiment (DoE) models for vertical and horizontal setups to tightly control ESR. A high coefficient of determination value confirms the validity of the model over a significant data variance. Accurate electrode loading control influences ESR variance more than metal oxide content, though their interaction also significantly affects ESR. With precise loading, ESR remains within a narrow, stable range across configurations. Controlled ESR directly influences the design and cost of cell balancing circuits. The study identifies better alternatives to metal oxides and activated carbon for enhanced performance. Finally, COMSOL thermal simulations show asymmetric cooling is a key for ASC performance and reliability.

A comprehensive review on marine algal polysaccharide-mediated siRNA delivery systems for biofuel production.

Exploiting symmetries in optimal quantum circuit design

Ferroelectric field-effect transistors (FeFETs), a type of ferroelectric memory with a transistor-based structure, have attracted significant attention from integrated circuit researchers due to their compact device architecture, non-destructive readout capability, and elimination of additional selector devices. These advantages make FeFETs highly promising for achieving higher storage density and enabling computing-in-memory applications. For their practical industrial deployment, extensive studies have been conducted on device fabrication, circuit design, and reliability. Among the key challenges, enlarging the memory window (MW) while maintaining stability is critical, as it directly affects data accuracy and retention. In this work, we experimentally investigate the modulation of the MW and interface defect density (ΔNit) in Zr-doped HfO2(HfZrOx)-based FeFETs under different polarization states of the ferroelectric gate dielectric. The results demonstrate that with progressively enhanced ferroelectric polarization, the MW expands, while the interface trap density is simultaneously suppressed, suggesting that robust polarization effectively inhibits the formation of interface defects and improves subthreshold swing characteristics of the device. Furthermore, TCAD simulations were conducted to systematically investigate the impact of various ferroelectric properties, including remanent polarization (Pr), saturation polarization (Ps) and variations in coercive field (Ec), on the memory characteristics of HfZrOxFeFETs. It was confirmed that higher polarization can alleviate the degradation caused by defects. In addition, an increase inPrandPs, together with a lowerEc, enhances the surface potential difference, charge separation, and switching efficiency, thereby improving both the MW and the stability of the device. This study provides valuable insights for the development of reliable FeFET-based memory technologies.

Abstract This work presents an inverse design method for a phase shift circuit that integrates deep learning and particle swarm optimization (DL-PSO) for simultaneous control of amplitude and phase in reconfigurable arrays, including reconfigurable intelligent surfaces. The proposed DL-PSO framework resolves the nonunique mapping problem and enables high precision realization of target complex responses in a π type circuit. An external PSO algorithm iteratively invokes the DL-PSO model to evaluate amplitude performance across a 360° phase range and optimize fixed structural parameters. A prototype operating at 2.8 GHz was fabricated and measured, achieving full range phase tuning with a maximum amplitude fluctuation of 0.6 dB and an average phase error of 1.92°. The circuit also supports accurate amplitude control at multiple target levels across 360°, with average amplitude and phase errors of 0.16 dB and 1.76°, respectively. The proposed method enables simultaneous amplitude and phase modulation and is scalable for reconfigurable array applications such as beam shaping and null steering in Reconfigurable arrays.

Static Random Access Memory Cells (SRAM) offers excellent flexibility in logical circuit design and is widely adopted in modern high-performance systems. However, traditional SRAM suffers from significant instability during read and write operations due to increased threshold voltage variability and sensitivity to process, voltage and temperature fluctuations, which degrade both performance and reliability. To address these issues, this paper proposes a new Advancing the Stability and Read/Write Operations of 5T Static Random Access Memory Cells Utilizing Dual-Chirality Gate-All-Around Carbon Nanotube Field-Effect Transistors (ASRWO-DCGAA-CNTFET), which enhances the stability and read/write functionality of 5T SRAM using Dual-Chirality Gate-All- Around CNTFETs. The proposed Dual-Chirality GAA-CNTFET enables precise control over the threshold voltage, thereby improving the Static Noise Margin (SNM) and optimizing read and write operations while enhancing overall stability. During read operations, this approach effectively prevents output bit data corruption, and during write operations, it reliably overwrites existing data with new input. The ASRWO-DCGAA-CNTFET method achieves a reduction in leakage current by 13%, 22%, and 20% compared to existing designs, including the Ultra-Low Power 5T-SRAM Cell utilizing CNTFET-based Read/Write Assist Techniques (5TSRAM-CNTRWA), the Improved Read/Write Stability-Dependent Level Shift 5T Ternary SRAM with Enhanced Gate Diffusion Input BWGCNTFET (IRWS-5TSRAM), and the FinFET-based low-power, stable 8T SRAM with high yield (FET-8TSRAM), respectively.

As CMOS technology scales into the nanoscale regime, ensuring the reliability of digital circuits in radiation-rich environments has become a critical challenge. Standard cell libraries, which are foundational to digital design, are typically characterized using extensive SPICE simulations to capture gate delays as functions of input transition time and load capacitance. However, these libraries do not account for total ionizing dose (TID) effects, which are caused by prolonged exposure to ionizing radiation and introduce oxide-trapped charges and interface states that degrade key transistor parameters, such as threshold voltage and leakage current. This results in significant timing inaccuracies, compromising digital timing closure in mission-critical applications such as aerospace and nuclear electronics. In this work, we propose an efficient, TID-aware standard cell characterization methodology for nanoscale CMOS technologies that generates cell characterization data in standard Liberty format, enabling accurate prediction of timing closure under TID influence without incurring any SPICE simulation overhead. Our approach leverages well-calibrated 32 nm Synopsys©Sentaurus TCAD simulations and variation-aware analytical timing models to capture TID-induced degradation. These effects are incorporated into cell netlists through adjustments to the BSIM parameters to generate both pre- and post-radiation standard cell libraries. Validated using a set of reference designs, including ISCAS benchmark circuits, the proposed methodology achieves accurate path-level timing predictions under radiation while reducing SPICE simulation effort by approximately 81.25%. By bridging device-level radiation effects with cell-level timing abstraction, this scalable framework offers a practical solution for robust and radiation-resilient digital integrated circuit design in harsh environments.

Microfluidics enable high-precision and cost-effective processing of biological and chemical substances. However, designing and fabricating microfluidic chips typically requires substantial expertise and numerous design iterations, posing considerable barriers to entry for nonexperts. We introduce μFluidicGenius (μFG), an open-access, machine learning (ML)–augmented design tool that enables nonexpert users to rapidly create functional microfluidic circuits. Users simply define the spatial placement of reservoirs, specify the channel connections between them, and assign desired flow rates through this layout. Leveraging a hybrid algorithmic framework that integrates ML models with mathematical modeling, μFG automatically generates spatially coded maze structures that implement the precise fluidic resistances needed to meet the target flow distribution. These resistive elements are optimized to fit within the available geometry and can reproduce complex flow profiles, such as physiologically relevant flow rates in multi-organ-on-chip platforms. The resulting microfluidic designs are directly exportable for three-dimensional printing. Experimental validation demonstrates that μFG-generated circuits reproduce target flow distributions with 90% accuracy. By streamlining and automating microfluidic circuit creation, μFG not only lowers the barrier to entry for nonexperts but also showcases a principled and efficient application of ML to fluidic system design, enabling rapid and customizable development of complex microfluidic architectures.

We demonstrate high temperature electronics for next-generation aircraft, focusing on the realization of a monolithically integrated active Hall effect sensor in SiC. This circuit is required to operate at temperatures up to 450 °C. A novel approach to operational amplifier design is introduced, employing discrete 4H-SiC JFETs and investigates the resulting variability in circuit performance for JFET prameter mismatches, subsequently leveraging these insights to optimize performance at temperatures up to 200 °C. Traditionally, a pair of transistors with highly matched turn-on voltage, is required for the realisation of a differential pair, a fundamental building block in op-amp topologoes. A novel method to compensate for the mismatch in turn-on voltage has been developed in a differential pair, allowing for significant improvements in gain despite a 1.3 V difference in threshold voltage between input JFETs. The op-amp circuit utilizes careful resistor selection in the source follower stages to ensure DC offset symmetry and reduce the influence of variation in JFET conductivity in the subsequent amplifier stages. The op-amp experimentally demonstrates an open loop DC gain of 71.5 dB and is shown to be effective in feedback networks and circuits integrated with a SiC Hall bar. An op-amp differential amplifier with a 359 DC voltage gain and 84 Ω output impedance was developed, and this circuit design offers adjustable signal amplification and significantly improved performance characteristics compared to conventional amplifier topologies.

Abstract Operator learning methodologies have gained significant attention as a powerful machine learning paradigm for solving partial differential equations (PDEs), yet their reliance on large labeled datasets for training limits broad applicability. This work advances the spectral operator learning (SOL) framework to address this challenge. We specifically extend SOL to the steady-state heat conduction (Poisson) equation with variable source terms, a critical problem in applications such as integrated circuit design. The core methodological contribution is a novel self-supervised learning strategy for SOL, which eliminates dependence on labeled data by training directly from the PDE residuals. This strategy leverages the spectral basis of SOL to inherently and precisely satisfy boundary conditions as hard constraints, thereby removing the need for explicit boundary condition loss terms and substantially reducing optimization complexity. We provide theoretical grounding by proving the universal approximation theorem for the proposed self-supervised SOL models on solving the Poisson equation. Comprehensive numerical experiments demonstrate that our approach achieves significantly higher accuracy compared to benchmark operator learning models. Furthermore, the framework exhibits robust generalization across different spatial resolutions and maintains consistent accuracy at arbitrary query points, confirming its suitability for practical, high-fidelity simulation.