Era Of Chips Research Articles

The Impact of the Medicaid/CHIP Expansions on Children

This article reviews findings from 38 rigorous studies published in the peer-reviewed literature of the impact of the Medicaid/Children's Health Insurance Program (CHIP) expansions on children. There is strong evidence for increases in enrollment in public programs and reductions in uninsurance following eligibility expansions. Medicaid enrollment continued to increase during the CHIP era (a "spillover effect"). Evidence for improved access to and use of services, particularly for dental care, is also very strong. There are fewer studies of health status impacts, and the evidence is mixed. There is a very wide range in the size of effects estimated in the studies reviewed because of the methods used and the populations studied. The review identifies several important research gaps on this topic, particularly the small number of studies of the effects on health status. Both research methods and findings from the child expansions can provide insights for evaluating the coming expansions for adults under the Affordable Care Act.

Evolution of technology dependence among leading semiconductor companies

PurposeThe purpose of this paper is to examine the characteristics and evolution of the technology‐dependence networks of leading semiconductor companies. By comparing and contrasting technology‐dependence networks in the 6‐, 8‐ and 12‐inch chip eras, this study clarifies the differences among integrated device manufacturers (IDMs) and foundries, and among each company in different eras.Design/methodology/approachLeading companies were identified by technological crowdedness and technological prestige to avoid massive actors. Strong ties were extracted to avoid too many relationship ties at the company network level. Strong ties represented directional technology relationships among companies whose citation counts and relative citation rates were higher. The technology‐dependence network of leading companies in three chip eras was examined by social network analysis.FindingsTechnology dependence among IDMs was the weakest, and their technology dependence upon foundries decreased in the 12‐inch chip era. The highest technology interdependence appeared among foundries and the reduction of their dependence upon IDMs. Technology dependence is expanded primarily by foundries, significant among GlobalFoundries, TSMC, UMC, and VIS.Practical implicationsIDM could invite foundries with technology dependence to form a strategic consortium. That way, the foundries could monitor potential competitors with relationship of technology dependence; in an advanced sense, the foundries could make use of the network to practice commercial maneuvers and create competitive advantage. Scholars may also observe semiconductor manufacturing technology's evolving into the maturity stage of product life cycle by interpreting foundries' highly technology interdependent relationships.Originality/valueThis is the first study to use strong ties in patent citation networks to represent technology‐dependence relationships.

An in-line process monitoring method using electron beam induced substrate current

In-line process monitoring technology plays a vital role in accelerating yield ramps and quickly identifying and resolving yield excursions in the system on a chip era. We have developed an in-line process monitoring method that uses electron beam induced substrate current. It is especially suitable for deep contacts and via holes. This method makes it possible to monitor non-destructive contacts and the via-hole formation process with a hole-bottom nm-order SiO 2 film thickness measurement and a hole-bottom diameter measurement. Moreover, it allows us to evaluate etching-process variation over an 8-inch wafer in less than 20 min. The results can be used for in-line device sorting as well as for decisions regarding the timing of etching machine maintenance.

Embedded trench DRAMs for sub-0.10-μm generation by using hemispherical-grain technique and LOCOS collar process

For the future system on chip era, the embedded DRAM is one of the most important devices. Since the kinds of device increase and each device must be produced from only 10000 wafers, it is difficult to withdraw the investment cost to fabricate each device. To suppress the investment cost, the devices must be shrunk by changing the integration and the materials as little as possible. In this paper, we propose the trench capacitor scaling strategy. We show that the strategy achieves 30 fF/cell for the 0.08 /spl mu/m trench and reduces the cost of ownership (COO) and raw process time (RPT) of the 0.08 /spl mu/m trench to 80% of 0.18-/spl mu/m trench, with an investment of only $1.6 M. It is achieved by the LOCOS collar process and HSG technique.

System Level Virtual Prototyping of DSP SOCs Using Grammar Based Approach

As we move from algorithm on a chip to system on a chip era, the design bottleneck is shifting from individual DSP functions to global control that composes a system from these functions. The practice in industry suffers from global control entering the design flow too late, discontinuity between functional modeling and implementation phase and mixing data flow with global control. MASIC--Maths to ASIC--is a methodology proposed in this paper that targets DSP SOCs and addresses these issues. Global control is specified in a grammar notation and integrates the output of functional modeling phase, the DSP functions, by referencing them. A virtual prototype is automatically built from such a specification that models the global control in VHDL and cosimulates with the DSP functions in C from the functional modeling phase. A highly efficient verification methodology based on separating the verification of global control from DSP functions is proposed. A smooth path to cycle true implementation is possible using either behavioral synthesis, IPs for the DSP functions or manual implementation. Experiments using realistic examples like GSM base band processing, rake receiver and some smaller examples have been carried out to quantify the benefits of MASIC.