Low-frequency Noise Characteristics Research Articles

Study on low-frequency noise characteristics of hydrogen-terminated diamond FETs

In this work, the low frequency noise (LFN) characteristics of Hydrogen-terminated diamond FETs are investigated. Both generation-recombination (GR) noise and flicker noise (1/f noise) are found to contribute to the LFN spectrum. The characteristic frequency of f01 = 0.1 Hz, f02 = 30 Hz, f03 = 300 Hz and corresponding effective trap density (Neff) of the GR centers are obtained. By changing the LFN measurement temperature, a trap activation energy level (Ea) of 0.12 eV is extracted from an Arrhenius plot. The dominant mechanism of the 1/f noise for the H-terminated diamond FETs follows the correlated mobility fluctuations (CMF) model. By fitting the experimental data to the CMF model, the trap density and scattering coefficient of the carriers are extracted to be 6.4×1020 eV−1 cm−3 and 4×105 V·s/C. At last, the trap density of the H-terminated diamond FETs is compared with other state-of-the-art GaN and Si based devices. A moderate trap density was obtained without any interface optimization, suggesting that H-terminated diamond FETs could be a promising future technology for power electronics.

Novel Y-function based strategy for parameter extraction in S/D asymmetric architecture devices and low frequency noise characterization in GAA Si VNW pMOSFETs

In this work, DC and low frequency noise measurements are performed in p-channel gate-all-around (GAA) silicon vertical nanowire (Si VNW) MOSFETs. The DC measurements highlight asymmetry in the drain current and transconductance transfer characteristic even in linear operation, at an applied drain voltage of −50 mV. A novel Y-function based strategy for parameter extraction in S/D asymmetric devices is proposed. This novel strategy allows the estimation of the value of each access resistance, from source and from drain sides, respectively, and allows overcoming the device asymmetry to provide an accurate extraction of the main DC parameters. The low-frequency noise studies on forward and reverse operation mode, demonstrate that the 1/f noise in both modes can be explained by the correlated carrier number (Δn) and mobility fluctuation (Δμ) mechanisms, with additional contribution of the access resistance noise in strong inversion.

RTS Noise Characterization of Trap Properties in InGaAs nFinFETs

In order to extract and characterize the trap properties in In <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\textit{x}}$</tex-math> </inline-formula> Ga <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{\text{1}-\textit{x}}$</tex-math> </inline-formula> As nFinFET sensitively and effectively, the time-domain and frequency-domain characteristics of low-frequency noise are studied by the random telegraph signal (RTS) method. It is found that the RTS noise in this study originates from the strong electron–phonon coupling mechanism. The activation energies of traps are extracted from the Arrhenius curves, and the results show that these traps mainly come from extended defects, such as dislocation, etc. Furthermore, the relationship between noise characteristics and gate length is explored, it is found that with the reduction of the gate length, the noise contains more RTS components. The noise behavior of devices with different In content is also investigated, it shows that the average of activation energies, as well as the capture cross section of bulk traps, decrease with the increasing In content in the channel. Overall, it can be concluded that the RTS noise is an effective tool to reveal the defect properties of nano-scaled devices. It can be used to provide theoretical guidance in improving the performance and reliability of devices.

Observation of interface trap reduction in fluoropolymer dielectric organic transistors by low-frequency noise spectroscopy

This study examines the low-frequency noise characteristics of the 2,7-dioctyl[1] benzothieno[3,2-b][1] benzothiophene organic thin-film transistor (OTFT) having a CYTOP dielectric layer. Specifically, the fabricated OTFT exhibits 1/f noise, and its behavior is explained via a carrier number fluctuation model. Additionally, the volume trap density (NT) of the gate dielectric is quantitatively evaluated and compared with its counterpart having SiO2 dielectric layer. The analysis of the results shows that the hydrophilic entities of the dielectric layer strongly influence the NT, while the CYTOP having hydrophobic properties provides less NT than that of SiO2.

Impact of Charge-Trapping Effects on Reliability Instability in AlxGa1-xN/GaN High-Electron-Mobility Transistors with Various Al Compositions.

In this study, we present a detailed analysis of trapping characteristics at the AlxGa1-xN/GaN interface of AlxGa1-xN/GaN high-electron-mobility transistors (HEMTs) with reliability assessments, demonstrating how the composition of the Al in the AlxGa1-xN barrier impacts the performance of the device. Reliability instability assessment in two different AlxGa1-xN/GaN HEMTs [x = 0.25, 0.45] using a single-pulse ID-VD characterization technique revealed higher drain-current degradation (∆ID) with pulse time for Al0.45Ga0.55N/GaN devices which correlates to the fast-transient charge-trapping in the defect sites near the interface of AlxGa1-xN/GaN. Constant voltage stress (CVS) measurement was used to analyze the charge-trapping phenomena of the channel carriers for long-term reliability testing. Al0.45Ga0.55N/GaN devices exhibited higher-threshold voltage shifting (∆VT) caused by stress electric fields, verifying the interfacial deterioration phenomenon. Defect sites near the interface of the AlGaN barrier responded to the stress electric fields and captured channel electrons-resulting in these charging effects that could be partially reversed using recovery voltages. The quantitative extraction of volume trap density (Nt) using 1/f low-frequency noise characterizations unveiled a 40% reduced Nt for the Al0.25Ga0.75N/GaN device, further verifying the higher trapping phenomena in the Al0.45Ga0.55N barrier caused by the rougher Al0.45Ga0.55N/GaN interface.

Comparative analysis of low-frequency noise based resistive switching phenomenon for filamentary and interfacial RRAM devices

We investigate the low-frequency noise (LFN) characteristics of resistive switching random access memory (RRAM) devices with metal–insulator–metal structures of TiN/Ti/TiO2/TiN (filamentary) and TiN/Ti/TiO2/HfO2/TiN (interfacial). By comparing filamentary and interfacial RRAM devices, we stipulate guidelines for noise sources according to the resistance states or resistive switching mechanisms of RRAM device. In filamentary RRAM devices, the dominant noise source in the low resistance state is the localized oxygen vacancies, whereas the noise characteristics in the high resistance state represent a bulk effect. In interfacial RRAM devices, the noise characteristics in both resistance states represent the bulk effect. The physical mechanism of the multilevel cell operation is inferred by the I–V characteristics in both Icc and Vreset control modes. Specifically, the changes in the structure of the conductive filament inside the switching layer can be confirmed through LFN measurement.

Low-frequency noise characterization of gate oxide trap depth distribution of MOSFETs

To accurately obtain the depth distribution of the gate oxide traps that cause low-frequency noises, this study developed a discrete form of the low-frequency noise model in MOSFETs based on McWhorter's theory. The non-negative least squares (NNLS) method is employed to numerically solve the designed model. The low-frequency noises of planar Ge nMOSFETs with a gate stack match the prerequisite of the proposed form, which is dominated by carrier number fluctuations and is consistent with the McWhorter model. These transistors are used as the object of analysis in this study. By introducing a La2O3 cap layer to the gate stack, the gate oxide trap profiles calculated by the discrete model and the NNLS method showed obvious suppression of the traps in the HfO2 body and concentration of the traps in and near the SiO2/HfO2 interface. The research on both energy-dispersive x-ray spectroscopy and electron energy-loss spectroscopy has shown during annealing the diffusion of La into HfO2 and the appearance of La-rich layer at the SiO2/HfO2 interface in the Ge nMOSFET with a La2O3 cap. According to the existing first-principles calculations, the substitution of Hf in HfO2 by La increases the formation energy of oxygen vacancies, and the formation energy of oxygen vacancies in the HfnLamSixOy layer formed near the SiO2/HfO2 interface is lower than that of HfO2. The experimental and theoretical results support the physical connotation of the calculations and validate the solution proposed by this study.

(Invited) In-Depth DC and Low Frequency Noise Characterization of Nanosheet FETs at Room and Cryogenic Temperatures

In this work, an in-depth static and low frequency noise characterization of nanosheet FETs, consisting of two vertically stacked silicon channels per device, is performed. A comparison of the performances from n- versus p-channel FETs operated at 300 K and 78 K, in terms of static and low frequency noise parameters variability, is also discussed. The main electrical parameters are estimated from the I-V characteristics using access resistance robust methodologies. An additional criterion demonstrating that the extracted parameters are not influenced by the second mobility attenuation factor is proposed. The low frequency noise studies prove that the dominant flicker noise mechanism is linked to correlated carrier number and mobility fluctuations, with additional access resistances noise contribution in very strong inversion. The importance of the considered total flicker noise model on the estimation of the Coulomb scattering coefficient is highlighted.

Low-frequency noise characteristics of indium–gallium–zinc oxide ferroelectric thin-film transistors with metal–ferroelectric–metal–insulator–semiconductor structure

We investigate the low-frequency noise characteristics of indium–gallium–zinc oxide ferroelectric thin-film transistors (FeTFTs) with a metal–ferroelectric–metal–insulator–semiconductor (MFMIS) structure. MFMIS FeTFTs are fabricated with different metal-to-FE area ratios (AM/AF's). It is revealed that the noise generation mechanism differs depending on the operation region [low and high drain current (ID) regions] and AM/AF. Excess noise in the low ID region is observed in the MFMIS FeTFTs with AM/AF's of 4 and 6 due to carrier mobility fluctuations. In the high ID region, the carrier number fluctuation generates the 1/f noise of the devices regardless of the AM/AF.

Effects of Interface Oxidation on Noise Properties and Performance in III-V Vertical Nanowire Memristors.

Memristors implemented as resistive random-access memories (RRAMs) owing to their low power consumption, scalability, and speed are promising candidates for in-memory computing and neuromorphic applications. Moreover, a vertical 3D implementation of RRAMs enables high-density crossbar arrays at a minimal footprint. Co-integrated III-V vertical gate-all-around MOSFET selectors in a one-transistor-one-resistor (1T1R) configuration have recently been demonstrated where an interlayer (IL)-oxide has been shown to enable high RRAM endurance needed for applications like machine learning. In this work, we evaluate the role of the IL-oxide directly on InAs vertical nanowires using low-frequency noise characterization. We show that the low-frequency noise or the 1/f-noise in InAs vertical RRAMs can be reduced by more than 3 orders of magnitude by engineering the InAs/high-k interface. We also report that the noise properties of the vertical 1T1R do not degrade significantly after RRAM integration making them attractive to be used in emerging electronic circuits.

Total-Ionizing-Dose Effects and Low-Frequency Noise in N-Type Carbon Nanotube Field-Effect Transistors With HfO₂ Gate Dielectrics

Total ionizing dose (TID) irradiation and low-frequency noise characterization are performed on carbon nanotube field-effect transistors (CNTFETs). Large hysteresis due to high border-trap densities is observed in as-processed and irradiated devices. TID irradiation also leads to significant radiation-induced charge trapping in the surrounding dielectrics resulting in parametric degradation. Percolation-path switching, and border traps contribute to low-frequency noise, with a relatively more prominent role for border traps after irradiation than before irradiation. These results show that process improvements are required to optimize both the initial operating characteristics and the radiation response of CNTFETs.

Optimization of electrical performance and stability of fully solution-driven α-InGaZnO thin-film transistors by graphene quantum dots

• Fully solution-derived GQDs-IGZO TFTs based on ZrO 2 as gate dielectrics have been achieved. • GQDs-IGZO TFTs devices with optimized doping content have demonstrated improved performances, including a μ FE of 35.91 cm 2 V –1 s –1 , a higher I ON / I OFF of 5.04 × 10 8 , a smaller subthreshold swing (SS) of 0.11 V dec –1 and a smaller interfacial trap states of 1.57 × 10 12 cm −2 . • Resistor-loaded unipolar inverter based on GQDs-IGZO/ZrO x has been integrated, demonstrating good dynamic behavior and a high gain of 9.3. • LFN characteristics of GQDs-IGZO/ZrO x TFTs have suggested that the fluctuations in mobility are the noise source. This work presents solution-processed high-performance graphene quantum dots (GQDs) decorated amorphous InGaZnO (α-IGZO) thin-film transistors (TFTs) based on ZrO x as gate dielectrics. Compare with pure IGZO TFTs, GQDs-modified α-IGZO TFTs devices with optimized doping content have demonstrated better performances, including a larger field-effect mobility ( μ FE ) of 35.91 cm 2 V –1 s –1 , a higher on/off current ratio ( I ON / I OFF ) of 5.04 × 10 8 , a smaller subthreshold swing (SS) of 0.11 V dec –1 and a smaller interfacial trap states ( D it , 1.57 × 10 12 cm −2 ). Moreover, the GQDs-doped IGZO TFTs with a doping concentration of 0.5 mg ml –1 have shown excellent stability under bias stress and illumination stress conditions. To demonstrate the potential applications of α-IGZO TFTs in logic circuits, a resistor-loaded unipolar inverter based on GQDs-IGZO/ZrO x has been integrated, demonstrating good dynamic behavior and a high gain of 9.3. Low-frequency noise (LFN) characteristics of GQDs-IGZO/ZrO x TFTs have suggested that the fluctuations in mobility are the noise source. Based on all the experimental findings, it can be concluded that solution-processed GQDs-IGZO/ZrO x TFT may envision promising applications in optoelectronics.

Low-Frequency Noise Characterization and Thermal Stability Analysis of Negative Capacitance Junction-Less Transistors

This article presents the stability and noise analysis of the negative capacitance cylindrical gate junction-less transistor (NC-CyJLT). Application of the negative capacitance concept has fetched very good results, where a sufficient reduction in power dissipation and reduced subthreshold swing is achieved. Results indicate that NC-CyJLT devices have reduced flicker and thermal noise, show a significant (63.6%) reduction in low-frequency noise and a reduction of 92.1% in thermal noise. Further, it has been proved that NC-CyJLT is the least affected due to temperature, hence, stability improves with low-power dissipation which suggests that the device is suitable for biomedical and sensor applications.

1/f Noise in Synaptic Ferroelectric Tunnel Junction: Impact on Convolutional Neural Network

In recent years, neuromorphic computing has been rapidly developed to overcome the limitations of von Neumann architecture. In this regard, the demand for high‐performance synaptic devices with high switching speeds, low power consumption, and multilevel conductance is increasing. Among the various synaptic devices, ferroelectric tunnel junctions (FTJs) are promising candidates. While previous studies have focused on improving reliability of FTJs to enhance the synaptic behavior, low‐frequency noise (LFN) of FTJs has not been characterized and its impact on the learning accuracy in neuromorphic computing remains unknown. Herein, the LFN characteristics of FTJs fabricated on n‐ and p‐type Si along with the impact of 1/f noise on the learning accuracy of convolutional neural networks (CNNs) are investigated. The results indicate that the FTJ on p‐type Si exhibits a far lower 1/f noise than that on n‐type Si. The FTJ on p‐type Si exhibits a significantly higher learning accuracy (86.26%) than that on n‐type Si (78.70%) owing to its low‐noise properties. This study provides valuable insights into the LFN characteristics of FTJs and a solution to improve the performance of synaptic devices by significantly reducing the 1/f noise.

Refined DC and Low-Frequency Noise Characterization at Room and Cryogenic Temperatures of Vertically Stacked Silicon Nanosheet FETs

In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS) FETs are investigated, the main difference being the vertical distance between the stacked NSs. Principal electrical parameters are estimated at room and liquid nitrogen temperatures using a refined <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${Y}$ </tex-math></inline-formula> -function methodology, the main advantage being that no extra iterative steps are necessary. The results are confirmed using other derivative dc parameter estimation methodologies. Low-frequency noise measurements evidence variability of the flat-band voltage noise and correlation between the noise level and the low field mobility. The dominant flicker noise mechanism is related to the correlated mobility and carrier number fluctuation mechanism with access resistance noise contribution in very strong inversion. The impact of the access resistance on the estimation of the Coulomb scattering coefficient is evidenced.

Низкочастотные шумы и сопротивление фотодиодов с незащищенной поверхностью на основе InAsSbP/InAs в атмосфере паров этанола

Low frequency noise and electrical characteristics of p-InAsSbP/n-InAs single heterostructures grown onto n+-InAs substrates have been measured in the presence of atmosphere containing ethanol vapor. Correlation between ethanol vapor density and electrical spectral noise density as well as the heterostructure resistance has been estimated, and possible reasons for such correlation have been discussed.

Electrical Performance Enhancement and Low-Frequency Noise Estimation of In2O3-Based Thin Film Transistor Based on Doping Engineering

In this work, solution-derived InErO thin films were deposited to act as the channel layers of thin film transistors (TFTs). The effect of Er doping content on the morphology, oxygen defects, optical properties of indium oxide (In2O3) films, and electrical performance of InErO/Al2O3 TFTs was systematically investigated. Based on experimental results, it can be inferred that InErO-TFTs with 5% Er doping content has demonstrated improved electrical performance, including field effect mobility ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\mu _{\text {FE}}$ </tex-math></inline-formula> ) of 17.55 cm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$^{{2}}\,\,\cdot \,\,\text{V}^{-{1}}\,\,\cdot \,\,\text{s}^{-{1}}$ </tex-math></inline-formula> , <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${I} _{\text{ON}}/{I} _{\text{OFF}}$ </tex-math></inline-formula> of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$1.70\times 10^{{7}}$ </tex-math></inline-formula> , a subthreshold swing (SS) of 0.16 V/dec and threshold voltage shift of 0.10 and 0.09 V under positive bias stress (PBS) and negative bias stress (NBS) for 1800 s, respectively. The illumination NBS (NBIS) measurements have indicated the degraded device stability by reducing the light wavelength, which can be due to the ionization of oxygen vacancies. Low-frequency noise (LFN) characterizations on devices have shown that the interfacial density of states of In2O3-based TFTs decreases after Er doping. To demonstrate the potential applications of InErO-TFTs in logic circuits, a resistor-loaded unipolar inverter based on InErO/Al2O3 has been integrated, demonstrating good dynamic response behavior and high gain of 10. These results have indicated the great potential of solution-driven InErO-based TFTs for future applications in low-cost and high-performance electronics.

Electrical Resistivity and Microwave Properties of Carbon Fiber Felt Composites

We present studies on the microwave properties, electrical resistivity, and low-frequency (10 Hz-20 kHz) noise characteristics in the temperature range of 78 K to 380 K of composite materials made from bisphenol A-based epoxy resin and carbon fiber felts. Two types of carbon fibers were used, derived from polyacrylonitrile or regenerated cellulose. We show that these structures are suitable for electromagnetic shielding applications, especially in the direction parallel to the carbon fibers. The low-frequency voltage fluctuations observed in these materials are of the 1/fα, and the noise intensity is proportional to the square of the voltage. The characteristics of the investigated materials show an instability in the temperature range from 307 K to 332 K. This effect is followed by an increase in resistivity and noise intensity, but it does not change the character of the noise, and this instability vanishes after a few repeated heating and cooling cycles.

Sensing Remote Bulk Defects through Resistance Noise in a Large-Area Graphene Field-Effect Transistor

The substrate plays a crucial role in determining the transport and low-frequency noise behavior of graphene field-effect devices. Typically, a heavily doped Si/SiO2 substrate is used to fabricate these devices for efficient gating. Trapping-detrapping processes close to the graphene/substrate interface are the dominant sources of resistance fluctuations in the graphene channel, while Coulomb fluctuations arising due to any remote charge fluctuations inside the bulk of the substrate are effectively screened by the heavily doped substrate. Here, we present the electronic transport and low-frequency noise characteristics of a large-area CVD graphene field-effect transistor (FET) prepared on a lightly doped Si/SiO2 substrate (NA ≈ 1015 cm-3). Through a systematic characterization of transport, noise, and capacitance at various temperatures, we reveal that the remote Si/SiO2 interface can affect the charge transport in graphene severely and any charge fluctuations inside the bulk of the silicon substrate can be sensed by the graphene channel. The resistance (R) vs back-gate voltage (Vbg) characteristics of the device show a hump around the depletion region formed at the SiO2/Si interface, confirmed by the capacitance (C)-voltage (V) measurement. A low-frequency noise measurement on these fabricated devices shows a peak in the noise amplitude close to the depletion region. This indicates that due to the absence of any charge layer at the Si/SiO2 interface, the screening ability decreases, and as a consequence, any fluctuations in the deep-level Coulomb impurities inside the silicon substrate can be observed as noise in resistance in the graphene channel via mobility fluctuations. The noise behavior on ionic liquid-gated graphene on the same substrate exhibits no such peak in noise and can be explained by the interfacial trapping-detrapping processes close to the graphene channel. Our study will definitely be useful for integrating graphene with the existing silicon technology, in particular, for high-frequency applications.

Variability analysis of ferroelectric FETs in program operation using low-frequency noise spectroscopy

We investigate the variability of a ferroelectric FET (FEFET) in program operation using low-frequency noise (LFN) spectroscopy. Contrary to the previous report, LFN characteristics of FEFETs differ significantly depending on the program [low threshold voltage (Vth)] or erase state [high Vth)] [Shin et al., IEEE Electron Device Lett. 43, 13 (2022)]. Furthermore, the 1/f noise variation of the FEFETs is much larger in the program state than that in the erase state. It is revealed that the change in the number of electrons trapped at the FE/dielectric interface and oxygen vacancy in each program operation is the main reason for the variability of the FEFET in program operation. The variation stemming from the change in the number of trapped charges is significantly worsened when the channel area is scaled down.