Despite the roll-to-roll (R2R) gravure printing method emerging as an alternative sustainable technology for fabricating logic circuits based on p- and n-types of single-walled carbon nanotube thin film transistors (p,n-SWCNT-TFTs), the wide variation of large threshold voltage (Vth > ~8) in the R2R printed p,n-SWCNT-TFTs prevents the integration of complementary logic circuit. Here, the Vth variation of the p,n-SWCNT-TFTs was narrowed down by developing a method of using the first gravure roll with the minimized superposition error (< ±40 µm) of engraved registration marks and implementing the R2R doping process for tailoring the Vth using polymer-based p- and n-doping inks. Through those two methods, the R2R printed the p,n-SWCNT-TFTs was tailored to shift Vth to near ±2.7 V and reduce Vth variation to ±1.6 V while the noise margin was improved by 24% so that a large number of R2R printed logic gates could be integrated with clear logic levels at ±10 V of operation voltage. Based on the tailored p,n-SWCNT-TFTs, a fully R2R printed 4-bit arithmetic and logic unit was successfully demonstrated by integrating 156 p,n-SWCNT-TFTs.
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