Capacitor Converter Research Articles

Online Condition Monitoring for Both IGBT Module and DC-Link Capacitor of Power Converter Based on Short-Circuit Current Simultaneously

Insulated-gate bipolar transistor (IGBT) modules and dc-link capacitors are important parts in the majority of power electronic converters which contribute to cost, size, and failure rate on a considerable scale. This paper presents an online condition monitoring method for both IGBT modules and dc-link capacitors of power converters based on short-circuit current of an IGBT module, which is a good condition indicator according to the theory analysis. The failure prediction of dc-Link capacitor is realized by equivalent series resistance, which can be calculated by short-circuit current and a step voltage, and the bond wires fatigue can also be identified by the short-circuit current. The proposed method is capable for detecting small changes in the failure indicators of IGBT modules and electrolytic capacitors, and its effectiveness is validated by a confirmatory experiment. The novelty of the proposed method is that the degradations of IGBT modules and capacitors can be identified simultaneously, and has the merits of low cost and circuit simplicity

Effective protection for doubly fed induction generator-based wind turbines under three-phase fault conditions

This paper proposes an effective protection strategy which combines three-crowbar circuit configuration (TCCC), a small bypass resistor (SBR) for wind turbines (WTs) based on the doubly fed induction generators (DFIGs). The TCCC includes (i) resistive crowbar, (ii) inductive crowbar, and (iii) capacitive crowbar. Conventionally, applying only resistive-crowbar circuit as the only means of protection on the DFIG WT, the rotor-side power converter (RSPC) and dc-link capacitor are protected against the effects of a severe voltage dip. However, tripping the RSPC leads to loss of excitation control, and the DFIG behaves like the squirrel-cage induction generator which obtains its magnetization current from the grid which further deepen the terminal voltage. Moreover, integrating the resistive crowbar with series R–L branch keeps the RSPC connection active, but the generator excitation control is partially retained and the oscillations of the rotor currents and dc-link voltage can heavily deteriorate the performance of the generator. Thus, the TCCC-SBR circuit is proposed to compensate for the deficiency when the two conventional circuits are applied. Its performance validation is performed via extensive simulation studies using MATLAB/Simulink software. From the comparative simulation results, more improved fault ride-through capability of the DFIG is achieved with the proposed protection circuit than the conventional protection circuits.

Improvement of power generation performance in a doubly salient permanent magnet generator with a capacitive energy recovery converter

In order to improve the power generation performance of a doubly salient permanent magnet generator (DSPMG), this study proposes a new converter called capacitive energy recovery converter (CERC), together with the corresponding control strategy. The CERC is composed of controllable devices, uncontrollable devices, and an energy storage circuit. The control strategy has been designed based on analysis of the electromagnetic characteristics of the DSPMG. With the proposed control strategy, the winding current of each phase can be controlled and increased separately, thus yielding large negative electromagnetic torque against the prime mover in a complete electric cycle. At the same time, the excitation sources are independent of the load part. As a result, power generation performance of the DSPMG with CERC is improved compared to that with a traditional three-phase full-bridge converter. A multi-objective optimisation problem is formulated to find the optimal turn-on and turn-off angles of two systems, which are used as control parameters in this comparison. Besides the lower voltage and torque ripples, the dynamic and fault-tolerant performance of the DSPMG with CERC is also superior. Both simulations and experiments have been conducted to verify the validity of the proposed converter and the control strategy.

A Static Ground Power Unit Based on the Improved Hybrid Active Neutral-Point-Clamped Converter

This paper proposes a new configuration for static ground power unit (GPU) based on the novel 25-level hybrid active neutral-point-clamped (HANPC) converter. The superiority of the proposed converter, as compared with conventional and other suggested multilevel converters, is significant decreasing the number of switches and minimizing the number of flying capacitors (FC) in converter. This improvement is possible by using suggested low-voltage submodule converter to the ANPC converter and proposed modulation method. This results in reduction of the size and cost of converter and makes it more feasible and reliable. Applying the active voltage balancing method for FC in the proposed HANPC converter guaranties fast charging and voltage-level regulation of FC without using balance booster circuit. Improving output voltage spectrum leads to inductance reduction of output L–C filter which enhances static GPU performance. The simulation and experimental results verify the validity and feasibility of the proposed converter.

Fault tolerant‐topology and controls for a three‐level hybrid neutral point clamped‐flying capacitor converter

This study details a three-level hybrid fault-tolerant converter. The definition of an original decoupling solution between the fourth flying capacitor (FC) leg and the three neutral point (NP) clamped-based phases overcomes topology hybridisation issues. Under normal conditions, a control strategy of the FC-based leg leads to a converter NP voltage balance, and decreases the DC side capacitors’ volume and cost. Under fault conditions, the presented fault isolation and converter reconfiguration strategies generate a post-fault converter, which is able to operate safely with the added FC-based leg. The proposed topology is an interesting trade-off between converter fault-tolerant capability and its complexity and offers the ability to be simply reconfigured and controlled in the case of switch fault occurrence. Two operation modes under fault conditions are presented and their performances are shown and discussed through simulation results and first experimental tests.

A 4.1 W/mm2 Hybrid Inductive/Capacitive Converter for 2–140 mA-DVS Load under Inductor

This work presents a fully integrated hybrid inductive/capacitive converter maintaining high efficiency for a load range of 2 mA to 140 mA (70×) suitable for the dynamic voltage scaling (DVS) based loads. This high efficiency is achieved by using an inductive converter for higher loads (15–140 mA, 0.50–0.9 V) and a capacitive converter for lighter loads (2–5 mA, 0.40–0.55 V) with a 50 mV hysteresis margin. A digital state machine activates the appropriate converter based on the power efficiency and enables the converter hand-over. The functional feasibility of implementing digital circuits as representative loads under the inductor is shown thereby increasing the peak converter power density from 0.387 W/mm2 to 4.1 W/mm2 with only a minor hit on the efficiency. The maximum measured efficiency is achieved in inductive mode of operation and decreases from 76.4% to 71% when digital circuits are present under the inductor. The design was fabricated in IBM’s 32 nm SOI technology.

Classification of Power Quality Events Using Wavelet Analysis and Probabilistic Neural Network

<p>Power quality studies have become an important issue due to widespread use of sensitive electronic equipment in power system. The sources of power quality degradation must be investigated in order to improve the power quality. Switching transients in power systems is a concern in studies of equipment insulation coordination. In this paper a wavelet based neural network has been implemented to classify the transients due to capacitor switching, motor switching, faults, converter and transformer switching. The detail reactive powers for these five transients are determined and a model which uses the detail reactive power as the input to the Probabilistic neural network (PNN) is set up to classify the above mentioned transients. The simulation has been executed for an 11kv distribution system. With the help of neural network classifier, the transient signals are effectively classified.</p>

Switch fault diagnosis and capacitor lifetime monitoring technique for DC–DC converters using a single sensor

Owing to the key role of the power electronic converters in various applications, their reliability is an important issue. The electrolytic capacitor and the power switch are the most vulnerable components of the converters. On fault occurrence in these components, a suitable remedial strategy should be employed to prevent further damages. The first step in any remedial strategy is fault diagnosis including fault detection and identification. This study proposes a technique for switch fault diagnosis and capacitor lifetime monitoring in non-isolated single-switch DC–DC converters. The proposed cost-effective method could be easily implemented using a printed circuit board Rogowski coil (PCBRC) on the capacitor terminals. The derivative of the capacitor current is captured by the PCBRC. The captured signal contains suitable signatures for detection of switch open-circuit and short-circuit faults. In addition to switch fault detection, lifetime of the converter capacitor is also monitored by the PCBRC via calculation of the capacitor equivalent series resistance. The proposed technique is implemented for a buck converter. The experimental results confirm the capability of the proposed technique for switch fault diagnosis and capacitor lifetime monitoring in non-isolated single-switch DC–DC converters.

Exploration of the Chaotic Behaviour in a Buck–Boost Converter Depending on the Converter and Load Elements

In this paper, detailed analyses of the chaotic behavior observed in a buck–boost converter are presented. Although this basic converter system is already known world-wide for the purpose of dc–dc conversion of the output of renewable energy systems, it indicates certain chaotic regimes where both the output amplitude and frequency change randomly. This chaotic regime can yield an unstable output over the resistive or resistive/inductive electrical loads. This study presents a detailed map for the regular and chaotic regions in terms of material parameters, such as converter capacitance C, resistive load R, and inductive load L. Thus, the stable area of operation for efficient and renewable electricity production will be ascertained for the studied converter system. We emphasize that the material parameters C, R, and L play important roles in generating energy from the solar cell; indeed, the stability increases with higher values of the converter capacitor and load inductance, whereas it decreases according to the resistive load. A number of periodic windows have been observed and the output frequency gives a broad-band spectrum of up to 50 kHz.

Transient Performance Improvement in the Boundary Control of Boost Converters using Synthetic Optimized Trajectory

This paper focuses on an improvement in the transient performance of Boost converters when the load changes abruptly. This is achieved on the basis of the nature trajectory in Boost converters. Three key aspects of the transient performance are analyzed including the storage energy change law in the inductors and capacitors of converters during the transient process, the ideal minimum voltage deviation in the transient process, and the minimum voltage deviation control trajectory. The changing relationship curve between the voltage deviation and the recovery time is depicted through analysis and simulations when the load suddenly increases. In addition, the relationship curve between the current fluctuation and the recovery time is obtained when the load suddenly decreases. Considering the aspects of an increasing and decreasing load, this paper proposes the transient performance synthetic optimized trajectory and control laws. Through simulation and experimental results, the transient performances are compared with the other typical three control methods, and the ability of proposed synthetic trajectory and control law to achieve optimal transient performance is verified.

A Distortion Cancelation Technique With the Recursive DFT Method for Successive Approximation Analog-to-Digital Converters

This paper proposes a recursive discrete Fourier transform (RDFT) foreground digital calibration method for successive approximation (SAR) analog-to-digital converters (ADCs). This calibration method can lower the harmonic distortion caused by capacitor mismatch and dc offset of comparators to improve the resolution and performance of ADCs. Capacitor mismatch results in a digital-to-analog converter (DAC) capacitor array that is unequal to $2^n$ . RDFT can be adopted to evaluate the real radixes of a DAC capacitor array with a new digital output to compensate for the error caused by capacitor mismatch. Furthermore, the calibration technique can eliminate the dc offset error of a comparator circuit. The proposed novel digital calibration method that utilizes RDFT instead of the traditional fast Fourier transform has the advantages of variable transform length, lower complexity, faster computation, and less hardware cost. The analog block of SAR ADC with RDFT is implemented in the TSMC 0.18- $\mu\mbox{m}$ standard CMOS process with a 200-kS/s sampling rate to validate the proposed method. Simulation results show that the total harmonic distortion (THD) is 64.97 dB before calibration, whereas a THD of 73.05 dB can be achieved after calibration. In addition, the effective bit numbers are 9.98 and 11.26 b before and after calibration, respectively.

Modulation Strategy for Multiphase Neutral-Point-Clamped Converters

This paper presents a novel modulation strategy for n -phase neutral-point-clamped (NPC) converters. The proposed modulation strategy is able to control and completely remove the low-frequency neutral-point (NP) voltage oscillations for any operation point and load types. Even when unbalanced and/or nonlinear loads are considered, the NP voltage remains under total control. Consequently, the strategy is very attractive for n -phase active filters. In addition, it enables the use of low-capacity film capacitors in NPC converters. The proposed modulation takes the carrier-based modulation strategy as a basis. It is formulated following a generalized approach that makes it expandable to n -phase NPC converters. In addition, the NP voltage is controlled directly using a closed-loop algorithm that does not rely on the use of the linear control regulators or the additional compensators used in other modulation algorithms. Therefore, no tuning of parameters is required and it performs optimally for any operating conditions and kind of loads, including unbalanced and nonlinear loads. Although the high-frequency harmonic content of the output voltages may increase, the weighted total harmonic distortion generated by the proposed strategy is similar to that of a standard sinusoidal pulse width modulated strategy. The proposed modulation algorithm has been tested in a four-leg NPC converter prototype performing as a three- and four-phase system and operating with balanced and unbalanced loads.

A New Front End Capacitive Converter Fed Switched Reluctance Motor for Torque Ripple Minimization

This paper presents new converter for torque ripple minimization of three phases Switched Reluctance Motor (SRM). The proposed converter has basic passive circuit which includes two diodes and one capacitor to the front end of an asymmetric converter with a specific end goal to get a high magnetization and demagnetization voltage. In view of this boost capacitor, the charge and demagnetization voltage are higher. Accordingly, it can reduce the negative torque generation from the tail current and enhance the output power. The proposed converter circuit is equipped for minimizing the SRM torque ripple furthermore enhancing the average torque when contrasted with traditional converter circuit. A three-phase SRM is modeled and the simulation output for no load and stacked condition depicts that the proposed converter has better performance when contrasted with traditional converter. It is appropriate for electric vehicle applications. The proposed framework is simulated by utilizing MATLAB/Simulink environment and their outcomes are examined extravagantly.

Modeling and Efficiency Analysis of Multiphase Resonant-Switched Capacitive Converters

This paper presents an analytical method to evaluate pertinent data of the resonant capacitive switching converter, especially the voltage gain and power efficiency. Instead of long transient simulation time, the proposed model uses frequency decomposition to speed-up computation. This method is valid for N -phase operation, and extends the recently published studies on this promising topology outside zero-current/voltage switching conditions. Thanks to this tractable expression, we also reveal the intrinsic efficiencies over the voltage gain of two- and three-phase structures working at the resonant frequency in step-down operation. These results help to gain better understanding of multiphase operation, and encourage additional studies to use the full capability offered by the resonant-switched capacitor converter especially for power on-chip integration.

On Loss Mechanisms of Complex Switched Capacitor Converters

In this paper the power losses of efficient capacitive converters with multitude transfer ratio values are discussed. The loss mechanism circuits, based on general transposed series parallel (GTSP) topology, is studied and the losses are calculated, which in turn enables the “bottlenecks” to be identified and overcome. The calculations show that for a given number of switching cells the power losses of such converters are mainly dependent on the voltage conversion ratio, the topology function, the resistances of the switches in on and off states, the ESR of the capacitors, the switching frequency, the voltage drop, and the load. The theory explains the fact that was observed in experiments, that for low voltage conversion ratio values, efficiency decrease was measured. It is shown that for these low voltage ratio values the mechanism associated to the off resistance of the switches is more dominant and reduces the efficiency. This power loss estimation can be used as a powerful tool for the performance optimization of capacitive converters. The theoretical results are verified experimentally on a 10-cell GTSP converter prototype. The experimental results show good agreement with the proposed theory.

English

Photovoltaic (PV) systems have been developed into mature technology that has been used in specialized applications. Partially shaded photovoltaic system result in reduction of power generation and produces multiple maximum power points (MMPP) in the characteristics. In this paper, multi-stacked voltage equalizer is employed to solve this issue. Multi-stacked voltage equalizer is designed by incorporating inductor, capacitor, diode and filters in traditional SEPIC converter. Single Switch in this voltage equalizer reduces the complexity of the circuit. This equalizer receives the unbalanced voltages from PV array and makes it balanced by converter operation itself. Small amount of power generated is transferred from the un-shaded PV to shaded PV so that the entire PV array is operating at the same voltage. It is observed that voltage imbalance is slowly eliminated by this equalizer.

A Modified Modular Multilevel Converter With Reduced Capacitor Voltage Fluctuation

The requirement of a large number of sizeable capacitors in traditional modular multilevel converter (MMC) submodules is seen as a major barrier hampering its widespread use in medium-voltage applications. To reduce the value of capacitance, this paper presents a modified MMC (M-MMC) topology, which offers inherent alleviated capacitor voltage fluctuations compared with traditional MMC. Its operating principle, modulation, and capacitor voltage balancing strategies are described in detail. Moreover, a novel capacitor voltage fluctuation suppression scheme is also proposed to further reduce the second-order capacitor voltage ripples. Finally, both a three-phase prototype of M-MMC and traditional MMC have been built in the laboratory. The effectiveness of the proposed M-MMC topology and control methods is experimentally verified by comparing with the traditional MMC.

Passive reference-sharing SAR ADC

Charge-redistribution successive approximation register (SAR) analog-to-digital converters (ADCs) are widely used for their simple architecture, inherent low-power consumption and small footprint. Several techniques aiming to reduce the power consumption, to increase the speed, and to reduce the capacitance spread have been developed, such as splitting the digital-to-analog converter (DAC) capacitor array, and charging and discharging the DAC capacitors in multiple steps. In this paper, a fully differential, low-power, passive reference voltage sharing SAR ADC architecture is presented, along with its theoretical analysis and test results. In this architecture, suitable for low sampling rate and low-resolution applications, the reference voltage is scaled down by successively connecting equally sized capacitors in parallel, allowing the use of small capacitor for its implementation. The implemented 6-bit ADC is one of the smallest ADCs reported in a 180-nm technology, and features a FoM between 30.8 and 39.3fJ per conversion step without considering the clock generator power consumption.

Sleep power minimisation using adaptive duty‐cycling of DC–DC converters in state‐retentive systems

Aggressive power management techniques, which combine hardware and software solutions, are fundamental for embedded computing platforms today, especially if they are battery operated. This paper proposes an adaptive low-level algorithm, which modulates the DC–DC converter activation for minimising quiescent current consumption. This algorithm allows a discontinuous usage of the DC–DC converter during the sleep time, without requiring modification in the user's main program, by powering the system solely with the internal DC–DC converter capacitor and without using any other additional capacitors as an energy buffer. The algorithm computes the maximum interval between consecutive wake-ups necessary for the capacitor recharging at run-time. Intervals are decided by taking into account both the global leakage and the temperature-dependent variations of the capacitor. The proposed solution significantly enhances the lifetime of applications with a low activity rate, such as wireless sensor networks, while still guaranteeing efficient power delivery for high-current demand intervals.

Technique for Dielectric Measurements of Water-Saturated Systems

Methods and techniques are proposed for dielectric measurements of water-mineral systems. Specifications are formulated for their construction and a design for a capacitive primary measurement converter is developed for monitoring natural and manmade mineral water-saturated systems. A method is developed for calculating equivalent input conductivity and its components based on a cascade combination of elements of an extended coaxial primary measurement converter. Mathematical modelling and experimental studies of the proposed converter confirm the efficiency of using it for monitoring the state of bound water in natural and manmade water-saturated mineral systems.