Bus Assignment Research Articles

Electric bus fleets during urban flash floods: A mixed bus fleet strategy

Bus electrification is widely cited as a key technique to reduce carbon emissions and mitigate climate change. In some Chinese cities, the electrification rate of buses has even reached 100%. However, compared with diesel buses (DBs), electric buses (EBs) cause scheduling problems during urban flash floods due to their limited wading performance. This study proposes a mixed EB-DB fleet strategy to mitigate bus fleet problems during urban flash floods. The difference in wading height thresholds between EBs and DBs is considered in the fleet schedule. Utilizing a two-fleet strategy, the requisite number of DBs for bus depots is calculated. The mixed bus assignment problem is then solved by linear programming to establish the optimal dispatch scheme for the individual bus route. This study emphasizes the advantages of mixed bus fleets in emergency response and contributes to improving urban transportation resilience.

Matheuristics for a multi-day electric bus assignment and overnight recharge scheduling problem

To limit greenhouse gas emissions in the public transportation sector, transit authorities are constantly increasing the proportion of electric buses (EBs) in their fleets. Due to space and budget constraints, more often than not, the number of chargers that can be installed at the depots is less than the number of EBs in the fleet. Moreover, even if there is one charger for each EB, it is virtually impossible to use all the chargers at the same time due to maximum power grid constraints. Thus, there is a need to devise optimization techniques that help to recharge the buses in an efficient and acute way, taking into account these charging infrastructure capacity constraints. In this study, we consider a multi-day electric bus assignment and overnight recharge scheduling problem that can be briefly stated as follows. Given a set of vehicle blocks (sequences of timetabled bus trips performed by the same bus on a given day) to be operated over several days, a set of identical EBs, and a set of chargers available at the depot whose charging function is a piecewise linear function, the problem consists in assigning an EB to each block and to schedule the overnight recharging operations at the depot such that the EBs never run out of energy when performing their blocks and the depot charging capacity is never exceeded. The objective is twofold: minimizing the total charging costs and minimizing the impact of the charging decisions in the long-term health of the batteries. We first model this problem as a mixed integer linear program (MILP) that can be solved with a commercial solver. Then, to yield faster computational times, we develop two multi-phase matheuristics based on the MILP. To show the interest of considering a multiple-day horizon, we introduce two other matheuristics that mimic current industrial practices and solve the problem sequentially, one day at a time. To evaluate all these algorithms, we use a set of 264 instances generated from data of an EB operator.

Dynamic Multiline Vehicle Dispatching Strategy in Transit Operations

Providing regularity in buses’ operation in high-frequency services is essential to offer a good quality of service to users. If buses are not dispatched at regular headways from the terminal, headway irregularity will gradually increase along the line. In this work, we study a vehicle dispatching problem in which multiple lines start their operations from a common terminal where buses can interchange between lines. The model simultaneously decides the ideal dispatching headway for each line and assigns the following arriving buses to the terminal its line to operate and its corresponding dispatching time. The objective is to minimize the dispatching interval’s deviation from an ideal headway that is dynamically updated based on the system’s status. We formulate our problem as a Mixed-integer quadratic problem and adopt a rolling horizon policy to cope with the dynamic and stochastic environment of public transit systems. We prove that a bus assignment that satisfies the FIFO discipline is an optimal solution for the proposed problem. We evaluate our model in a simulation environment under different operational conditions and study the incremental benefits of allowing different flexibility schemes. Our results show that a full flexibility scheme where buses can freely interchange between lines reduces the coefficient of variation of dispatch headways and improves frequency compliance by nearly 20% when compared with the case where buses are restricted to operate in a single line. It also outperforms a myopic heuristic that adopts a a priori target headway. Computational times are compatible with real-time applications.

Bus Assignment Considering Flexible Escape Routing for Layer Minimization in PCB Designs

It is necessary for cost consideration to minimize the number of used layers in a PCB design. Traditionally, the number of used layers outside components in bus assignment depends on the locations of the bus pins inside components in escape routing in a PCB design. In this article, the concept of introducing the flexible escape directions in escape routing is considered in bus assignment outside components in a PCB design. Clearly, the flexible consideration of the escape directions inside components can lead to the reduction on the number of used layers in bus assignment outside components. Given a set of buses on a set of components in a PCB design, based on the introduction of the flexible escape directions in escape routing and the construction of the possible bus connections in bus assignment, the two upper bounds of the layer numbers inside and outside components can be first computed. By eliminating the redundant bus connections for the given buses, an integrated algorithm can be further proposed to minimize the number of used layers in a PCB design. Based on the assignment constraints from the intersection relations inside components, the physical connections of the given buses can be assigned onto a minimal set of used layers. Compared with the two-phase algorithm using Yan’s routing algorithm in direction-constrained rectangle escape routing and Yan’s assignment algorithm in bus assignment, the experimental results show that our proposed integrated algorithm uses reasonable CPU time to reduce 32.1% of the layer number for ten tested examples in a PCB design on the average.

A Bus Reservation System On Smartphone

The use of bus in traveling is a large growing business in the world. Hence, bus reservation system deals with maintenance records of each passenger who had reserved a seat for a journey. Moreover, the ticketing system includes maintenance of schedule, fare and details of each bus traveling. This paper is a web-based application that will manage the scheduling of buses in all bus terminals of a transport company and also analyses the basic needs of passengers and design requirements of the transfer algorithm, and influence factors for effective running. This software developed can be used by any transport company as it wasn’t designed for a particular bus station/company. The scheduling of buses which was the major addition to the bus booking application was implemented using round robin for proper bus assignment in a way that improves operational efficiency. The system thus designed will provide a scenario for the customer/passengers and the bus company to attain a win-win situation. It is an adaption of the speed-up technique. This aim is achieved through the use of object-oriented methodology.

PEDESTRIAN–BUS ROUTE AND PICKUP LOCATION PLANNING FOR EMERGENCY EVACUATION

Planning for a bus-based regional evacuation is essential for emergency preparedness, especially for hurricane or flood prone urban environments with large numbers of transit-dependent or transit-captive populations. This paper develops an optimization-based decision-support model for pedestrian–bus evacuation planning under bus fleet, pedestrian and bus routes, and network constraints. Aiming to minimize the evacuation duration time, an optimization model is proposed to determine the optimal pickup nodes for evacuees to assemble using existing pedestrian routes, and to allocate available bus fleet via bus routes and urban road network to transport the assembled evacuees between the pickup nodes and designated public shelters. The numerical examples with two scenarios based on the Sioux Falls street network from North Dakota (United States) demonstrates that this model can be used to optimize the evacuation duration time, the location of pickup nodes and bus assignment simultaneously.

Improving Bus Transit Services for Disabled Individuals: Demand Clustering, Bus Assignment, and Route Optimization

Bus transit provides shorter-distance public transportation services, which are subject to various disability discrimination acts with various dedicated features. The Americans with Disabilities Act (ADA) requires that disabled individuals shall have equal rights to receive fare bus transit services, including fixed-route and door-to-door bus services. Most previous studies were mainly focused on policy aspects as part of the efforts of disability rights. The proper planning of demand requests from disabled individuals has been a critical issue but has gained insufficient attention. The existing methodologies in planning route for special transit buses for disabled individuals normally do not consider passengers' waiting time, lack sufficient flexibility, and have strict restrictions on the total number of served destinations. This paper proposes a four-module based methodology for the planning of bus transit, including demand information collection, demand clustering, transit bus assignment, and a linear programming-based route planning with different objective functions. Houston MetroLift bus transit service was employed as an example to illustrate the proposed method. Three scenarios during the route planning module were designed in this case study: (1) planning for pre-timed shortest distance, (2) planning for the pre-timed shortest waiting time of passengers, and (3) flexible planning. Results showed that scenario 1 obtained the shortest total travel time and the highest benefit for bus providers, scenario 2 is with the shortest average waiting time, while scenario 3 is real-time based with longer total travel time and longer waiting time. Scenarios 2 and 3 consider the special needs of disabled passengers.

Modified differential evolution algorithms for multi-vehicle allocation and route optimization for employee transportation

ABSTRACTThis research aims to develop decision making on how to provide employees with a transportation service that is fast, cost effective and timely. This work is different from previous research in that it integrates the bus stop determination, bus assignment and the bus route design sub-problems of an employee transportation service for a large-scale company. The objective of this article is to minimize total travelling costs and the total rental costs of the heterogeneous fleet capacitated vehicles. A mathematical model is applied to solve for small-size problems. Additionally, for large-size problems, five modified differential evolution (MDE) algorithms are developed to solve the three sub-problems simultaneously. New rules used in the mutation process of the MDE algorithms and an advanced design of the encoding and decoding method are presented in this article. The results demonstrate that the MDE is an efficient transportation management system for any organization.

Operational planning of public transit with economic and environmental goals: application to the Minneapolis–St. Paul bus system

This study develops a framework to optimize bus assignments and operating practices to routes considering both operating costs and environmental goals. The mixed-integer programming model is applied to the Metro Transit bus system in the Minneapolis–St. Paul metropolitan area. The model is used to derive representative solutions on the efficient frontiers between operating costs and emissions, and to demonstrate how economic factors such as fuel cost and service level affect the trade-offs between costs and environmental outcomes. An analysis of fleet composition shows that vehicle assignments can significantly affect the cost and emission performance of the fleet. We then use the model to evaluate the actual bus assignment schedule used by Metro Transit, and provide suggestions on how to reduce operating costs and emissions. The model is useful in supporting strategic decisions such as vehicle replacement and purchase, as well as operational planning.

Modeling and Analysis of Bus Scheduling Systems of Public Bus Transport in Aqaba Special Economic Zone Authority

Aqaba Special Economic Zone Authority (ASEZA) City Bus Service is the only public enterprise that provides transport services in and around the city of Ababa. The city uses a fixed bus schedule system to serve passengers in 15 routes with buses (89) bus. However, this type of bus assignment system created a problem in the operational and financial performances. The objective of this paper is to develop an optimum bus assignment method using Linear Programming (LP). After thorough analysis of the existing bus scheduling system, the LP model is developed and used to determine the optimal number of buses for each route in four shifts. The output of the LP-model is then validated with the performances of the existing systems. The findings of the study show that There is a positive effect bus utilization on reduce cost in public transportation, there is a positive effect total number of trips made on reduce cost in public transportation, There is a positive effect total distance travelled on reduce cost in public transportation, There is a positive effect various operating costs on reduce cost in public transportation. The researcher recommended the (ASEZA) to adopt the new bus assignment system so that buses can be assigned based on the demand distribution of passengers for each route at a given shift.

Operating cost and quality of service optimization for multi-vehicle-type timetabling for urban bus systems

In this paper, we propose a timetable optimization method based on a Multiobjective Cellular genetic algorithm to tackle the multiple vehicle-type problems. The objective is to determine bus assignment in each time period to optimize a quality of service and transport operating cost. The quality of service, represented by the unsatisfied user demand, guarantees a good experience in terms of comfort, safety, availability, improving effects on how passengers perceive wait times. The operational cost contributes to reducing the traffic jams, the flux of unfilled vehicles and fuel consumption, helping to diminish the negative environmental impact. With the operation data of Los Angeles bus route 217 northbound, at peak and off-peak hours, we obtain a set of non-dominated solutions that represent different assignments of vehicles covering a given set of trips in a defined route. The experimental analysis based on several quality indicators, like Hypervolume, Spread, ε-Indicator, and Set Coverage, indicates that our algorithm is a competitive technique comparing with well-known techniques presented in the literature.

Study on Bus Assignment Algorithm for SOC Test

The main concern is over rising temperature during the testing of complex system-on-chip (SOC), this paper studies SOC wrapper and test access mechanism (TAM), and proposes an improved algorithm of TAM assignment under the constraints of temperature. The algorithm uses temperature superposition method and adds compression process. This algorithm can find the test structure that uses shorter test time.

Power-aware system-on-chip test scheduling using enhanced rectangle packing algorithm

The current semiconductor technology allows integration of all components onto a single chip called system-on-chip (SoC), which scales down the size of product and improves the performance. When a system becomes more complicated, testing process, such as test scheduling, becomes more challenging. Recently, peak power has also been considered as constraints in the test scheduling problem. Besides these constraints, some add-on techniques including pre-emption and non-consecutive test bus assignment have been introduced. The main contribution of each technique is the reduction of idling time in the test scheduling and thus reducing the total test time. This paper proposes a power-aware test scheduling called enhanced rectangle packing (ERP). In this technique, we formulate the test scheduling problem as the rectangle packing with horizontally and vertically split-able items (rectangles) which are smaller to fill up more compactly the test scheduling floor plan. Experimental results conducted on ITC’02 SoC benchmark circuits revealed positive improvement of the power-aware ERP algorithm in reducing total SoC test time.

A tabu search approach to an urban transport problem in northern Spain

In this work we analyze an urban transport problem that the City Council of Burgos, a city in northern Spain, has posed to the authors. Given a fleet of buses and drivers, the problem consists in designing routes and assigning buses to the routes such that the service level is optimized. The optimality of the service level is measured in terms of the waiting time at the bus stops and the duration of the trip. Thus, the problem comprises two decision levels (route design and bus assignment) and differs from other urban transport models found in the literature. In order to solve the problem, we propose two algorithms: one with a local search strategy and another with a tabu search strategy. In both cases, the solutions of the two decision levels are modified in alternating steps. The proposed algorithms obtained significantly better results than the tools currently applied by the transport authorities. In addition, the solutions obtained are very robust with respect to variations on demand, as shown by the experiments.

Test bus assignment, sizing, and partitioning for system-on-chip

The test access mechanism (TAM) is an important element of test architectures for embedded cores and is responsible for on-chip test pattern transport from the source to the core under test to the sink. Efficient TAM design is of critical importance in system-on-chip integration since it directly impacts testing time and hardware cost. In this paper, an efficient genetic algorithm for designing test access architectures while investigating test bus sizing and concurrently assigning cores to test buses is proposed. Experimental results are presented to demonstrate that the proposed TAM optimization methodology provides efficient test bus designs with minimum testing time while outperforming reported techniques.

Performance of a new bus assignment algorithm for an ATM switch fabric

The measurement of the quality of service in ATM* networks involves the activation of the ATM layer management OAM functions. Once an ATM connection is set up, in-service performance monitoring based on OAM cells can be used to measure and estimate the ATM layer QoS parameters. In-service measurement of ATM layer QoS parameters such as cell delay variation, cell transfer delay, cell loss ratio, etc., is necessary to verify on one hand, if the network is meeting the requested QoS and on the other hand, if the users are receiving their promised QoS. Congestion conditions in ATM switches may cause gradual deteriorations in the quality of virtual paths or virtual channel connections in an ATM network. QoS measurement using OAM cells can accurately measure the overall quality of monitored ATM layer QoS parameters in order to detect such deteriorations before the service quality has dropped bellow an acceptable level. Several factors such as network load, congestion, bottlenecks, and incremenTS in network load may affect the cell delay variation of video transmissions in an ATM network. In this work, several ATM layer QoS parameters have been measured on a VBR video source using OAM cells. The simulation resulTS obtained show that with low network loads, the contribution of each individual ATM switch to the local and to the end-to-end CDV is not significant. In the presence of a bottleneck switch, the CDV presented by this switch becomes the dominant one at both local and end-to-end sides. When the network load is between 0.5 and 0.6, small incremenTS in network load do not alter the buffer performance of the non-congested ATM switches, and low values of CDV can be obtained. In contrast, it was found that there is a critical load between 0.65 and 0.7 where small incremenTS in network load may force the CDV to grow abruptly.

Performance of a new bus assignment algorithm for an ATM switch fabric

This paper presents the results of the performance evaluation, through analytical and simulation models, of a High Speed Packet Switch with a New Bus Assignment Algorithm, designed and developed at the Research and Advanced Studies Center of National Polytechnic Institute in Guadalajara, México (CINVESTAV-GDL). The analytical model is tested under two different arrival processes: Binomial and Poisson distributions. The simulation model is tested with two bus assignment algorithms: Fixed Start and Rotated Start . The performance parameters considered are: Cell Loss Rate, Delay and Throughput.

A New Bus Assignment Algorithm for a Shared Bus Switch Fabric

An architecture for a Cell Switch Fabric (CSF) with a new bus assignment strategy is presented. The proposed architecture has a modular structure with a chip partitioning oriented to avoid the system from falling down totally, thus achieving expandability and increasing reusability. A discussion about different algorithms for the bus assignment is given. The shared bus is assigned in a cyclic and rotative way, switching microcells instead of cells. The CSF is built in four PCBs where every one has a capacity for four ports at 164.323 Mbps, the external port rate is 155.52 Mbps. A microcontroller realizes some tests and communicates with a PC, which runs a test, verification and CSF configuration program. Some parameters about the CSF behavior are measured too. Each Port was implemented on a CPLD FLEX10K100 and the Switch Control Block on a circuit MAX7128, both from Altera Company.

A comparative analysis of different arbitration protocols for multiple-bus multiprocessors

Earlier performance studies of multiple-bus multiprocessor systems assume a random selection of competing requests for bus assignment and ignore the effects of realistic bus arbitration schemes on the performance of such systems. In this paper, we present performance analysis of the multiple-bus systems with different arbitration protocols. The priority protocols considered are random selection, fixed priority, rotating priority, round-robin and FIFO. Analytical models are developed for each of these five different priority protocols. Each of our analyses models exactly the behavior of the corresponding priority protocol with little computation cost. The analytical models are validated through extensive simulations and are then used to carry out performance analysis and comparison of different priority protocols. Numerical results obtained from our models show that the round-robin protocol performs the best among the five protocols in the system with a few buses.

Implications of series-parallel sequencing rules

The need to describe systems composed of both parallel and sequential actions arises both in operating systems, where basically serial processes are organized in parallel, and in digital hardware description, where essentially parallel activities have a sequence imposed on them. The paper examines some of the properties of a specific mechanism, the series-parallel grammar, for specifying sequence information. The method is equivalent to that used for hardware description in the ISP notation of Bell and Newell [1] and to combinations of the Fork and Join primitives of Dennis and Van Horn [2]. The structure imposed by the seriesparallel constraint has useful implications for a design language translator in the areas of timing, bus assignment and conflict checking. The effects of structural constraints in design languages play a role similar to those in structured programming