Bipolar Transistor Power Research Articles

Hybrid 3.3 kV/450 A half‐bridge IGBT power module with SiC Schottky barrier diodes

This work presents a hybrid 3.3 kV/450 A insulated-gate bipolar transistor (IGBT) power module, utilising the half-bridge topology. In contrast to the traditional fashion, each IGBT chip in this module is allocated with two anti-parallel silicon carbide (SiC) Schottky barrier diodes (SBDs). Each SBD describes smaller footprint than the conventionally used silicone (Si) based fast recovery diode at this voltage and current level. By adopting smaller SiC SBDs in this hybrid-style packaging structure, the SBD chip yield can be greatly improved, without any additional fabrication cost. To benchmark the advantages of this hybrid power module over the Si-based counterpart, both power modules are designed, fabricated as well as tested statically and dynamically. It is shown that while both types show similar thermal behaviour, the hybrid power module describes much lower IGBT turn-on current overshooting, diode reverse recovery loss and IGBT turn-on loss. Based on the measured results, the power losses of both modules under a three-phase inverter operation condition are calculated, showing that the hybrid module has considerably lower power losses and junction temperature rise.

Localization and Detection of Bond Wire Faults in Multichip IGBT Power Modules

Multichip insulated gate bipolar transistor (mIGBT) power modules (PMs) degrade over power cycling. Bond wire lift-off is one of the major failure modes. This article presents a technique to diagnose bond wire lift-off by analyzing the on-state voltages across collector and emitter terminals and the voltages across collector and Kelvin emitter terminals. The proposed method can indicate the first lift-off out of 37 bond wires in a mIGBT. The main novelty of the proposed technique is that it can locate the chip that has bond wire lift-off(s). In addition, the temperature dependence of the proposed approach is negligible. The article describes the proposed technique in detail and shows results and discussions based on practical tests which are carried out on two mIGBT PMs with different packages.

Trap characteristics and its temperature-dependence of silicone gel for encapsulation in IGBT power modules

Silicone gel is a prevailing material for encapsulation in insulated gate bipolar transistor (IGBT) power modules. The space charge transport behavior in silicone gel is significant to evaluate the electrical insulation characteristics. This paper focuses on the trap characteristics and electrical properties of the silicone gel, which were rarely studied before. The experiments are performed on the surface potential decay of silicone gel after the charge injection. Then, the energy distributions of electron or hole traps are determined by a double-trap energy level model, which can be fitted by the Gaussian distribution. In addition, the mobilities of positive and negative charges are determined, which are 1.38 × 10 −12 m 2 ·V −1· s −1 and 1.74 × 10 −12 m 2 ·V −1 ·s −1 , respectively. Furthermore, considering the heat as a byproduct resulting in thermal issues, the temperature-dependence of surface potential decay characteristics are also studied in this paper. When temperature rises, the decay rate of surface potential increases, especially when the temperature is higher than 80 °C. Finally, the contrastive analysis illustrates that the trap characteristics of silicone gel are between the trap characteristics in liquid-state material and solid-state material, which supports the phenomenon that silicone gel is more resistive to the sharp edges in power modules. This work can provide a useful reference for the design of encapsulation in high-voltage IGBT power modules.

Thermal mapping at the cell level of chips in power modules through the silicone gel using thermoreflectance

Silicone gel is used in power electronics in order to provide a chemical protection and dielectric insulation in insulated gate bipolar transistor (IGBT) power modules. This gel prevents the direct mapping of surface temperature measurements of the component by classical infrared means. The temperature maps inside IGBT modules are usually performed after removal of the silicone gel which does not allow their operation in real environment. In this paper, we explore the ability of thermoreflectance to overcome this limitation in measuring the temperature surface of an IGBT chip through the silicone gel. Thermoreflectance is a non-contact technique, which measures temperature variation through reflectivity variation measurement. Using a “mean” calibration coefficient determinates from optical fiber thermal measurements, thermal images of IGBT modules with and without silicone gel can be compared. Preliminary results indicate that thermoreflectance enables the measurement of surface temperature change on high power IGBT modules with silicone gel and temperature distribution is affected by the presence of the gel.

Heat spreading path optimization of IGBT thermal network model

This paper presents a theoretical study on the thermal reliability of Insulated-gate bipolar transistor (IGBT) power modules. Although the Cauer thermal network (CTN) model is widely recognized as an essential tool to analyze the thermal performance of IGBT, the heat propagation path, however, deviates from the actual situation and causing an error calculation of junction temperature. Therefore, the thermal resistance (Rth) and thermal capacity (Cth) values are optimized by the heat spreading angle of each material layer, and the influence of baseplate heat dissipation effects is fully considered by adding the heat convection mechanism to the CTN model, which includes interaction between heat conduction and heat convection，thus achieving the integrity of the heat spreading path. Effectiveness of proposed model is validated by simulation studies of finite element analysis and Simulink, the junction temperature estimation results show that the proposed model is more accurate than the conventional CTN model especially in the good dissipation conditions. Thus, accurate thermal behavior estimation could be fairly interpreted by the optimized heat spreading path.

A broadband 23.1 ∼ 27.2 GHz doherty power amplifier with peak output power of 24.3 dBm

Purpose This paper aims to implement a new high output power fully integrated 23.1 to 27.2 GHz gallium arsenide heterojunction bipolar transistor power amplifier (PA) to meet the stringent linearity requirements of LTE systems. Design/methodology/approach The direct input power dividing technique is used on the chip. Broadband input and output matching techniques are used for broadband Doherty operation. Findings The PA achieves a small-signal gain of 22.8 dB at 25.1 GHz and a saturated output power of 24.3 dBm at 25.1 GHz with a maximum power added efficiency of 31.7%. The PA occupies 1.56 mm2 (including pads) and consumes a maximum current of 79.91 mA from a 9 V supply. Originality/value In this paper, the author proposed a novel direct input dividing technique with broadband matching circuits using a low Q output matching technique, and demonstrated a fully-integrated Doherty PA across frequencies of 23.1∼27.2 GHz for long term evolution-license auxiliary access (LTE-LAA) handset applications.

IGBT Power Stack Integrity Assessment Method for High-Power Magnet Supplies

This paper proposes a method for assessing the integrity of a series of insulated-gate bipolar transistor (IGBT) power stacks during factory-acceptance tests and service stops. The key challenge that is addressed in this paper is detecting common assembly issues that affect the power stack thermal path as well as distinguishing the acute aging effects of bond-wire lift-off and solder delamination. The method combines offline ${V_{\boldsymbol{ce}}}$ measurements with current in the extended Zero Temperature Coefficient (ZTC) operating region as well as with sensing current without modifications to the power stack. It also employs on-the-stack ${V_{\boldsymbol{ce}}} $ calibration for both the measurements. Additionally, only a fixed duty cycle pattern is needed to control the switches. The paper also presents a sensitivity analysis of the method to various parameters such as the current level in the extended ZTC operating region, the precision of the ${V_{\boldsymbol{ce}}}$ measurement, as well as the ambient, the cooling-water, and the junction temperatures. The experimental results are obtained from a high-current IGBT power stack used in a magnet power supply for particle accelerators and are compared favorably to results from finite element method and lumped parameter network simulations confirming the applicability of the method.

Sensor for Accumulated Charge Detection in Packaged Insulation Layer of Insulated Gate Bipolar Transistor Power Devices

Sensor for Accumulated Charge Detection in Packaged Insulation Layer of Insulated Gate Bipolar Transistor Power Devices

Methodology for Active Thermal Cycle Reduction of Power Electronic Modules

This paper proposes a methodology for active thermal control of power electronic modules in ac applications, which includes a loss manipulation unit, a thermal observer structure, and an active thermal cycle reduction algorithm. It aims to reduce the thermo-mechanical strain in the inter-connects of the module in order to enhance its reliability and lifetime. The loss manipulation unit operates in a minimally invasive manner by manipulating adaptive gate resistances and the pulsewidth modulation frequency. This allows the individual thermal control of multiple devices within a power module, which has not been achieved in prior work. A thermal observer structure that estimates averaged junction temperatures by combination of a thermal model and sensor information is introduced. The observer technology makes this paper the first to realize closed-loop control of averaged temperatures achieving an increased robustness and insensitivity to modeling errors. A key element of the active thermal cycle reduction algorithm is the virtual heat sink that derives feasible and stress-relieving thermal trajectories. The trajectories are applied with a unique thermal feedback control that smoothly manipulates the averaged junction temperature of the power module even in the presence of loss manipulation limits. The active thermal control methodology is evaluated experimentally with a state-of-the-art insulated-gate bipolar transistor (IGBT) power module.

Stress-Based Model for Lifetime Estimation of Bond Wire Contacts Using Power Cycling Tests and Finite-Element Modeling

In this paper, a lifetime model for bond wire contacts of insulated gate bipolar transistors (IGBT) power modules is reported. This model is based on power cycling tests obtained under accelerated conditions, and a finite-element model taking into account the electrical, thermal, and mechanical coupling. It allows us to estimate the bond wire lifetime for a large scale of junction temperature swing amplitudes (ΔT <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</sub> ) and stress durations (t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> ). To build it, a numerical design of experiment was performed in both high and low stress values (ΔT <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</sub> ). Then, a strain-life curve has been constructed where the average strain values on a defined volume around the contact areas between top-metallization and the most exposed bond wires to fatigue and liftoff have been used. As a result, it has been shown that the total strain is linearly dependent with ΔT <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">j</sub> and power law dependent with t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> . The combination of the strain-life relation and the strain dependency with stress parameters leads to the lifetime relationship. The obtained lifetime model has been satisfactorily validated with some additional experimental points obtained from literature and with a large range of values for t <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</sub> . This methodology can be easily replicated to other structures and is quite generic.

Real-Time Neural Inverse Optimal Control for a Wind Generator

This paper presents a discrete-time inverse optimal control scheme using a neural network for a doubly fed induction generator (DFIG). The DFIG generation scheme has a voltage-source converter connected between the rotor and the electrical grid, which is composed by two insulated-gate bipolar transistors (IGBT) power converters connected in back-to-back configuration. These converters are known as rotor side converter (RSC) and grid side converter (GSC), respectively. The RSC is used to control the electric torque and reactive power of the DFIG, and the GSC is used to control the dc-link voltage in the IGBT connection and the stator terminals reactive power. To take into account possible parameter variations, a recurrent high order neural network (RHONN) is used to approximate the DFIG model in an identification process; after that, based on the neural model obtained, a discrete-time inverse optimal control scheme for the RSC is developed. Using a similar approach, a dc-link neural identifier and a controller are proposed for the GSC. The proposed control scheme applicability is validated by means simulations, which includes a comparison with proportional-integral controllers; then, this control scheme is implemented in real time. The paper novelty consists on the synthesis and real-time implementation of a DFIG inverse optimal control based on a RHONN.

Monolithic Integration of SiC Power BJT and Small-Signal BJTs for Power ICs

Monolithic integration of power transistor and specific functional integrated circuits (power ICs) offers unique advantages for wide bandgap power devices. However, few publications have reported the power ICs based on SiC because of several challenging problems such as fabrication process and cost. This paper explores the monolithic integration possibility of 4H-SiC lateral small-signal bipolar junction transistors (BJTs) and vertical power BJT without extra mask or processing step other than Vanadium isolation implantation. A new monolithic power integration architecture is proposed and optimized using TCAD simulations first, and then both the vertical and lateral SiC BJT types are fabricated on the same wafer using the standard power BJT process to experimentally verify the feasibility of the monolithic integration method. The SiC power BJT demonstrates a breakdown voltage of 1320 V and a peak common-emitter current gain of 13.1 while the lateral SiC BJT demonstrated a breakdown voltage of 25 V and a peak common-emitter current gain of 3.8 at room temperature. While the device performance can be further improved, the fact that they can be successfully fabricated on the same wafer without much process modification shows a great promise of realizing monolithic SiC power ICs, which will greatly benefit the next-generation power electronics systems.

The Optimal Design of Field Ring for Reliability and Realization of 3.3 kV Insulated-Gate Bipolar Transistor Power Semiconductor

This research was about field ring for 3.3 kV planar gate power IGBT. Therefore, we designed optimal field ring for 3.3 kV power IGBT and we analyzed the electrical characteristics of 3.3 kV planar gate power IGBT according to parameters of field ring. Based on this background, we obtained 3.3 kV high breakdown voltage and 2.9 V on state voltage drop for 3.3 kV planar gate power IGBT. To obtain high breakdown voltage, we confirm that the counts of field ring were 23. And we obtained optimal parameters. The gap distance between field rings to field ring was 13 μm and the width of field ring was 5 μm. This design technology will be adapt field stop IGBT and super junction IGBT. Thyristor device for power conversion switch will be replaced to super high voltage power IGBT.

Optimal scale Gaussian process regression model in Insulated Gate Bipolar Transistor remaining life prediction

The new energy industry has received extensive attention. The Insulated Gate Bipolar Transistor power module is the core device for new energy equipment, and accurately predicting its remaining useful life (RUL) is conducive to its timely maintenance and replacement, promoting the sustainable development of the society. When the power module fails, its collector–emitter saturation voltage drop (Vce) significantly increases. This feature is used to determine RUL of the power module. However, the time series have obvious random non-stationary features. Current methods are ineffective to such features. Therefore, the optimal scale Gaussian process (OSGP) model is proposed. The optimal parameters in the model are determined by Ant Lion Optimizer. The variable-scale function of OSGP model makes it able to handle the randomness and non-stationarity in time series. The results show that OSGP prediction accuracy is higher than that of support vector machine, BP neural network, Gaussian process and Gaussian process mixture. The proposed model has higher prediction accuracy and can adapt to less training samples.

Performance comparison of Si IGBT and SiC MOSFET power devices based LCL three‐phase inverter with double closed‐loop control

Grid-connected inverters are essential equipment for DC-AC energy conversion between renewable energy generation and power grids, and their performance directly affects the stability of the operation of the power grid. Compared to the traditional L or LC filter, LCL filter is widely used in the grid-connected inverter due to its harmonic attenuation performance and system stability. Because of the requirements for higher switching frequency to increase the power density and reduce the cost of the inverter. Compared to the traditional silicon (Si) insulated gate bipolar transistor (IGBT) power device, the silicon carbide (SiC) metal-oxide-semiconductor field-effect transistor (MOSFET) has shown apparent advantages in high-power density inverters with a high switching frequency. This study first analyses and compares the suppression effects of passive damping methods on the resonance peak of the LCL filter; then, a double-current closed-loop control strategy as the active damping control is applied in the LCL filter three-phase grid-connected inverter; finally, the experimental platforms of IGBT inverter and SiC MOSFET inverter are built, and the filtering performances of the two inverters are compared. The experimental results show that the double-closed-loop control method significantly reduces the system harmonics and confirms the feasibility of the control strategy.

Сравнительный анализ стандартного и модуляционного методов измерения теплового сопротивления мощных биполярных транзисторов.

Сравнительный анализ стандартного и модуляционного методов измерения теплового сопротивления мощных биполярных транзисторов.

A novel high-altitude electromagnetic pulse (HEMP) protection circuit for RF applications

A High-Altitude Electromagnetic Pulse (HEMP) protection circuit with ultra-low loading capacitance for RF applications that does not degrade RF circuit performances is proposed. Principle of operation, loading capacitance, leakage current, EMP clamping characteristics and robustness over transient over-voltage pulse will be presented. As a case study, a 5.8 GHz WLAN InGaP/GaAs hetero-junction bipolar transistor (HBT) power amplifier with this compact EMP protection circuit is demonstrated. The test result shows that the EMP protection circuit can provide 18 kV contact discharge per IEC 61000−4−2 standard without degradation in PA performances.

Evolution of Gate Drivers-Part 1 [White Hot

When I graduated in 1980, I started in the small systems power supply group at the Digital Equipment Corporation (DEC). My first assignment was to design a 208 W three output power supply for DEC’s first desktop computer. The topology was a two-transistor forward converter that used bipolar switching transistors (BUW45s, if I recall correctly). The bipolar power transistors of that time were rugged devices but had a fairly low current gain (beta) of 4–10. This meant that if you were switching 5 A, one had to supply about 1 A in base current. One popular way of doing that was a proportional base drive. A proportional base drive used a current transformer to couple a fixed fraction of the emitter current to the base. In my design, the base drive transformer had one turn in the emitter and four turns driving the base of each BUW45. This drove the transistors with a forced beta of 4. The BUW45s has a typical current gain of 5–10, so this assured that the BUW45s would always be saturated during the on-time.

A 128-Pixel System-on-a-Chip for Real-Time Super-Resolution Terahertz Near-Field Imaging

This paper presents a fully integrated system-on-a-chip for real-time terahertz super-resolution near-field imaging. The chip consists of 128 sensing pixels with individual cross-bridged double 3-D split-ring resonators arranged in a 3.2 mm long $2\times 64$ 1-D array. It is implemented in 0.13- $\mu \text{m}$ SiGe bipolar complementary metal–oxide–semiconductor technology and operated at around 550 GHz. All the functions, including sensor illumination, near-field sensing, and detection, are co-integrated with a readout integrated circuit for real-time image acquisition. The pixels exhibit a permittivity-based imaging contrast with a worst case estimated relative permittivity uncertainty of 0.33 and 10–12- $\mu \text{m}$ spatial resolution. The sensor illumination is provided with on-chip oscillators feeding four-way equal power divider networks to enable an effective pixel pitch of 25 $\mu \text{m}$ and a dense fill factor of 48% for the 1-D sensing area. The oscillators are equipped with electronic chopping to avoid $1/f$ -noise-related desensitization for the SiGe-heterojunction bipolar transistor power detectors integrated at each pixel. The chip features both an analog readout mode and a lock-in-amplifier-based digital readout mode. In the analog readout mode, the measured dynamic range (DR) is 63.8 dB for a 1-ms integration time at an external lock-in amplifier. The digital readout mode achieves a DR of 38.5 dB at 28 f/s. The chip consumes 37–104 mW of power and is packaged into a compact imaging module. This paper further demonstrates real-time acquisition of 2-D terahertz super-resolution images of a nickel mesh with 50- $\mu \text{m}$ feature size, as well as a biometric human fingerprint.

New Energy Empowerment Using Kernel Principal Component Analysis in Insulated Gate Bipolar Transistors Module Monitoring

At present, energy exhausted and environmental pollution are important issues, vigorously promoting new energy and improving the utilization efficiency and management level of new energy is an important way to achieve sustainable social development. Insulated gate bipolar transistors are important components in power converters and are widely used in new energy generation, new energy vehicles, high-speed rail and industrial production. However, the power module’s age is related to all aspects of its performance change, precluding the use of a single parameter to fully and accurately express the aging state. To monitor this state and evaluate the aging state, this study presents a method to analyze and process the state data of Insulated gate bipolar transistors power module aging tests using kernel principal component analysis and establishes a multi-dimensional grey model to evaluate the power module aging state. Using the temperature cycle aging test platform, the 7000 temperature cycling tests are implemented to accelerate the age of the power module to failure, the dynamic parameters of the power modules are measured after every 1000 cycles. During the accelerated aging process, the case temperature change rate, collector-emitter voltage drop Vce(SAT) and Miller platform of the gate signal of Vge are found to exhibit different variation trends at different aging stages. The result showed that multiple parameters are combined into integrated attributes to enable more accurate implementation of the state monitoring of power modules using the proposed method, which improves the status monitoring level of Insulated gate bipolar transistors modules. The proposed method is beneficial to improve the utilization efficiency and new energy source management level.