In this paper, a new type of fault current limiter (FCL) called impedance-based fault current limiter (IBFCL) is proposed. The structure has the capability to limit the fault current to an extent predefined value by means of the system impedance. The control circuit uses voltage and current data to calculate the impedance value. In order to limit the fault current, several eliminating resistors, which are in parallel with auxiliary switches, are bypassed by a main semiconductor switch. In addition, the proposed FCL has a fast response time with good current-limiting characteristic. The analysis of normal and fault conditions of the IBFCL circuit using power system computer-aided design/electromagnetic transients, including dc (PSCAD/EMTDC) software have been presented. Moreover, an experimental prototype is provided to validate simulation results and the feasibility of structure to be implemented in power systems.