Arbitrary Memory Research Articles

An 8 ns 4 Mb serial access memory

A new architecture for serial access memory is described that enables a static random access memory (SRAM) to operate in a serial access mode. The design target is to access all memory address serially from any starting address with an access time of less than 10 ns. This can be done by all initializing procedure and three new circuit techniques. The initializing procedure is introduced to start the serial operation at an arbitrary memory address. Three circuit techniques eliminate extra delay time caused by an internal addressing of column lines, sense amplifiers, word lines, and memory cell blocks. This architecture was successfully implemented in a 4-Mb CMOS SRAM using a 0.6 mu m CMOS process technology. The measured serial access time was 8 ns at a single power supply voltage of 3.3 V. >

VARIATIONAL TRANSITION STATE THEORY FOR ACTIVATED RATE PROCESSES IN DISSIPATIVE SYSTEMS

Variational upper bounds are derived for the spatial and energy diffusion limited escape rate of a particle trapped in a metastable well and interacting with a dissipative medium. The theory is well defined for arbitrary memory friction and accounts explicitly for the nonlinearity of the potential governing the motion of the escaping particle.

A time-saving algorithm for generalized Langevin-dynamics simulations with arbitrary memory kernels

A new algorithm for generalized Langevin-dynamics (GLD) simulations is presented. It is third-order (inclusive) in positions and requires the realization of only one stochastic trajectory. An approximate and very time-saving method is given to generate such trajectories in steps while still closely reproducing the original memory function. The algorithm, in conjunction with a rational evaluation of the friction force, is tested by simulating one krypton atom in dense liquid krypton in which the velocity autocorrelation function is non-trivial and exhibits a pronounced back-scattering minimum. The velocity autocorrelation function is at all times well reproduced and the algorithm is 10–20 times faster than other GLD algorithms.

Theory of activated rate processes for arbitrary frequency dependent friction: Solution of the turnover problem

An analytical theory is formulated for the thermal (classical mechanical) rate of escape from a metastable state coupled to a dissipative thermal environment. The working expressions are given solely in terms of the quantities entering the generalized Langevin equation for the particle dynamics. The theory covers the whole range of damping strength and is applicable to an arbitrary memory friction. This solves what is commonly known as the Kramers turnover problem. The basic idea underlying the approach is the observation that the escape dynamics is governed by the unstable normal mode coordinate—and not the particle system coordinate. An application to the case of a particle moving in a piecewise harmonic potential with an exponentially decaying memory-friction is presented. The comparison with the numerical simulation data of Straub, Borkovec, and Berne [J. Chem. Phys. 84, 1788 (1986)] exhibits good agreement between theory and simulation.

A memory controller executing segment operations in time 0(1)

A memory controller unit is presented for segmentation of page structured memories. it is intended for the BARDE dataflow processor. Suitably programmed controllers used in parallel can handle arbitrary memory sizes. Segment allocation, release, and access (i.e. translation of a segment relative page addresses into a physical page address) are carried out in at most one add cycle. The allocation method described avoids storage fragmentation and garbage collection by numbering allocated and free pages. A memory controller consists of one page controller for each memory page. The translation from virtual into physical addresses is done by associative search Rmong all page controllers.

A memory controller executing segment operations in time 0(1)

A memory controller unit is presented for segmentation of page structured memories. It is intended for the BARDE dataflow processor. Suitably programmed controllers used in parallel can handle arbitrary memory sizes. Segment allocation, release, and access (i.e. translation of a segment relative page addresses into a physical page address) are carried out in at most one add cycle. The allocation method described avoids storage fragmentation and garbage collection by numbering allocated and free pages. A memory controller consists of one page controller for each memory page. The translation from virtual into physical addresses is done by associative search amoag all page controllers.

Point representation and hashing of an interval

A system managing memory from a set of non-overlapping address intervals or pools must be able to take an arbitrary memory address and identify its parent pool. To make the lookup operation efficient, we would like to use some hashing scheme. In this paper, we introduce the notion of mapping address intervals to representative points. Each pool or interval can be mapped into a point x; we show that under a similar mapping function, any address from that interval has a value x or x+1. Given this important property, we can use any reasonable hashing technique to do efficient address lookup.

Communication performance in multiple-bus systems

A simple queueing model is presented for studying the effect of multiple-bus interconnection networks on the performance of asynchronous multiprocessor systems. The proposed model is suitable for systems in which each processor has a local memory and is thus able to continue processing while waiting for a response from the global memory. An approximate, closed-form solution is given that is simple and easy to use for any number of processors, buses, or memory modules and for arbitrary memory block size. The model is used to study the access time of the global memory as a function of the number of buses for different local-memory/global-memory traffic rates.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Equilibrium point analysis of memory interference in multiprocessor systems

An approximate analytic tool called equilibrium point analysis is applied to the problem of memory interference in multiprocessor systems. It is a simple and powerful analytic tool based on the fluid approximation and has been widely used for packet broadcast systems. It is shown that quite general multiprocessor systems can be studied quite simply with this technique, these systems include those made up of many classes of processors and memory modules with arbitrary static memory reference patterns, and systems with bus connections between processors and memories. In most cases, the approximation is shown to be sufficiently good. One of the advantages of this technique is that the error is smaller for larger systems for which no appropriate analytic tools have existed until now.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Locally connected VLSI architectures for the Viterbi algorithm

The Viterbi algorithm is a well-established technique for channel and source decoding in high-performance digital communication systems. Implementations of the Viterbi algorithm on three types of locally connected processor arrays are described. The restriction is motivated by the fact that both the cost and performance metrics of VLSI favour architectures in which on-chip interprocessor communication is localized. Each of the structures presented can accommodate arbitrary alphabet sizes and algorithm memory lengths. >

Equilibrium point analysis of memory interference in multiprocessor systems

AbstractAn approximate analytic tool called equilibrium point analysis is applied to the problem of memory interference in multiprocessor systems. This is a simple and powerful analytic tool based on the fluid approximation. It has been used widely in packet broadcast systems. It is shown that quite general multiprocessor systems can be studied by this technique with amazing simplicity. For example, systems made up of many classes of processors and memory modules with arbitrary static memory reference patterns and systems with dynamic memory reference patterns are considered. In most cases, the approximation of the analysis is shown to be sufficiently good. One of the advantages of this technique is that the error is smaller for larger systems for which there have been no appropriate analytic tools thus far.

Path integration of a general two-time quadratic action by prodistribution approach.

The theory of prodistributions is applied to path integrate a general two-time quadratic action characterizing memory effects. The resulting Feynman propagator is exact and is in the form of an exponential integral over a single variable. A case where the integral is explicitly evaluated, for an arbitrary memory kernel, is presented to highlight the closed analytical structure of the propagator obtained. All special cases treated in the literature follow from this general expression.

Methods of investigation numerical simulation of the relaxation of a macromolecular ensemble in a viscoelastic medium

A numerical dynamic model is examined of the ensemble of polymer molecules in a viscoelastic medium. The molecules are chains of spherical elements joined by elastic forces. The motion of elements is described by the generalized Langevin equation which allows for the frictional force against the medium with a delay determined by the nucleus of friction and the Gaussian random force with correlation properties satisfying the fluctuation-dissipation theorem. Numerical methods are proposed for solving the generalized Langevin equation with an arbitrary memory function. Results are given of numerical experiments of simulating the dynamics of the ensemble of 10 3 molecules, consisting of two, three and nine elements. In the simplest case of unidimensional motion of the chain formed of two elements joined by elastic force, in viscoelastic medium, results of numerical calculation agree with analytical control solutions of the problem.

Generalized Langevin dynamics simulations with arbitrary time-dependent memory kernels

An algorithm is described that allows dynamical simulations to be performed based on generalized Langevin equations with arbitrary, time-dependent memory kernels. Test simulations show that good results are obtained for kernels with distinctly different forms (e.g., exponential and Gaussian).

Low cost-trace facility for development systems

A technique whereby a microprocessor (MPU) may be single-stepped through a defined region of program is discussed. Facilities provided as an aid to debugging include a printout of the contents of the MPU's internal registers after each step, and the examination and changing of arbitrary memory locations at any time. Both hardware and software aspects of this provision are described for 6800-based systems running under the supervision of the MINIBUG or MIKBUG monitors, at minimal cost. The software is easily alterable to support any monitor capable of communication with a printer or VDU.

Predicting the availability of contiguous memory

In a memory allocation algorithm with variable-size segments, checkerboarding (external fragmentation) distributes the unused memory space into a number of relatively small fragments, so that the largest fragment is considerably smaller than the total. For some computer architectures, garbage collection is impossible or unfeasible at an arbitrary memory allocation decision. Hence it is necessary to consider the individual sizes of fragments (and, in particular, the largest one) rather than the sum total available. A simulation model is used to develop empirical probability distributions for the size of the largest fragment of available memory at a given instant, conditional only on the number of allocated blocks. A predictor developed from such distributions is presented, and example distributions for a job scheduling system are presented and discussed.

MOPS, a magneto-optic-photoconductor sandwich for optical information storage

A magneto-optic photoconductor sandwich, called MOPS, has been assessed as a memory medium for optical information storage. The present version of MOPS is composed of an epitaxial (Gd,Bi)3 (Fe,Ga)5O12 film and a Cu-doped CdS photoconductor film between coplanar In2O3/SnO2 electrodes. The chip contains 1.4×105 bits, requires 1 μW of optical power at 6328 Å for switching a memory cell in a magnetic field of 100 Oe and electric field of 1.2×104 V/cm, exhibits a read-out contrast of 21 : 1 at a read-out efficiency of 0.1%, and has a cycle time of ∼100 μs. MOPS has not been degraded by 107 switching cycles of arbitrary memory cells. No cross talk between neighboring bit sites has been observed.

Conditionally majorant local algorithms with an arbitrary memory for problems of the synthesis of minimal coverings

Conditionally majorant local algorithms with an arbitrary memory for problems of the synthesis of minimal coverings

Streamflow Simulation: 1. A new look at Markovian Models, fractional Gaussian noise, and Crossing Theory

A broken line process is presented as a potential hydrologic simulation model. The process is composed of the sum across a series of broken lines. By proper choice of the number of broken lines considered and of their parameters, various statistical characteristics may be modeled. These include an arbitrary monotonic correlation structure and memory. In addition, the second derivative of the correlation function at the origin may be preserved. This preservation of the second derivative is an important property in crossing theory.

Stability Equation for Viscoelastic Liquids of Arbitrary Memory

A stability equation valid for liquids described by a general linear hereditary constitutive equation is derived by superposing an infinitesimal two-dimensional periodic disturbance on the primary flow. In the case of liquids having short memories this equation reduces to the one given by Walters.