Approximate Cycle Extrinsic Message Degree Research Articles

Lifting method for quasi-cyclic low-density parity-check codes based on approximated cycle extrinsic message degree in optical communication systems

Quasi-cyclic low-density parity-check (QC-LDPC) codes with low-complexity hardware implementation and excellent performance have become a hot research topic in many optical communication systems. To meet the different requirements of code lengths in optical communication systems, lifting methods which remove all the short cycles equally are usually used to construct long QC-LDPC codes of larger lengths by lifting short QC-LDPC codes. A lifting method is proposed, which considers both length and connectivity of short cycles. The proposed lifting method reduces the complexity of calculating the approximated cycle extrinsic message degree -related metrics and improves connectivity of the Tanner graph. The numerical results prove that, by employing our proposed lifting method, the lifted long QC-LDPC codes have better bit error rate performance compared with the lifted codes employing the traditional lifting method.

Optimization of QC-LDPC Codes by Edge Exchange Method Based on ACE

Long quasi-cyclic low-density parity check (QC-LDPC) codes have been chosen as one of the forward error correction (FEC) schemes in passive optical network (PON) systems benefiting from the excellent performance. About how to get the appropriate LDPC codes, some traditional methods which focus on obtaining large girth or flat approximated cycle extrinsic message degree (ACE) spectrums are proposed for the design of LDPC codes. These methods which may still make the existence of small stopping sets containing short cycles probably are not so useful for long QC-LDPC codes. Recently, the parallel vector message passing (PMP) algorithm oriented-to decreasing the number of short cycles is proved to be an effective method to optimize LDPC codes. Since ignoring short cycles with poor connectivity which can induce error floor, this method cannot guarantee its effectiveness for long QC-LDPC codes. In this letter, an edge exchange optimization method based on the global properties of ACE and girth called EEA method is proposed, which tries to reduce cycles with low ACE in the order of cycle length. The numerical results prove that our EEA method can bring the improvements of error floor up to two orders of magnitude to long QC-LDPC codes and obviously outperforms PMP algorithm.

A New Multi-Edge Metric-Constrained PEG Algorithm for Designing Binary LDPC Code With Improved Cycle-Structure

To obtain a better cycle-structure is still a challenge for the low-density parity-check (LDPC) code design. This paper formulates two metrics firstly so that the progressive edge-growth (PEG) algorithm and the approximate cycle extrinsic message degree (ACE) constrained PEG algorithm are unified into one integrated algorithm, called the metric-constrained PEG algorithm (M-PEGA). Then, as an improvement for the M-PEGA, the multi-edge metric-constrained PEG algorithm (MM-PEGA) is proposed based on two new concepts, the multi-edge local girth and the edge-trials. The MM-PEGA with the edge-trials, say a positive integer $r$, is called the $r$-edge M-PEGA, which constructs each edge of the non-quasi-cyclic (non-QC) LDPC code graph through selecting a check node whose $r$-edge local girth is optimal. In addition, to design the QC-LDPC codes with any predefined valid design parameters, as well as to detect and even to avoid generating the undetectable cycles in the QC-LDPC codes designed by the QC-PEG algorithm, the multi-edge metric constrained QC-PEG algorithm (MM-QC-PEGA) is proposed lastly. It is verified by the simulation results that increasing the edge-trials of the MM-PEGA/MM-QC-PEGA is expected to have a positive effect on the cycle-structures and the error performances of the LDPC codes designed by the MM-PEGA/MM-QC-PEGA.

Optimized Construction of Protograph G-LDPC Codes by Modified EXIT Chart and MACE for New-Generation Wireless Communications

In this paper, a new systematic construction of optimized protograph generalized low-density parity-check codes with good decoding threshold and low error floor is proposed. First, a typical code graph is generated by combining an accumulate-repeat-accumulate seed protograph with a Tanner graph extension of a simple linear block node. Subsequently, it is analyzed and optimized theoretically, especially with the puncture mechanism, by a modified extrinsic information transfer chart and an asymptotic weight distribution. The generated graph is then extended to a base matrix by a copy-and-permute procedure, accompanied with the matrix split, which is optimized by a progressive edge growth for good randomness and girth property. Finally, the proposed code matrix is created by replacing “1” in the above base matrix with square circulant sub-matrices, the offsets of which are searched by a quasi-cyclic (QC)-oriented modified approximate cycle extrinsic message degree algorithm to improve the cycle relationship, especially for the compound cycles. Simulation results show that the codes exhibit excellent performance in both error floor and waterfall region on an additive white Gaussian noise channel. Moreover, they are also characterized by faster encoding due to the QC structure as well as lower decoding complexity and less latency, which make them a natural fit for new-generation power constrained wireless communications.

Protograph-Based Raptor-Like LDPC Codes

This paper proposes protograph-based Raptor-like (PBRL) codes as a class of rate-compatible low-density parity-check codes for binary-input AWGN channels. As with the Raptor codes, exclusive-OR operations on precoded bits produce additional parity bits providing extensive rate compatibility. Unlike Raptor codes, each additional parity bit in the protograph is explicitly designed to optimize the density evolution threshold. During the lifting process, approximate cycle extrinsic message degree (ACE) and circulant progressive edge growth (CPEG) constraints are used to avoid undesirable graphical structures. Some density-evolution performance is sacrificed to obtain lower error floors, particularly at short block-lengths. Simulation results are shown for information block sizes of k = 1032 and 16 384. For a target frame error rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-5</sup> , at each rate, the k = 1032 and 16 384 code families perform within 1 dB and 0.4 dB of both the Gallager bound and the normal approximation, respectively. The 16 384 code family outperforms the best known standardized code family, namely, the AR4JA codes. The PBRL codes also outperform DVB-S2 codes that have the advantages of longer blocklengths and outer BCH codes. Performance is similar to RC code families designed by Nguyen et al. that do not constrain codes to have the PBRL structure and involve simulation in the optimization process at each rate.

블록 저밀도 패리티 검사 부호 설계를 위한 테너 그래프 기반의 저복잡도 순환 주기 탐색 알고리즘

본 논문은 블록 LDPC(low density parity check) 부호 설계를 위한 순환 천이 값(shift index)을 탐색하는 효율적인 알고리즘을 제안한다. 여기에는 메시지-패싱(message-passing) 기반의 순환 주기(cycle) 탐색 알고리즘과 ACE(approximate cycle extrinsic message degree) 알고리즘이 결합되어 있다. LDPC 부호 성능에 영향을 미치는 요인들에 우선순위를 두어 효율적으로 순환 천이 값을 찾을 수 있도록 했다. 이 알고리즘을 통해 기존의 탐색 알고리즘 보다 훨씬 낮은 복잡도로 행렬 저장 공간을 절약하면서 좋은 성능의 패리티 검사 행렬(parity check matrix)을 만들 수 있다. In this paper, we propose a efficient shift index searching algorithm for design of the block LDPC codes. It is combined with the message-passing based cycle search algorithm and ACE algorithm. We can determine the shift indices by ordering of priority factors which are effect on the LDPC code performance. Using this algorithm, we can construct the LDPC codes with low complexity compare to trellis-based search algorithm and save the memory for storing the parity check matrix.

A Novel Construction Method of QC-LDPC Codes Based on Generalized ACE Constrained

Recently, structured LDPC codes have been focused on due to excellent performance and lower complexity. An improved construction of QC-LDPC based on a modified PEG algorithm is proposed in this paper. The modified Progressive Edge-Growth algorithm is a PEG algorithm with Approximated Cycle Extrinsic Message Degree (ACE) metric, which is used to describe the connectivity of cycles. The approach can maximize the girth of the cycles, improve the connectivity of cycles and have the advantages of QC algorithms. The simulation results demonstrate that the PEG algorithm based on ACE has lower Bit Error Rate (BER) and Frame Error Rate (FER) than the original PEG algorithm at the low Signal Noise Ratio (SNR) values, and has a relatively lower computational complexity.

A Rate-Compatible Puncturing Scheme for Finite-Length LDPC Codes

In this paper, we propose a rate-compatible puncturing scheme for finite-length low-density parity-check (LDPC) codes over the additive white Gaussian noise (AWGN) channel. The proposed method is applicable to any LDPC mother code, both regular and irregular, and constructs punctured codes which perform well in both the waterfall and the error floor regions for a wide range of code rates. The scheme selects code bits to be punctured one at a time and based on a sequence of criteria. An important selection criterion is the number of short cycles with low approximate cycle extrinsic message degree (ACE) in which a candidate bit node participates. Simulation results demonstrate that the ACE measure, which is most often the determining criterion in the final selection of the puncturing candidates, plays an important role in improving the performance of the codes in both the waterfall and the error-floor regions. These results also demonstrate that the proposed scheme is superior to the existing puncturing methods, particularly when a wide range of code rates is desirable.

Efficient Algorithm for Finding Dominant Trapping Sets of LDPC Codes

This paper presents an efficient algorithm for finding the dominant trapping sets of a low-density parity-check (LDPC) code. The algorithm can be used to estimate the error floor of LDPC codes or as a tool to design LDPC codes with low error floors. For regular codes, the algorithm is initiated with a set of short cycles as the input. For irregular codes, in addition to short cycles, variable nodes with low degree and cycles with low approximate cycle extrinsic message degree (ACE) are also used as the initial inputs. The initial inputs are then expanded recursively to dominant trapping sets of increasing size. At the core of the algorithm lies the analysis of the graphical structure of dominant trapping sets and the relationship of such structures to short cycles, low-degree variable nodes, and cycles with low ACE. The algorithm is universal in the sense that it can be used for an arbitrary graph and that it can be tailored to find a variety of graphical objects, such as absorbing sets and Zyablov-Pinsker trapping sets, known to dominate the performance of LDPC codes in the error floor region over different channels and for different iterative decoding algorithms. Simulation results on several LDPC codes demonstrate the accuracy and efficiency of the proposed algorithm. In particular, the algorithm is significantly faster than the existing search algorithms for dominant trapping sets.

Iterative Construction of Regular LDPC Codes from Independent Tree-Based Minimum Distance Bounds

An independent tree-based method for lower bounding the minimum distance of low-density parity-check (LDPC) codes is presented. This lower-bound is then used as the decision criterion during the iterative construction of regular LDPC codes. The new construction algorithm results in LDPC codes with greater girth and improved minimum-distance bounds when compared to regular LDPC codes constructed using the progressive edge-growth (PEG) construction and the approximate cycle extrinsic message degree (ACE)-constrained PEG construction. Simulation results of codes constructed with the new method show improved performance on the additive white Gaussian noise channel at moderate signal-to-noise ratios.

Design of Finite-Length Irregular Protograph Codes with Low Error Floors over the Binary-Input AWGN Channel Using Cyclic Liftings

We propose a technique to design finite-length irregular low-density parity-check (LDPC) codes over the binary-input additive white Gaussian noise (AWGN) channel with good performance in both the waterfall and the error floor region. The design process starts from a protograph which embodies a desirable degree distribution. This protograph is then lifted cyclically to a certain block length of interest. The lift is designed carefully to satisfy a certain approximate cycle extrinsic message degree (ACE) spectrum. The target ACE spectrum is one with extremal properties, implying a good error floor performance for the designed code. The proposed construction results in quasi-cyclic codes which are attractive in practice due to simple encoder and decoder implementation. Simulation results are provided to demonstrate the effectiveness of the proposed construction in comparison with similar existing constructions.

Transactions papers evaluation and design of irregular LDPC codes using ACE spectrum

The construction of finite-length irregular LDPC codes with low error floors is currently an attractive research problem. In particular, for the binary erasure channel (BEC), the problem is to find the elements of selected irregular LDPC code ensembles with the size of their minimum stopping set being maximized. Due to the lack of analytical solutions to this problem, a simple but powerful heuristic design algorithm, the approximate cycle extrinsic message degree (ACE) constrained design algorithm, has recently been proposed. Building upon the ACE metric associated with a cycle in a code graph, we introduce the ACE spectrum of LDPC codes as a useful tool for evaluation of codes from selected irregular LDPC code ensembles. Using the ACE spectrum, we generalize the ACE constrained design algorithm, making it more flexible and efficient. We justify the ACE spectrum approach through examples and simulation results.

Generalized ACE Constrained Progressive Edge-Growth LDPC Code Design

In this letter, we propose a generalization of the progressive edge-growth (PEG) algorithm with the aim of designing LDPC code graphs with substantially improved approximated cycle extrinsic message degree (ACE) properties. The proposed realization of generalized PEG algorithm outperforms original PEG algorithm and its subsequent modification proposed by Xiao and Banihashemi.