Analog-to-digital Converters Data Research Articles

Research on Cosine-Sum Windows with Maximum Side-Lobe Decay for High Precision ADC Spectral Testing

Achieving coherent sampling has always been a major challenge in analog-to-digital converter (ADC) spectral testing. If the coherent sampling condition cannot be met, leakage appears in the spectrum, which results in inaccurate parameters. The windowing method is widely used to process ADC data to eliminate leakage. However, this method requires prior knowledge about the type of window, and some commonly used windows cannot provide accurate results for a high precision ADC. In this paper, some general principles for optimizing the cosine-sum window and some windows with maximum side-lobe decay have been presented. A test method for eliminating the leakage caused by non-coherent sampling is also proposed. The proposed method can accurately evaluate the dynamic parameters of an ADC with arbitrary non-coherency. Various simulation results and measurement data demonstrate the functionality and robustness of the proposed method. The proposed method significantly relaxes the condition of coherent sampling and decreases the test cost.

Spiking Neural Network-Based Radar Gesture Recognition System Using Raw ADC Data

One of the main challenges in developing embedded radar-based gesture recognition systems is the requirement of energy efficiency. To facilitate this, we present an embedded gesture recognition system using a 60 GHz frequency modulated continuous wave radar using spiking neural networks (SNNs) applied directly to raw analog-to-digital converter (ADC) data. The SNNs are sparse in time and space, and event driven, which makes them energy efficient. In contrast to the previous state-of-the-art methods, the proposed system is only based on the raw ADC data of the target, thus avoiding the overhead of performing the slow-time and fast-time Fourier transforms (FFTs). Furthermore, the preprocessing slow-time FFT is mimicked in the proposed SNN architecture, where the proposed model processing speed of 112 ms advances the state-of-the-art methods by a factor of more than 2. The experimental results demonstrate that despite the simplification, the proposed implementation achieves recognition accuracy of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$98.1 \%$</tex-math></inline-formula> , which is comparable with the conventional approaches.

Introduction to stand alone data converters review, analysis and design orientation

This paper includes a basic review, analysis, and interesting insights, oriented to designers when power consumption is a critical constraint, of Stand-Alone Data Converters. These data converters are an indispensable part of the analog design technique and the only bridge to establish an adequate communication link between analog and digital devices. In fact, this article is dedicated to showing the principal types of the analog-to-digital converters (ADC) and digital-to-analog converters (DAC) families of data converters popular in modern analog design techniques. In fact, these data converters are also cost-effective devices because of the huge number of existing and newly developed solutions with their significant practical features providing more relevant applications in specific type of ADC or DAC process. The overview of data conversion, ADC and DAC data converters, communication bus to Micro Controller Units (MCU), and benefits of data conversion are described.

A fast gain calibration algorithm for beam position monitoring

A stable, reliable and well-calibrated beam position monitor (BPM) system is essential for a safe and reproducible operation of accelerators. The BPM system enables the measurement of important machine and beam parameters, such as the Twiss parameters, and helps to avoid damage to accelerator components by high-energy particle beams or radiation. In this paper, we discuss a new BPM calibration scheme tested at the Taiwan Photon Source (TPS). By altering the current in a single horizontal or vertical corrector magnet, we generate an orbit distortion with respect to the nominal reference orbit. The difference orbit is measured by observing the change of the beam position at each BPM pickup location as a function of the corrector current. The analog BPM signals are digitized by analog-to-digital converters (ADC), giving raw, non-calibrated beam position data for each BPM. By comparison of the beam orbit response in terms of raw ADC data from each BPM with the expected beam displacement we can calibrate the beam position monitors. Moreover, because of limited setup time available after a long shutdown, this new procedure acts as a fast, easy way to calibrate the BPM system.

Development of readout electronics for bunch arrival-time monitor system at SXFEL

A bunch arrival-time monitor (BAM) system, based on electro-optical intensity modulation scheme, is under study at Shanghai Soft X-ray Free Electron Laser. The aim of the study is to achieve high-precision time measurement for minimizing bunch fluctuations. A readout electronics is developed to fulfill the requirements of the BAM system. The readout electronics is mainly composed of a signal conditioning circuit, field-programmable gate array (FPGA), mezzanine card (FMC150), and powerful FPGA carrier board. The signal conditioning circuit converts the laser pulses into electrical pulse signals using a photodiode. Thereafter, it performs splitting and low-noise amplification to achieve the best voltage sampling performance of the dual-channel analog-to-digital converter (ADC) in FMC150. The FMC150 ADC daughter card includes a 14-bit 250 Msps dual-channel high-speed ADC, a clock configuration, and a management module. The powerful FPGA carrier board is a commercial high-performance Xilinx Kintex-7 FPGA evaluation board. To achieve clock and data alignment for ADC data capture at a high sampling rate, we used ISERDES, IDELAY, and dedicated carry-in resources in the Kintex-7 FPGA. This paper presents a detailed development of the readout electronics in the BAM system and its performance.

Non-magnetic compliant finger sensor for continuous fine motor movement detection.

A non-magnetic MEG compatible device has been developed that provides continuous force and velocity information. Combined with MEG, this device may find utility in characterizing brain regions associated with force and velocity relative to individual digits or movement pattern. 15 healthy right-handed participants were given visual cues to perform random finger movements on the prototype finger sensor for 21s and then rest for 21s (7 times). Respective finger flexion data were obtained, during 151-channel MEG brain scanning, by feeding the signal from finger sensor into four input Analog to Digital Converter (ADC) channels in the MEG hardware. The source activity was reconstructed in beta band using a Linearly Constrained Minimum Variance (LCMV) beamformer in the beta band. The ADC channels were used as regressors for a continuous time General Linear Model (GLM) and a Region of Interest (ROI) was identified to examine activity. MEG analysis showed bilateral activation in the primary motor cortex region. Because individual digits could be isolated in the ADC data, somatotopy of the fingers were observed consistent with the homunculus except pinky finger. The total span was calculated to be 5.5662mm. The study confirms that the finger sensor is magnetically compatible with MEG measurements and may potentially provide a means to study complex sensorimotor functions. Improved isolation of individual digit information along with the use of machine learning algorithms can help retrieve more accurate results.

RANCANG BANGUN AUTOMATIC RAIN RECORDING (ARR ) BERBASIS DEVELOPMENT BOARD MIKROAVR128

&lt;p&gt; The right use of rain can provide many benefits. For this reason, mapping of rainfall areas is needed. This is intended to determine the level of disaster preparedness for each region. In mapping, a tool is needed to calculate the rainfall that falls. In the market there are only manual measuring devices, while rainfall gauges are not available which can measure automatically and directly but additional equipment is needed separately. In addition, the measurement results cannot be seen by the public. Therefore we need a tool that works automatically that can display measurement results directly and can be seen directly by the public. Thus the community can see and measure rainfall that falls. In this plan Automatic Rain Recording is used by using a proximity sensor placed on top of a measuring cup and the sensor is connected to the AVR128 Development Board as the control center to convert sensor data into ADC (Analog to Digital Converter) data. This tool is connected with a microSD with a capacity of 8Gbyte to store rainfall level data. AVR128 will store every 2 minutes with a total of 275,368 data and 382 days of storage capability.&lt;/p&gt;&lt;p&gt;Keywords : rainfall, ARR, ADC, AVR128, mikroSD &lt;/p&gt;

Free-running ADC- and FPGA-based signal processing method for brain PET using GAPD arrays

Currently, for most photomultiplier tube (PMT)-based PET systems, constant fraction discriminators (CFD) and time to digital converters (TDC) have been employed to detect gamma ray signal arrival time, whereas anger logic circuits and peak detection analog-to-digital converters (ADCs) have been implemented to acquire position and energy information of detected events. As compared to PMT the Geiger-mode avalanche photodiodes (GAPDs) have a variety of advantages, such as compactness, low bias voltage requirement and MRI compatibility. Furthermore, the individual read-out method using a GAPD array coupled 1:1 with an array scintillator can provide better image uniformity than can be achieved using PMT and anger logic circuits. Recently, a brain PET using 72 GAPD arrays (4×4 array, pixel size: 3 mm×3 mm) coupled 1:1 with LYSO scintillators (4×4 array, pixel size: 3 mm×3 mm×20 mm) has been developed for simultaneous PET/MRI imaging in our laboratory. Eighteen 64:1 position decoder circuits (PDCs) were used to reduce GAPD channel number and three off-the-shelf free-running ADC and field programmable gate array (FPGA) combined data acquisition (DAQ) cards were used for data acquisition and processing. In this study, a free-running ADC- and FPGA-based signal processing method was developed for the detection of gamma ray signal arrival time, energy and position information all together for each GAPD channel. For the method developed herein, three DAQ cards continuously acquired 18 channels of pre-amplified analog gamma ray signals and 108-bit digital addresses from 18 PDCs. In the FPGA, the digitized gamma ray pulses and digital addresses were processed to generate data packages containing pulse arrival time, baseline value, energy value and GAPD channel ID. Finally, these data packages were saved to a 128 Mbyte on-board synchronous dynamic random access memory (SDRAM) and then transferred to a host computer for coincidence sorting and image reconstruction. In order to evaluate the functionality of the developed signal processing method, energy and timing resolutions for brain PET were measured via the placement of a 6 μCi 22Na point source at the center of the PET scanner. Furthermore the PET image of the hot rod phantom (rod diameter: from 2.5 mm to 6.5 mm) with activity of 1 mCi was simulated, and then image acquisition experiment was performed using the brain PET. Measured average energy resolution for 1152 GAPD channels and system timing resolution were 19.5% (FWHM%) and 2.7 ns (FWHM), respectively. With regard to the acquisition of the hot rod phantom image, rods could be resolved down to a diameter of 2.5 mm, which was similar to simulated results. The experimental results demonstrated that the signal processing method developed herein was successfully implemented for brain PET. This reduced the complexity, cost and developing duration for PET system relative to normal PET electronics, and it will obviously be useful for the development of high-performance investigational PET systems.

A sampling ADC data acquisition system for positron emission tomography

A data acquisition system for a positron emission tomograph (PET) based on avalanche photodiode (APD) readout of lutetium oxyorthosilicate (LSO) scintillator crystals is presented. The analog data of each APD are read out by fast analog to digital converters (ADCs) and processed within field programmable gate arrays (FPGAs). The ADCs are continuously sampling with a 80 MHz, low jitter clock, which is synchronous for the whole detector. The main tasks of the FPGAs are pulse detection and extraction of signal timing information from the digitized data stream. The detected signal pulse data are therefore compared to a predefined set of pulse shapes with known phase shifts with respect to the sample clock. By searching for the best match within this calibration set, a precise start time information for the signal pulse can be determined. The calculated time values are then transmitted from the ADC cards via fiber optic links to multiplexer modules which combine the different data streams and can also perform further processing like search for coincident events. Finally, the preprocessed detector data are transmitted from the multiplexers to PCI cards in the image reconstruction computers by gigabit optical links

Optimal index-bit allocation for dynamic post-correction of analog-to-digital converters

Signal processing methods for digital post-correction of analog-to-digital converters (ADCs) are considered. ADC errors are in general signal dependent, and in addition, they often exhibit dynamic dependence. A novel dynamic post-correction scheme based on look-up tables is proposed. In order to reduce the table size and, thus, the hardware requirements, bit-masking is introduced. This is to limit the length of the table index by deselecting index bits. At this point, the problem of which bits to use arises. A mathematical analysis tool is derived, enabling the allocation of index bits to be analyzed. This analysis tool is applied in two optimization problems, optimizing the total harmonic distortion and the signal-to-noise and distortion ratio, respectively, of a corrected ADC. The correction scheme and the optimization problems are illustrated and exemplified using experimental ADC data. The results show that the proposed correction scheme improves the performance of the ADC. They also indicate that the allocation of index bits has a significant impact on the ADC performance, motivating the analysis tool. Finally, the optimization results show that performance improvements compared with static look-up table correction can be achieved, even at a comparable table size.

A Criterion for Optimizing Bit-Reduced Post-Correction of AD Converters

Dynamic digital post-correction of analog-to-digital converters (ADCs) is considered. A generalized dynamic correction method is proposed and a framework for analyzing the related bit allocation problem is derived. Finally, this framework is employed in an optimization problem. The solution to the problem indicates which ADC output bits to use in order to maximize the signal-to-noise and distortion ratio in a post-correction system with a constraint on memory size. The proposed methods are accompanied by exemplary results obtained using experimental ADC data.